| Message ID | CAM7GXo=hisu7x-uGXr3mcu0cGh+0jPSmhjXwhwW07FP=dO2c2A@mail.gmail.com |
|---|---|
| State | Superseded |
| Delegated to: | Marek Vasut |
| Headers | show |
On 06/06/2016 06:15 PM, Steve Rae wrote: > On Mon, Jun 6, 2016 at 8:59 AM, Marek Vasut <marex@denx.de> wrote: >> >> On 06/06/2016 05:57 PM, Steve Rae wrote: >>> Define CONFIG_USB_GADGET_DWC2_PHY_8_BIT to allow the >>> physical interface to be 8-bit (rather than 16-bit). >>> >>> Signed-off-by: Steve Rae <srae@broadcom.com> >> >> Can this config option be picked from DT rather than hard-coded by some >> new ad-hoc config option ? Also, new options should be Kconfig'd . >> >> Thanks >> > > Marek, Hi, > would this be the correct place to add this Kconfig??? > is the wording sufficient? > Thanks, Steve > > diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig > index a35a1c7..e957df4 100644 > --- a/drivers/usb/gadget/Kconfig > +++ b/drivers/usb/gadget/Kconfig > @@ -45,20 +45,26 @@ config USB_GADGET_ATMEL_USBA > > config USB_GADGET_DWC2_OTG > bool "DesignWare USB2.0 HS OTG controller (gadget mode)" > select USB_GADGET_DUALSPEED > help > The Designware USB2.0 high-speed gadget controller > integrated into many SoCs. Select this option if you want the > driver to operate in Peripheral mode. This option requires > USB_GADGET to be enabled. > > +config USB_GADGET_DWC2_PHY_8_BIT > + bool "DesignWare USB2.0 controller (gadget mode)" This is wrong, right ? > + help > + Set the Designware USB2.0 high-speed gadget controller > + to 8-bit mode, rather than the default 16-bit mode. You mean 8bit mode ULPI, don't you ? > config CI_UDC > bool "ChipIdea device controller" > select USB_GADGET_DUALSPEED > help > Say Y here to enable device controller functionality of the > ChipIdea driver. > > config USB_GADGET_VBUS_DRAW > int "Maximum VBUS Power usage (2-500 mA)" > range 2 500 > >> >>> --- >>> >>> drivers/usb/gadget/dwc2_udc_otg.c | 4 ++++ >>> include/configs/bcm28155_ap.h | 1 + >>> 2 files changed, 5 insertions(+) >>> >>> diff --git a/drivers/usb/gadget/dwc2_udc_otg.c b/drivers/usb/gadget/dwc2_udc_otg.c >>> index cb20b00..a95c8d5 100644 >>> --- a/drivers/usb/gadget/dwc2_udc_otg.c >>> +++ b/drivers/usb/gadget/dwc2_udc_otg.c >>> @@ -415,7 +415,11 @@ static void reconfig_usbd(struct dwc2_udc *dev) >>> |0<<7 /* Ulpi DDR sel*/ >>> |0<<6 /* 0: high speed utmi+, 1: full speed serial*/ >>> |0<<4 /* 0: utmi+, 1:ulpi*/ >>> +#ifdef CONFIG_USB_GADGET_DWC2_PHY_8_BIT >>> + |0<<3 /* phy i/f 0:8bit, 1:16bit*/ >>> +#else >>> |1<<3 /* phy i/f 0:8bit, 1:16bit*/ >>> +#endif >>> |0x7<<0; /* HS/FS Timeout**/ >>> >>> if (dev->pdata->usb_gusbcfg) >>> diff --git a/include/configs/bcm28155_ap.h b/include/configs/bcm28155_ap.h >>> index 889e5db..e04cfbe 100644 >>> --- a/include/configs/bcm28155_ap.h >>> +++ b/include/configs/bcm28155_ap.h >>> @@ -134,6 +134,7 @@ >>> #define CONFIG_SYS_CACHELINE_SIZE 64 >>> #define CONFIG_FASTBOOT_BUF_SIZE (CONFIG_SYS_SDRAM_SIZE - SZ_1M) >>> #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_SDRAM_BASE >>> +#define CONFIG_USB_GADGET_DWC2_PHY_8_BIT >>> #define CONFIG_USB_GADGET_BCM_UDC_OTG_PHY >>> #define CONFIG_USBID_ADDR 0x34052c46 >>> >>> >> >> >> -- >> Best regards, >> Marek Vasut
On Mon, Jun 6, 2016 at 9:30 AM, Marek Vasut <marex@denx.de> wrote: > On 06/06/2016 06:15 PM, Steve Rae wrote: > > On Mon, Jun 6, 2016 at 8:59 AM, Marek Vasut <marex@denx.de> wrote: > >> > >> On 06/06/2016 05:57 PM, Steve Rae wrote: > >>> Define CONFIG_USB_GADGET_DWC2_PHY_8_BIT to allow the > >>> physical interface to be 8-bit (rather than 16-bit). > >>> > >>> Signed-off-by: Steve Rae <srae@broadcom.com> > >> > >> Can this config option be picked from DT rather than hard-coded by some > >> new ad-hoc config option ? Also, new options should be Kconfig'd . > >> > >> Thanks > >> > > > > Marek, > > Hi, > > > would this be the correct place to add this Kconfig??? > > is the wording sufficient? > > Thanks, Steve > > > > diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig > > index a35a1c7..e957df4 100644 > > --- a/drivers/usb/gadget/Kconfig > > +++ b/drivers/usb/gadget/Kconfig > > @@ -45,20 +45,26 @@ config USB_GADGET_ATMEL_USBA > > > > config USB_GADGET_DWC2_OTG > > bool "DesignWare USB2.0 HS OTG controller (gadget mode)" > > select USB_GADGET_DUALSPEED > > help > > The Designware USB2.0 high-speed gadget controller > > integrated into many SoCs. Select this option if you want the > > driver to operate in Peripheral mode. This option requires > > USB_GADGET to be enabled. > > > > +config USB_GADGET_DWC2_PHY_8_BIT > > + bool "DesignWare USB2.0 controller (gadget mode)" > > This is wrong, right ? > (see below) > > > + help > > + Set the Designware USB2.0 high-speed gadget controller > > + to 8-bit mode, rather than the default 16-bit mode. > > You mean 8bit mode ULPI, don't you ? > (see below) > > > config CI_UDC > > bool "ChipIdea device controller" > > select USB_GADGET_DUALSPEED > > help > > Say Y here to enable device controller functionality of the > > ChipIdea driver. > > > > config USB_GADGET_VBUS_DRAW > > int "Maximum VBUS Power usage (2-500 mA)" > > range 2 500 > > > >> > >>> --- > >>> > >>> drivers/usb/gadget/dwc2_udc_otg.c | 4 ++++ > >>> include/configs/bcm28155_ap.h | 1 + > >>> 2 files changed, 5 insertions(+) > >>> > >>> diff --git a/drivers/usb/gadget/dwc2_udc_otg.c > b/drivers/usb/gadget/dwc2_udc_otg.c > >>> index cb20b00..a95c8d5 100644 > >>> --- a/drivers/usb/gadget/dwc2_udc_otg.c > >>> +++ b/drivers/usb/gadget/dwc2_udc_otg.c > >>> @@ -415,7 +415,11 @@ static void reconfig_usbd(struct dwc2_udc *dev) > >>> |0<<7 /* Ulpi DDR sel*/ > >>> |0<<6 /* 0: high speed utmi+, 1: full speed > serial*/ > >>> |0<<4 /* 0: utmi+, 1:ulpi*/ > >>> +#ifdef CONFIG_USB_GADGET_DWC2_PHY_8_BIT > >>> + |0<<3 /* phy i/f 0:8bit, 1:16bit*/ > >>> +#else > >>> |1<<3 /* phy i/f 0:8bit, 1:16bit*/ > >>> +#endif > >>> |0x7<<0; /* HS/FS Timeout**/ > Marek, The _only_ thing that I know is that this structure contains settings to make the USB-OTG interface work on Broadcom boards. Broadcom "hardcoded" these values to "utmi+" and "8bit" ("years ago"...), and I am attempting to upstream this change (which I think requires a CONFIG option -- so that I don't break the current usage; unless there is a better method???) So what this CONFIG is "called" and what is its "explanation" is completely unknown to me -- hence, I am asking for help in determining what the Kconfig option should actually be.... Thanks in advance, Steve >>> > >>> if (dev->pdata->usb_gusbcfg) > >>> diff --git a/include/configs/bcm28155_ap.h > b/include/configs/bcm28155_ap.h > >>> index 889e5db..e04cfbe 100644 > >>> --- a/include/configs/bcm28155_ap.h > >>> +++ b/include/configs/bcm28155_ap.h > >>> @@ -134,6 +134,7 @@ > >>> #define CONFIG_SYS_CACHELINE_SIZE 64 > >>> #define CONFIG_FASTBOOT_BUF_SIZE (CONFIG_SYS_SDRAM_SIZE - SZ_1M) > >>> #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_SDRAM_BASE > >>> +#define CONFIG_USB_GADGET_DWC2_PHY_8_BIT > >>> #define CONFIG_USB_GADGET_BCM_UDC_OTG_PHY > >>> #define CONFIG_USBID_ADDR 0x34052c46 > >>> > >>> > >> > >> > >> -- > >> Best regards, > >> Marek Vasut > > > -- > Best regards, > Marek Vasut >
On 06/06/2016 06:50 PM, Steve Rae wrote: > > > On Mon, Jun 6, 2016 at 9:30 AM, Marek Vasut <marex@denx.de > <mailto:marex@denx.de>> wrote: > > On 06/06/2016 06:15 PM, Steve Rae wrote: > > On Mon, Jun 6, 2016 at 8:59 AM, Marek Vasut <marex@denx.de <mailto:marex@denx.de>> wrote: > >> > >> On 06/06/2016 05:57 PM, Steve Rae wrote: > >>> Define CONFIG_USB_GADGET_DWC2_PHY_8_BIT to allow the > >>> physical interface to be 8-bit (rather than 16-bit). > >>> > >>> Signed-off-by: Steve Rae <srae@broadcom.com <mailto:srae@broadcom.com>> > >> > >> Can this config option be picked from DT rather than hard-coded by some > >> new ad-hoc config option ? Also, new options should be Kconfig'd . > >> > >> Thanks > >> > > > > Marek, > > Hi, > > > would this be the correct place to add this Kconfig??? > > is the wording sufficient? > > Thanks, Steve > > > > diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig > > index a35a1c7..e957df4 100644 > > --- a/drivers/usb/gadget/Kconfig > > +++ b/drivers/usb/gadget/Kconfig > > @@ -45,20 +45,26 @@ config USB_GADGET_ATMEL_USBA > > > > config USB_GADGET_DWC2_OTG > > bool "DesignWare USB2.0 HS OTG controller (gadget mode)" > > select USB_GADGET_DUALSPEED > > help > > The Designware USB2.0 high-speed gadget controller > > integrated into many SoCs. Select this option if you want the > > driver to operate in Peripheral mode. This option requires > > USB_GADGET to be enabled. > > > > +config USB_GADGET_DWC2_PHY_8_BIT > > + bool "DesignWare USB2.0 controller (gadget mode)" > > This is wrong, right ? > > (see below) > > > > + help > > + Set the Designware USB2.0 high-speed gadget controller > > + to 8-bit mode, rather than the default 16-bit mode. > > You mean 8bit mode ULPI, don't you ? > > (see below) > > > > config CI_UDC > > bool "ChipIdea device controller" > > select USB_GADGET_DUALSPEED > > help > > Say Y here to enable device controller functionality of the > > ChipIdea driver. > > > > config USB_GADGET_VBUS_DRAW > > int "Maximum VBUS Power usage (2-500 mA)" > > range 2 500 > > > >> > >>> --- > >>> > >>> drivers/usb/gadget/dwc2_udc_otg.c | 4 ++++ > >>> include/configs/bcm28155_ap.h | 1 + > >>> 2 files changed, 5 insertions(+) > >>> > >>> diff --git a/drivers/usb/gadget/dwc2_udc_otg.c > b/drivers/usb/gadget/dwc2_udc_otg.c > >>> index cb20b00..a95c8d5 100644 > >>> --- a/drivers/usb/gadget/dwc2_udc_otg.c > >>> +++ b/drivers/usb/gadget/dwc2_udc_otg.c > >>> @@ -415,7 +415,11 @@ static void reconfig_usbd(struct dwc2_udc *dev) > >>> |0<<7 /* Ulpi DDR sel*/ > >>> |0<<6 /* 0: high speed utmi+, 1: full > speed serial*/ > >>> |0<<4 /* 0: utmi+, 1:ulpi*/ > >>> +#ifdef CONFIG_USB_GADGET_DWC2_PHY_8_BIT > >>> + |0<<3 /* phy i/f 0:8bit, 1:16bit*/ > >>> +#else > >>> |1<<3 /* phy i/f 0:8bit, 1:16bit*/ > >>> +#endif > >>> |0x7<<0; /* HS/FS Timeout**/ > > > Marek, > The _only_ thing that I know is that this structure contains settings to > make the USB-OTG interface work on Broadcom boards. Broadcom "hardcoded" > these values to "utmi+" and "8bit" ("years ago"...), and I am attempting > to upstream this change (which I think requires a CONFIG option -- so > that I don't break the current usage; unless there is a better method???) The best method is to pull such configuration from device tree. I don't know if DT is used on the BCM28155 chip yet. The acceptable option is to add the Kconfig option. > So what this CONFIG is "called" and what is its "explanation" is > completely unknown to me -- hence, I am asking for help in determining > what the Kconfig option should actually be.... Something like "DesignWare USB2.0 HS OTG controller PHY interface width" ? The bit which this alters has to be described in the controller manual, so just call it the same. btw the Kconfig option should be moved under the DWC2 controller entry, something like this will do: if USB_GADGET_DWC2 config USB_GADGET_DWC2_PHY_8_BIT ....... endif > Thanks in advance, Steve > > >>> > >>> if (dev->pdata->usb_gusbcfg) > >>> diff --git a/include/configs/bcm28155_ap.h > b/include/configs/bcm28155_ap.h > >>> index 889e5db..e04cfbe 100644 > >>> --- a/include/configs/bcm28155_ap.h > >>> +++ b/include/configs/bcm28155_ap.h > >>> @@ -134,6 +134,7 @@ > >>> #define CONFIG_SYS_CACHELINE_SIZE 64 > >>> #define CONFIG_FASTBOOT_BUF_SIZE (CONFIG_SYS_SDRAM_SIZE - > SZ_1M) > >>> #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_SDRAM_BASE > >>> +#define CONFIG_USB_GADGET_DWC2_PHY_8_BIT > >>> #define CONFIG_USB_GADGET_BCM_UDC_OTG_PHY > >>> #define CONFIG_USBID_ADDR 0x34052c46 > >>> > >>> > >> > >> > >> -- > >> Best regards, > >> Marek Vasut > > > -- > Best regards, > Marek Vasut > >
On Mon, Jun 6, 2016 at 10:03 AM, Marek Vasut <marex@denx.de> wrote: > > On 06/06/2016 06:50 PM, Steve Rae wrote: > > > > > > On Mon, Jun 6, 2016 at 9:30 AM, Marek Vasut <marex@denx.de > > <mailto:marex@denx.de>> wrote: > > > > On 06/06/2016 06:15 PM, Steve Rae wrote: > > > On Mon, Jun 6, 2016 at 8:59 AM, Marek Vasut <marex@denx.de <mailto:marex@denx.de>> wrote: > > >> > > >> On 06/06/2016 05:57 PM, Steve Rae wrote: > > >>> Define CONFIG_USB_GADGET_DWC2_PHY_8_BIT to allow the > > >>> physical interface to be 8-bit (rather than 16-bit). > > >>> > > >>> Signed-off-by: Steve Rae <srae@broadcom.com <mailto:srae@broadcom.com>> > > >> > > >> Can this config option be picked from DT rather than hard-coded by some > > >> new ad-hoc config option ? Also, new options should be Kconfig'd . > > >> > > >> Thanks > > >> > > > > > > Marek, > > > > Hi, > > > > > would this be the correct place to add this Kconfig??? > > > is the wording sufficient? > > > Thanks, Steve > > > > > > diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig > > > index a35a1c7..e957df4 100644 > > > --- a/drivers/usb/gadget/Kconfig > > > +++ b/drivers/usb/gadget/Kconfig > > > @@ -45,20 +45,26 @@ config USB_GADGET_ATMEL_USBA > > > > > > config USB_GADGET_DWC2_OTG > > > bool "DesignWare USB2.0 HS OTG controller (gadget mode)" > > > select USB_GADGET_DUALSPEED > > > help > > > The Designware USB2.0 high-speed gadget controller > > > integrated into many SoCs. Select this option if you want the > > > driver to operate in Peripheral mode. This option requires > > > USB_GADGET to be enabled. > > > > > > +config USB_GADGET_DWC2_PHY_8_BIT > > > + bool "DesignWare USB2.0 controller (gadget mode)" > > > > This is wrong, right ? > > > > (see below) > > > > > > > + help > > > + Set the Designware USB2.0 high-speed gadget controller > > > + to 8-bit mode, rather than the default 16-bit mode. > > > > You mean 8bit mode ULPI, don't you ? > > > > (see below) > > > > > > > config CI_UDC > > > bool "ChipIdea device controller" > > > select USB_GADGET_DUALSPEED > > > help > > > Say Y here to enable device controller functionality of the > > > ChipIdea driver. > > > > > > config USB_GADGET_VBUS_DRAW > > > int "Maximum VBUS Power usage (2-500 mA)" > > > range 2 500 > > > > > >> > > >>> --- > > >>> > > >>> drivers/usb/gadget/dwc2_udc_otg.c | 4 ++++ > > >>> include/configs/bcm28155_ap.h | 1 + > > >>> 2 files changed, 5 insertions(+) > > >>> > > >>> diff --git a/drivers/usb/gadget/dwc2_udc_otg.c > > b/drivers/usb/gadget/dwc2_udc_otg.c > > >>> index cb20b00..a95c8d5 100644 > > >>> --- a/drivers/usb/gadget/dwc2_udc_otg.c > > >>> +++ b/drivers/usb/gadget/dwc2_udc_otg.c > > >>> @@ -415,7 +415,11 @@ static void reconfig_usbd(struct dwc2_udc *dev) > > >>> |0<<7 /* Ulpi DDR sel*/ > > >>> |0<<6 /* 0: high speed utmi+, 1: full > > speed serial*/ > > >>> |0<<4 /* 0: utmi+, 1:ulpi*/ > > >>> +#ifdef CONFIG_USB_GADGET_DWC2_PHY_8_BIT > > >>> + |0<<3 /* phy i/f 0:8bit, 1:16bit*/ > > >>> +#else > > >>> |1<<3 /* phy i/f 0:8bit, 1:16bit*/ > > >>> +#endif > > >>> |0x7<<0; /* HS/FS Timeout**/ > > > > > > Marek, > > The _only_ thing that I know is that this structure contains settings to > > make the USB-OTG interface work on Broadcom boards. Broadcom "hardcoded" > > these values to "utmi+" and "8bit" ("years ago"...), and I am attempting > > to upstream this change (which I think requires a CONFIG option -- so > > that I don't break the current usage; unless there is a better method???) > > The best method is to pull such configuration from device tree. I don't > know if DT is used on the BCM28155 chip yet. The acceptable option is to > add the Kconfig option. > > > So what this CONFIG is "called" and what is its "explanation" is > > completely unknown to me -- hence, I am asking for help in determining > > what the Kconfig option should actually be.... > > Something like "DesignWare USB2.0 HS OTG controller PHY interface width" > ? The bit which this alters has to be described in the controller > manual, so just call it the same. ( I don't have access to a manual ) In the kernel, it seems to be defined as: GUSBCFG_PHYIF8 GUSBCFG_PHYIF16 > > > btw the Kconfig option should be moved under the DWC2 controller entry, > something like this will do: OK > > > if USB_GADGET_DWC2 > config USB_GADGET_DWC2_PHY_8_BIT > ....... > endif I assume you mean USB_GADGET_DWC2_OTG (USB_GADGET_DWC2 does not exist)??? +if USB_GADGET_DWC2_OTG + +config USB_GADGET_DWC2_OTG_PHY_8_BIT + bool "DesignWare USB2.0 HS OTG controller PHY interface width" + help + Set the Designware USB2.0 high-speed OTG controller + PHY interface width to 8 bits, rather that the default (16 bits). + +endif # USB_GADGET_DWC2_OTG or USB_GADGET_DWC2_OTG_PHYIF8 or ???? > > > > Thanks in advance, Steve > > > > >>> > > >>> if (dev->pdata->usb_gusbcfg) > > >>> diff --git a/include/configs/bcm28155_ap.h > > b/include/configs/bcm28155_ap.h > > >>> index 889e5db..e04cfbe 100644 > > >>> --- a/include/configs/bcm28155_ap.h > > >>> +++ b/include/configs/bcm28155_ap.h > > >>> @@ -134,6 +134,7 @@ > > >>> #define CONFIG_SYS_CACHELINE_SIZE 64 > > >>> #define CONFIG_FASTBOOT_BUF_SIZE (CONFIG_SYS_SDRAM_SIZE - > > SZ_1M) > > >>> #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_SDRAM_BASE > > >>> +#define CONFIG_USB_GADGET_DWC2_PHY_8_BIT > > >>> #define CONFIG_USB_GADGET_BCM_UDC_OTG_PHY > > >>> #define CONFIG_USBID_ADDR 0x34052c46 > > >>> > > >>> > > >> > > >> > > >> -- > > >> Best regards, > > >> Marek Vasut > > > > > > -- > > Best regards, > > Marek Vasut > > > > > > > -- > Best regards, > Marek Vasut
On Mon, Jun 6, 2016 at 11:58 AM, Steve Rae <steve.rae@broadcom.com> wrote: > On Mon, Jun 6, 2016 at 10:03 AM, Marek Vasut <marex@denx.de> wrote: >> >> On 06/06/2016 06:50 PM, Steve Rae wrote: >> > >> > >> > On Mon, Jun 6, 2016 at 9:30 AM, Marek Vasut <marex@denx.de >> > <mailto:marex@denx.de>> wrote: >> > >> > On 06/06/2016 06:15 PM, Steve Rae wrote: >> > > On Mon, Jun 6, 2016 at 8:59 AM, Marek Vasut <marex@denx.de <mailto:marex@denx.de>> wrote: >> > >> >> > >> On 06/06/2016 05:57 PM, Steve Rae wrote: >> > >>> Define CONFIG_USB_GADGET_DWC2_PHY_8_BIT to allow the >> > >>> physical interface to be 8-bit (rather than 16-bit). >> > >>> >> > >>> Signed-off-by: Steve Rae <srae@broadcom.com <mailto:srae@broadcom.com>> >> > >> >> > >> Can this config option be picked from DT rather than hard-coded by some >> > >> new ad-hoc config option ? Also, new options should be Kconfig'd . >> > >> >> > >> Thanks >> > >> >> > > >> > > Marek, >> > >> > Hi, >> > >> > > would this be the correct place to add this Kconfig??? >> > > is the wording sufficient? >> > > Thanks, Steve >> > > >> > > diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig >> > > index a35a1c7..e957df4 100644 >> > > --- a/drivers/usb/gadget/Kconfig >> > > +++ b/drivers/usb/gadget/Kconfig >> > > @@ -45,20 +45,26 @@ config USB_GADGET_ATMEL_USBA >> > > >> > > config USB_GADGET_DWC2_OTG >> > > bool "DesignWare USB2.0 HS OTG controller (gadget mode)" >> > > select USB_GADGET_DUALSPEED >> > > help >> > > The Designware USB2.0 high-speed gadget controller >> > > integrated into many SoCs. Select this option if you want the >> > > driver to operate in Peripheral mode. This option requires >> > > USB_GADGET to be enabled. >> > > >> > > +config USB_GADGET_DWC2_PHY_8_BIT >> > > + bool "DesignWare USB2.0 controller (gadget mode)" >> > >> > This is wrong, right ? >> > >> > (see below) >> > >> > >> > > + help >> > > + Set the Designware USB2.0 high-speed gadget controller >> > > + to 8-bit mode, rather than the default 16-bit mode. >> > >> > You mean 8bit mode ULPI, don't you ? >> > >> > (see below) >> > >> > >> > > config CI_UDC >> > > bool "ChipIdea device controller" >> > > select USB_GADGET_DUALSPEED >> > > help >> > > Say Y here to enable device controller functionality of the >> > > ChipIdea driver. >> > > >> > > config USB_GADGET_VBUS_DRAW >> > > int "Maximum VBUS Power usage (2-500 mA)" >> > > range 2 500 >> > > >> > >> >> > >>> --- >> > >>> >> > >>> drivers/usb/gadget/dwc2_udc_otg.c | 4 ++++ >> > >>> include/configs/bcm28155_ap.h | 1 + >> > >>> 2 files changed, 5 insertions(+) >> > >>> >> > >>> diff --git a/drivers/usb/gadget/dwc2_udc_otg.c >> > b/drivers/usb/gadget/dwc2_udc_otg.c >> > >>> index cb20b00..a95c8d5 100644 >> > >>> --- a/drivers/usb/gadget/dwc2_udc_otg.c >> > >>> +++ b/drivers/usb/gadget/dwc2_udc_otg.c >> > >>> @@ -415,7 +415,11 @@ static void reconfig_usbd(struct dwc2_udc *dev) >> > >>> |0<<7 /* Ulpi DDR sel*/ >> > >>> |0<<6 /* 0: high speed utmi+, 1: full >> > speed serial*/ >> > >>> |0<<4 /* 0: utmi+, 1:ulpi*/ >> > >>> +#ifdef CONFIG_USB_GADGET_DWC2_PHY_8_BIT >> > >>> + |0<<3 /* phy i/f 0:8bit, 1:16bit*/ >> > >>> +#else >> > >>> |1<<3 /* phy i/f 0:8bit, 1:16bit*/ >> > >>> +#endif >> > >>> |0x7<<0; /* HS/FS Timeout**/ >> > >> > >> > Marek, >> > The _only_ thing that I know is that this structure contains settings to >> > make the USB-OTG interface work on Broadcom boards. Broadcom "hardcoded" >> > these values to "utmi+" and "8bit" ("years ago"...), and I am attempting >> > to upstream this change (which I think requires a CONFIG option -- so >> > that I don't break the current usage; unless there is a better method???) >> >> The best method is to pull such configuration from device tree. I don't >> know if DT is used on the BCM28155 chip yet. The acceptable option is to >> add the Kconfig option. >> >> > So what this CONFIG is "called" and what is its "explanation" is >> > completely unknown to me -- hence, I am asking for help in determining >> > what the Kconfig option should actually be.... >> >> Something like "DesignWare USB2.0 HS OTG controller PHY interface width" >> ? The bit which this alters has to be described in the controller >> manual, so just call it the same. > > ( I don't have access to a manual ) > In the kernel, it seems to be defined as: > GUSBCFG_PHYIF8 > GUSBCFG_PHYIF16 >> >> >> btw the Kconfig option should be moved under the DWC2 controller entry, >> something like this will do: > > OK >> >> >> if USB_GADGET_DWC2 >> config USB_GADGET_DWC2_PHY_8_BIT >> ....... >> endif > > I assume you mean USB_GADGET_DWC2_OTG (USB_GADGET_DWC2 does not exist)??? > > +if USB_GADGET_DWC2_OTG > + > +config USB_GADGET_DWC2_OTG_PHY_8_BIT > + bool "DesignWare USB2.0 HS OTG controller PHY interface width" > + help > + Set the Designware USB2.0 high-speed OTG controller > + PHY interface width to 8 bits, rather that the default (16 bits). > + > +endif # USB_GADGET_DWC2_OTG > > or USB_GADGET_DWC2_OTG_PHYIF8 > > or ???? found more defines in the kernel: GHWCFG4_UTMI_PHY_DATA_WIDTH_8 GHWCFG4_UTMI_PHY_DATA_WIDTH_16 so maybe: USB_GADGET_DWC2_OTG_PHY_DATA_WIDTH_8 > >> >> >> > Thanks in advance, Steve >> > >> > >>> >> > >>> if (dev->pdata->usb_gusbcfg) >> > >>> diff --git a/include/configs/bcm28155_ap.h >> > b/include/configs/bcm28155_ap.h >> > >>> index 889e5db..e04cfbe 100644 >> > >>> --- a/include/configs/bcm28155_ap.h >> > >>> +++ b/include/configs/bcm28155_ap.h >> > >>> @@ -134,6 +134,7 @@ >> > >>> #define CONFIG_SYS_CACHELINE_SIZE 64 >> > >>> #define CONFIG_FASTBOOT_BUF_SIZE (CONFIG_SYS_SDRAM_SIZE - >> > SZ_1M) >> > >>> #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_SDRAM_BASE >> > >>> +#define CONFIG_USB_GADGET_DWC2_PHY_8_BIT >> > >>> #define CONFIG_USB_GADGET_BCM_UDC_OTG_PHY >> > >>> #define CONFIG_USBID_ADDR 0x34052c46 >> > >>> >> > >>> >> > >> >> > >> >> > >> -- >> > >> Best regards, >> > >> Marek Vasut >> > >> > >> > -- >> > Best regards, >> > Marek Vasut >> > >> > >> >> >> -- >> Best regards, >> Marek Vasut
On 06/06/2016 08:58 PM, Steve Rae wrote: > On Mon, Jun 6, 2016 at 10:03 AM, Marek Vasut <marex@denx.de> wrote: >> >> On 06/06/2016 06:50 PM, Steve Rae wrote: >>> >>> >>> On Mon, Jun 6, 2016 at 9:30 AM, Marek Vasut <marex@denx.de >>> <mailto:marex@denx.de>> wrote: >>> >>> On 06/06/2016 06:15 PM, Steve Rae wrote: >>> > On Mon, Jun 6, 2016 at 8:59 AM, Marek Vasut <marex@denx.de <mailto:marex@denx.de>> wrote: >>> >> >>> >> On 06/06/2016 05:57 PM, Steve Rae wrote: >>> >>> Define CONFIG_USB_GADGET_DWC2_PHY_8_BIT to allow the >>> >>> physical interface to be 8-bit (rather than 16-bit). >>> >>> >>> >>> Signed-off-by: Steve Rae <srae@broadcom.com <mailto:srae@broadcom.com>> >>> >> >>> >> Can this config option be picked from DT rather than hard-coded by some >>> >> new ad-hoc config option ? Also, new options should be Kconfig'd . >>> >> >>> >> Thanks >>> >> >>> > >>> > Marek, >>> >>> Hi, >>> >>> > would this be the correct place to add this Kconfig??? >>> > is the wording sufficient? >>> > Thanks, Steve >>> > >>> > diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig >>> > index a35a1c7..e957df4 100644 >>> > --- a/drivers/usb/gadget/Kconfig >>> > +++ b/drivers/usb/gadget/Kconfig >>> > @@ -45,20 +45,26 @@ config USB_GADGET_ATMEL_USBA >>> > >>> > config USB_GADGET_DWC2_OTG >>> > bool "DesignWare USB2.0 HS OTG controller (gadget mode)" >>> > select USB_GADGET_DUALSPEED >>> > help >>> > The Designware USB2.0 high-speed gadget controller >>> > integrated into many SoCs. Select this option if you want the >>> > driver to operate in Peripheral mode. This option requires >>> > USB_GADGET to be enabled. >>> > >>> > +config USB_GADGET_DWC2_PHY_8_BIT >>> > + bool "DesignWare USB2.0 controller (gadget mode)" >>> >>> This is wrong, right ? >>> >>> (see below) >>> >>> >>> > + help >>> > + Set the Designware USB2.0 high-speed gadget controller >>> > + to 8-bit mode, rather than the default 16-bit mode. >>> >>> You mean 8bit mode ULPI, don't you ? >>> >>> (see below) >>> >>> >>> > config CI_UDC >>> > bool "ChipIdea device controller" >>> > select USB_GADGET_DUALSPEED >>> > help >>> > Say Y here to enable device controller functionality of the >>> > ChipIdea driver. >>> > >>> > config USB_GADGET_VBUS_DRAW >>> > int "Maximum VBUS Power usage (2-500 mA)" >>> > range 2 500 >>> > >>> >> >>> >>> --- >>> >>> >>> >>> drivers/usb/gadget/dwc2_udc_otg.c | 4 ++++ >>> >>> include/configs/bcm28155_ap.h | 1 + >>> >>> 2 files changed, 5 insertions(+) >>> >>> >>> >>> diff --git a/drivers/usb/gadget/dwc2_udc_otg.c >>> b/drivers/usb/gadget/dwc2_udc_otg.c >>> >>> index cb20b00..a95c8d5 100644 >>> >>> --- a/drivers/usb/gadget/dwc2_udc_otg.c >>> >>> +++ b/drivers/usb/gadget/dwc2_udc_otg.c >>> >>> @@ -415,7 +415,11 @@ static void reconfig_usbd(struct dwc2_udc *dev) >>> >>> |0<<7 /* Ulpi DDR sel*/ >>> >>> |0<<6 /* 0: high speed utmi+, 1: full >>> speed serial*/ >>> >>> |0<<4 /* 0: utmi+, 1:ulpi*/ >>> >>> +#ifdef CONFIG_USB_GADGET_DWC2_PHY_8_BIT >>> >>> + |0<<3 /* phy i/f 0:8bit, 1:16bit*/ >>> >>> +#else >>> >>> |1<<3 /* phy i/f 0:8bit, 1:16bit*/ >>> >>> +#endif >>> >>> |0x7<<0; /* HS/FS Timeout**/ >>> >>> >>> Marek, >>> The _only_ thing that I know is that this structure contains settings to >>> make the USB-OTG interface work on Broadcom boards. Broadcom "hardcoded" >>> these values to "utmi+" and "8bit" ("years ago"...), and I am attempting >>> to upstream this change (which I think requires a CONFIG option -- so >>> that I don't break the current usage; unless there is a better method???) >> >> The best method is to pull such configuration from device tree. I don't >> know if DT is used on the BCM28155 chip yet. The acceptable option is to >> add the Kconfig option. >> >>> So what this CONFIG is "called" and what is its "explanation" is >>> completely unknown to me -- hence, I am asking for help in determining >>> what the Kconfig option should actually be.... >> >> Something like "DesignWare USB2.0 HS OTG controller PHY interface width" >> ? The bit which this alters has to be described in the controller >> manual, so just call it the same. > > ( I don't have access to a manual ) Don't you work for broadcom ? You should have a manual for your own chip :) The SoCFPGA has the same core, so look at [1] chapter 18-17. [1] https://www.altera.com/en_US/pdfs/literature/hb/cyclone-v/cv_5v4.pdf > In the kernel, it seems to be defined as: > GUSBCFG_PHYIF8 > GUSBCFG_PHYIF16 >> >> >> btw the Kconfig option should be moved under the DWC2 controller entry, >> something like this will do: > > OK >> >> >> if USB_GADGET_DWC2 >> config USB_GADGET_DWC2_PHY_8_BIT >> ....... >> endif > > I assume you mean USB_GADGET_DWC2_OTG (USB_GADGET_DWC2 does not exist)??? Sure > +if USB_GADGET_DWC2_OTG > + > +config USB_GADGET_DWC2_OTG_PHY_8_BIT > + bool "DesignWare USB2.0 HS OTG controller PHY interface width" > + help > + Set the Designware USB2.0 high-speed OTG controller > + PHY interface width to 8 bits, rather that the default (16 bits). > + > +endif # USB_GADGET_DWC2_OTG > > or USB_GADGET_DWC2_OTG_PHYIF8 Whatever you think makes sense. > or ???? > >> >> >>> Thanks in advance, Steve >>> >>> >>> >>> >>> if (dev->pdata->usb_gusbcfg) >>> >>> diff --git a/include/configs/bcm28155_ap.h >>> b/include/configs/bcm28155_ap.h >>> >>> index 889e5db..e04cfbe 100644 >>> >>> --- a/include/configs/bcm28155_ap.h >>> >>> +++ b/include/configs/bcm28155_ap.h >>> >>> @@ -134,6 +134,7 @@ >>> >>> #define CONFIG_SYS_CACHELINE_SIZE 64 >>> >>> #define CONFIG_FASTBOOT_BUF_SIZE (CONFIG_SYS_SDRAM_SIZE - >>> SZ_1M) >>> >>> #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_SDRAM_BASE >>> >>> +#define CONFIG_USB_GADGET_DWC2_PHY_8_BIT >>> >>> #define CONFIG_USB_GADGET_BCM_UDC_OTG_PHY >>> >>> #define CONFIG_USBID_ADDR 0x34052c46 >>> >>> >>> >>> >>> >> >>> >> >>> >> -- >>> >> Best regards, >>> >> Marek Vasut >>> >>> >>> -- >>> Best regards, >>> Marek Vasut >>> >>> >> >> >> -- >> Best regards, >> Marek Vasut
On 06/06/2016 09:10 PM, Steve Rae wrote: > On Mon, Jun 6, 2016 at 11:58 AM, Steve Rae <steve.rae@broadcom.com> wrote: >> On Mon, Jun 6, 2016 at 10:03 AM, Marek Vasut <marex@denx.de> wrote: >>> >>> On 06/06/2016 06:50 PM, Steve Rae wrote: >>>> >>>> >>>> On Mon, Jun 6, 2016 at 9:30 AM, Marek Vasut <marex@denx.de >>>> <mailto:marex@denx.de>> wrote: >>>> >>>> On 06/06/2016 06:15 PM, Steve Rae wrote: >>>> > On Mon, Jun 6, 2016 at 8:59 AM, Marek Vasut <marex@denx.de <mailto:marex@denx.de>> wrote: >>>> >> >>>> >> On 06/06/2016 05:57 PM, Steve Rae wrote: >>>> >>> Define CONFIG_USB_GADGET_DWC2_PHY_8_BIT to allow the >>>> >>> physical interface to be 8-bit (rather than 16-bit). >>>> >>> >>>> >>> Signed-off-by: Steve Rae <srae@broadcom.com <mailto:srae@broadcom.com>> >>>> >> >>>> >> Can this config option be picked from DT rather than hard-coded by some >>>> >> new ad-hoc config option ? Also, new options should be Kconfig'd . >>>> >> >>>> >> Thanks >>>> >> >>>> > >>>> > Marek, >>>> >>>> Hi, >>>> >>>> > would this be the correct place to add this Kconfig??? >>>> > is the wording sufficient? >>>> > Thanks, Steve >>>> > >>>> > diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig >>>> > index a35a1c7..e957df4 100644 >>>> > --- a/drivers/usb/gadget/Kconfig >>>> > +++ b/drivers/usb/gadget/Kconfig >>>> > @@ -45,20 +45,26 @@ config USB_GADGET_ATMEL_USBA >>>> > >>>> > config USB_GADGET_DWC2_OTG >>>> > bool "DesignWare USB2.0 HS OTG controller (gadget mode)" >>>> > select USB_GADGET_DUALSPEED >>>> > help >>>> > The Designware USB2.0 high-speed gadget controller >>>> > integrated into many SoCs. Select this option if you want the >>>> > driver to operate in Peripheral mode. This option requires >>>> > USB_GADGET to be enabled. >>>> > >>>> > +config USB_GADGET_DWC2_PHY_8_BIT >>>> > + bool "DesignWare USB2.0 controller (gadget mode)" >>>> >>>> This is wrong, right ? >>>> >>>> (see below) >>>> >>>> >>>> > + help >>>> > + Set the Designware USB2.0 high-speed gadget controller >>>> > + to 8-bit mode, rather than the default 16-bit mode. >>>> >>>> You mean 8bit mode ULPI, don't you ? >>>> >>>> (see below) >>>> >>>> >>>> > config CI_UDC >>>> > bool "ChipIdea device controller" >>>> > select USB_GADGET_DUALSPEED >>>> > help >>>> > Say Y here to enable device controller functionality of the >>>> > ChipIdea driver. >>>> > >>>> > config USB_GADGET_VBUS_DRAW >>>> > int "Maximum VBUS Power usage (2-500 mA)" >>>> > range 2 500 >>>> > >>>> >> >>>> >>> --- >>>> >>> >>>> >>> drivers/usb/gadget/dwc2_udc_otg.c | 4 ++++ >>>> >>> include/configs/bcm28155_ap.h | 1 + >>>> >>> 2 files changed, 5 insertions(+) >>>> >>> >>>> >>> diff --git a/drivers/usb/gadget/dwc2_udc_otg.c >>>> b/drivers/usb/gadget/dwc2_udc_otg.c >>>> >>> index cb20b00..a95c8d5 100644 >>>> >>> --- a/drivers/usb/gadget/dwc2_udc_otg.c >>>> >>> +++ b/drivers/usb/gadget/dwc2_udc_otg.c >>>> >>> @@ -415,7 +415,11 @@ static void reconfig_usbd(struct dwc2_udc *dev) >>>> >>> |0<<7 /* Ulpi DDR sel*/ >>>> >>> |0<<6 /* 0: high speed utmi+, 1: full >>>> speed serial*/ >>>> >>> |0<<4 /* 0: utmi+, 1:ulpi*/ >>>> >>> +#ifdef CONFIG_USB_GADGET_DWC2_PHY_8_BIT >>>> >>> + |0<<3 /* phy i/f 0:8bit, 1:16bit*/ >>>> >>> +#else >>>> >>> |1<<3 /* phy i/f 0:8bit, 1:16bit*/ >>>> >>> +#endif >>>> >>> |0x7<<0; /* HS/FS Timeout**/ >>>> >>>> >>>> Marek, >>>> The _only_ thing that I know is that this structure contains settings to >>>> make the USB-OTG interface work on Broadcom boards. Broadcom "hardcoded" >>>> these values to "utmi+" and "8bit" ("years ago"...), and I am attempting >>>> to upstream this change (which I think requires a CONFIG option -- so >>>> that I don't break the current usage; unless there is a better method???) >>> >>> The best method is to pull such configuration from device tree. I don't >>> know if DT is used on the BCM28155 chip yet. The acceptable option is to >>> add the Kconfig option. >>> >>>> So what this CONFIG is "called" and what is its "explanation" is >>>> completely unknown to me -- hence, I am asking for help in determining >>>> what the Kconfig option should actually be.... >>> >>> Something like "DesignWare USB2.0 HS OTG controller PHY interface width" >>> ? The bit which this alters has to be described in the controller >>> manual, so just call it the same. >> >> ( I don't have access to a manual ) >> In the kernel, it seems to be defined as: >> GUSBCFG_PHYIF8 >> GUSBCFG_PHYIF16 >>> >>> >>> btw the Kconfig option should be moved under the DWC2 controller entry, >>> something like this will do: >> >> OK >>> >>> >>> if USB_GADGET_DWC2 >>> config USB_GADGET_DWC2_PHY_8_BIT >>> ....... >>> endif >> >> I assume you mean USB_GADGET_DWC2_OTG (USB_GADGET_DWC2 does not exist)??? >> >> +if USB_GADGET_DWC2_OTG >> + >> +config USB_GADGET_DWC2_OTG_PHY_8_BIT >> + bool "DesignWare USB2.0 HS OTG controller PHY interface width" >> + help >> + Set the Designware USB2.0 high-speed OTG controller >> + PHY interface width to 8 bits, rather that the default (16 bits). >> + >> +endif # USB_GADGET_DWC2_OTG >> >> or USB_GADGET_DWC2_OTG_PHYIF8 >> >> or ???? > > found more defines in the kernel: > > GHWCFG4_UTMI_PHY_DATA_WIDTH_8 > GHWCFG4_UTMI_PHY_DATA_WIDTH_16 > > so maybe: > USB_GADGET_DWC2_OTG_PHY_DATA_WIDTH_8 > Or USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8 Or pick this option from DT, which would be the best. >> >>> >>> >>>> Thanks in advance, Steve >>>> >>>> >>> >>>> >>> if (dev->pdata->usb_gusbcfg) >>>> >>> diff --git a/include/configs/bcm28155_ap.h >>>> b/include/configs/bcm28155_ap.h >>>> >>> index 889e5db..e04cfbe 100644 >>>> >>> --- a/include/configs/bcm28155_ap.h >>>> >>> +++ b/include/configs/bcm28155_ap.h >>>> >>> @@ -134,6 +134,7 @@ >>>> >>> #define CONFIG_SYS_CACHELINE_SIZE 64 >>>> >>> #define CONFIG_FASTBOOT_BUF_SIZE (CONFIG_SYS_SDRAM_SIZE - >>>> SZ_1M) >>>> >>> #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_SDRAM_BASE >>>> >>> +#define CONFIG_USB_GADGET_DWC2_PHY_8_BIT >>>> >>> #define CONFIG_USB_GADGET_BCM_UDC_OTG_PHY >>>> >>> #define CONFIG_USBID_ADDR 0x34052c46 >>>> >>> >>>> >>> >>>> >> >>>> >> >>>> >> -- >>>> >> Best regards, >>>> >> Marek Vasut >>>> >>>> >>>> -- >>>> Best regards, >>>> Marek Vasut >>>> >>>> >>> >>> >>> -- >>> Best regards, >>> Marek Vasut
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig index a35a1c7..e957df4 100644 --- a/drivers/usb/gadget/Kconfig +++ b/drivers/usb/gadget/Kconfig @@ -45,20 +45,26 @@ config USB_GADGET_ATMEL_USBA config USB_GADGET_DWC2_OTG bool "DesignWare USB2.0 HS OTG controller (gadget mode)" select USB_GADGET_DUALSPEED help The Designware USB2.0 high-speed gadget controller integrated into many SoCs. Select this option if you want the driver to operate in Peripheral mode. This option requires USB_GADGET to be enabled. +config USB_GADGET_DWC2_PHY_8_BIT + bool "DesignWare USB2.0 controller (gadget mode)" + help + Set the Designware USB2.0 high-speed gadget controller + to 8-bit mode, rather than the default 16-bit mode. + config CI_UDC bool "ChipIdea device controller" select USB_GADGET_DUALSPEED help Say Y here to enable device controller functionality of the ChipIdea driver. config USB_GADGET_VBUS_DRAW int "Maximum VBUS Power usage (2-500 mA)" range 2 500