diff mbox series

arm64: zynqmp: Add resets property for UART nodes

Message ID 81c602417a5d28dfbce122b2e5a63ff7ddb74594.1721053421.git.michal.simek@amd.com
State Accepted
Commit 1fc7dcc0be752da3c50685f79d10d73aba74a8f6
Delegated to: Michal Simek
Headers show
Series arm64: zynqmp: Add resets property for UART nodes | expand

Commit Message

Michal Simek July 15, 2024, 2:23 p.m. UTC
From: Manikanta Guntupalli <manikanta.guntupalli@amd.com>

Add resets property for UART0 and UART1 nodes

Signed-off-by: Manikanta Guntupalli <manikanta.guntupalli@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
---

 arch/arm/dts/zynqmp.dtsi | 2 ++
 1 file changed, 2 insertions(+)

Comments

Michal Simek July 26, 2024, 8:09 a.m. UTC | #1
On 7/15/24 16:23, Michal Simek wrote:
> From: Manikanta Guntupalli <manikanta.guntupalli@amd.com>
> 
> Add resets property for UART0 and UART1 nodes
> 
> Signed-off-by: Manikanta Guntupalli <manikanta.guntupalli@amd.com>
> Signed-off-by: Michal Simek <michal.simek@amd.com>
> ---
> 
>   arch/arm/dts/zynqmp.dtsi | 2 ++
>   1 file changed, 2 insertions(+)
> 
> diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
> index 34f592c1a85f..6a29f6101534 100644
> --- a/arch/arm/dts/zynqmp.dtsi
> +++ b/arch/arm/dts/zynqmp.dtsi
> @@ -1025,6 +1025,7 @@
>   			reg = <0x0 0xff000000 0x0 0x1000>;
>   			clock-names = "uart_clk", "pclk";
>   			power-domains = <&zynqmp_firmware PD_UART_0>;
> +			resets = <&zynqmp_reset ZYNQMP_RESET_UART0>;
>   		};
>   
>   		uart1: serial@ff010000 {
> @@ -1036,6 +1037,7 @@
>   			reg = <0x0 0xff010000 0x0 0x1000>;
>   			clock-names = "uart_clk", "pclk";
>   			power-domains = <&zynqmp_firmware PD_UART_1>;
> +			resets = <&zynqmp_reset ZYNQMP_RESET_UART1>;
>   		};
>   
>   		usb0: usb@ff9d0000 {

Applied.
M
diff mbox series

Patch

diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 34f592c1a85f..6a29f6101534 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -1025,6 +1025,7 @@ 
 			reg = <0x0 0xff000000 0x0 0x1000>;
 			clock-names = "uart_clk", "pclk";
 			power-domains = <&zynqmp_firmware PD_UART_0>;
+			resets = <&zynqmp_reset ZYNQMP_RESET_UART0>;
 		};
 
 		uart1: serial@ff010000 {
@@ -1036,6 +1037,7 @@ 
 			reg = <0x0 0xff010000 0x0 0x1000>;
 			clock-names = "uart_clk", "pclk";
 			power-domains = <&zynqmp_firmware PD_UART_1>;
+			resets = <&zynqmp_reset ZYNQMP_RESET_UART1>;
 		};
 
 		usb0: usb@ff9d0000 {