From patchwork Wed Feb 23 14:52:02 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 1596760 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=monstr-eu.20210112.gappssmtp.com header.i=@monstr-eu.20210112.gappssmtp.com header.a=rsa-sha256 header.s=20210112 header.b=8G8pm3+g; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4K3fCD4Qdhz9sG7 for ; Thu, 24 Feb 2022 01:52:24 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 4C75A83CA8; Wed, 23 Feb 2022 15:52:21 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=xilinx.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=monstr-eu.20210112.gappssmtp.com header.i=@monstr-eu.20210112.gappssmtp.com header.b="8G8pm3+g"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 52DEF83CA5; Wed, 23 Feb 2022 15:52:19 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,SPF_HELO_NONE,SPF_NONE, T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.2 Received: from mail-ej1-x62b.google.com (mail-ej1-x62b.google.com [IPv6:2a00:1450:4864:20::62b]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 3B3BE83CA8 for ; Wed, 23 Feb 2022 15:52:07 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=xilinx.com Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=monstr@monstr.eu Received: by mail-ej1-x62b.google.com with SMTP id qx21so52844637ejb.13 for ; Wed, 23 Feb 2022 06:52:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monstr-eu.20210112.gappssmtp.com; s=20210112; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=A+fmVnyhPFN16C/Mm0HS/pHd0k/GmkkAZqzZfcuBf0g=; b=8G8pm3+gv1OTpNT5dRJyvxunQlBTaHrZOgiaHUjpP6G9EVJ6xgJHOJS2OMo/l5LHUh GuwFwAmLLjByOv11acvLdW+FE40cY0C4QxD23RtJfnmIby8a3FQgXeOoHIM/rvFZX5Jp qiqt+vY3mtUB5LwGae5aIWg4jVmJqDKZuA+lcKpXQPcqSaZ/h75PyvPTnMMpIoL2t8zr H013rOLMn8jgDX6cUCUei8kSW5hLUvegg5EjsStlTs0fdDjQC3BfvQ9dXExjbB8MPo64 nnmElOJbNv9c6Kr0gyFGbm60fD1lRvau7e7wvs2DHJu4bM+q/jkzLJbjZ1qYtFwSTB86 g+qQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=A+fmVnyhPFN16C/Mm0HS/pHd0k/GmkkAZqzZfcuBf0g=; b=LzCbCVLbLf/LeUaXaIx0N2lsiW2ISjd8chYWZnXeMlK/lbLbeLqKM/b1v/+cPuSSF9 FSdNz8m/0sInCRr5BJccPoghYsQg2bjqNdMuWhudVLyQKYH4N4d2nG7g2/yEH8uB9iZc cS9a6SaeQoNunwUZJw6uyb5fX+KKtFWRdniHBU2OQfY5869t0EBZIi22BlsZmlIQxj+g cYBa9eNgktrjPugKhamRng3QwFWaSxXPvZGi4F2DFVGw/OKMreTg0tmkjrf6BHQO47WZ Ml+PFpdXLgGBrNrPPBcsNADtmeemXm6pw5Iy43hX4vXn8nyxuCgsnIy5JlhLF834Tt8Y CYlg== X-Gm-Message-State: AOAM531N9f/T8OdgOHAHwOq9EAWMD1Jfhg30iCf/fBOGkh6ChGhis/7v kFhBadEfTWjIyLxwO0ztUt7/5lHhXzPR9Q== X-Google-Smtp-Source: ABdhPJyzuiDwit0ZvT+iPDxc/C79NptzhLE0mPNVv34CsvNgjNkokW/VPeg5zeZEsoRRftVMyxPNWA== X-Received: by 2002:a17:906:aad7:b0:6ce:a6e3:9461 with SMTP id kt23-20020a170906aad700b006cea6e39461mr94817ejb.186.1645627926512; Wed, 23 Feb 2022 06:52:06 -0800 (PST) Received: from localhost ([2a02:768:2307:40d6::f9e]) by smtp.gmail.com with ESMTPSA id b5sm11989070edz.13.2022.02.23.06.52.06 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 23 Feb 2022 06:52:06 -0800 (PST) From: Michal Simek To: u-boot@lists.denx.de, git@xilinx.com Cc: Anatolij Gustschin Subject: [PATCH 1/2] video: Add skeleton driver for ZynqMP Display port driver Date: Wed, 23 Feb 2022 15:52:02 +0100 Message-Id: <598cb9515bbabc803f72e287464e3d107cd106a3.1645627920.git.michal.simek@xilinx.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean The reason for this driver is to use call power management driver to enable it in PMUFW. There is missing functionality now but should be added in near future. Signed-off-by: Michal Simek --- drivers/video/Kconfig | 8 +++++ drivers/video/Makefile | 1 + drivers/video/zynqmp_dpsub.c | 66 ++++++++++++++++++++++++++++++++++++ 3 files changed, 75 insertions(+) create mode 100644 drivers/video/zynqmp_dpsub.c diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index ff8e11f6489d..646fec70262c 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -680,6 +680,14 @@ config VIDEO_SEPS525 Enable support for the Syncoam PM-OLED display driver (RGB 160x128). Currently driver is supporting only SPI interface. +config VIDEO_ZYNQMP_DPSUB + bool "Enable video support for ZynqMP Display Port" + depends on DM_VIDEO && ZYNQMP_POWER_DOMAIN + help + Enable support for Xilinx ZynqMP Display Port. Currently this file + is used as placeholder for driver. The main reason is to record + compatible string and calling power domain driver. + source "drivers/video/nexell/Kconfig" config VIDEO diff --git a/drivers/video/Makefile b/drivers/video/Makefile index 4038395b1289..2530791eb43a 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -74,6 +74,7 @@ obj-$(CONFIG_VIDEO_TEGRA20) += tegra.o obj-$(CONFIG_VIDEO_VCXK) += bus_vcxk.o obj-$(CONFIG_VIDEO_VESA) += vesa.o obj-$(CONFIG_VIDEO_SEPS525) += seps525.o +obj-$(CONFIG_VIDEO_ZYNQMP_DPSUB) += zynqmp_dpsub.o obj-y += bridge/ obj-y += sunxi/ diff --git a/drivers/video/zynqmp_dpsub.c b/drivers/video/zynqmp_dpsub.c new file mode 100644 index 000000000000..4ead663cd59f --- /dev/null +++ b/drivers/video/zynqmp_dpsub.c @@ -0,0 +1,66 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2021 Xilinx Inc. + */ + +#include +#include +#include +#include +#include +#include + +#define WIDTH 640 +#define HEIGHT 480 + +/** + * struct zynqmp_dpsub_priv - Private structure + * @dev: Device uclass for video_ops + */ +struct zynqmp_dpsub_priv { + struct udevice *dev; +}; + +static int zynqmp_dpsub_probe(struct udevice *dev) +{ + struct video_priv *uc_priv = dev_get_uclass_priv(dev); + struct zynqmp_dpsub_priv *priv = dev_get_priv(dev); + + uc_priv->bpix = VIDEO_BPP16; + uc_priv->xsize = WIDTH; + uc_priv->ysize = HEIGHT; + uc_priv->rot = 0; + + priv->dev = dev; + + /* Only placeholder for power domain driver */ + return 0; +} + +static int zynqmp_dpsub_bind(struct udevice *dev) +{ + struct video_uc_plat *plat = dev_get_uclass_plat(dev); + + plat->size = WIDTH * HEIGHT * 16; + + return 0; +} + +static const struct video_ops zynqmp_dpsub_ops = { +}; + +static const struct udevice_id zynqmp_dpsub_ids[] = { + { .compatible = "xlnx,zynqmp-dpsub-1.7" }, + { } +}; + +U_BOOT_DRIVER(zynqmp_dpsub_video) = { + .name = "zynqmp_dpsub_video", + .id = UCLASS_VIDEO, + .of_match = zynqmp_dpsub_ids, + .ops = &zynqmp_dpsub_ops, + .plat_auto = sizeof(struct video_uc_plat), + .bind = zynqmp_dpsub_bind, + .probe = zynqmp_dpsub_probe, + .priv_auto = sizeof(struct zynqmp_dpsub_priv), +};