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Mon, 11 Mar 2024 10:23:08 -0700 Received: from xhdcl190040.xilinx.com (10.180.168.240) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35 via Frontend Transport; Mon, 11 Mar 2024 12:23:06 -0500 From: Tejas Bhumkar To: CC: , , , , , Ashok Reddy Soma Subject: [PATCH 04/19] spi: cadence_qspi: Write aligned byte length to ahbbase Date: Mon, 11 Mar 2024 22:52:34 +0530 Message-ID: <205e59ff5e08149e30c40c777ad6a3137825667f.1710098033.git.tejas.arvind.bhumkar@amd.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: References: MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS2PEPF00003439:EE_|CH2PR12MB4214:EE_ X-MS-Office365-Filtering-Correlation-Id: 021e5cca-e8be-454c-7858-08dc41efec76 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: z1T3ndU4JcfNj4uSo/cFzF0sTvqsZeIXSPm9jU/9ATIpKHOhF/uob0bnDyAOpjFw41rqeD6oPtmsNdwrOfAqV05HTTopcndb3ZSvpt0pkHZfELgFoD3+iIDaA5nggUFzlzYyrSV50cJW8LGCwWGZx+Or45fd7vlZmdFJoMXAdNZtGZbJznGv7QuBB1fVZb8O6bXSI4zdNmZqd6XCo70kPOs0A8EK8wxYRsbKgnbmNTbHfbUtyqqXOZ777stis64cjfSRUydp0hBlXNjnozNzwN4DWIp8JTvrk6Iex/VHNlq8wo3I/q2b99Z92Lu1E5Q6Y1rsymdgXHx2v8G1uYkQyJrc6uLve9SG25n/wBUvMlM2ee971MHAewdxKdC5N6xEWvorqAodewRLpvxBAb3PiM1f7qjtP5dgiumL9v4irprfYm1yK77pIlAy7BLDnMWYokWhDXLsV+54yZOZFGw7ulLDuEgblErNfVuC+eU8ba6w//0uBdDi6xdii6ot4D/MCOi2MMa/yVxMGRylBTHhwtS0BBSpmI4TJy+0O3J+Glx5e6M5xcSurCq8SmVn+AUWueHvEggYfChcQOZ4/3h7mUtaBgUEmCZm0N/ZSFWrO6fNC4AtzAKGOtz8clYJt2FYuo4mo050KwVRSXPdNTaThbx4Q0SMprnD/Fs74E8OZvoCQUjsYrTkACmAQBUURt5u1cdTVigmDDOR8UYp4hDa+HUkq7ao8nDsR/X/wXTlQLA/tndXeHzJZyYKpqhQLs8q X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB03.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230031)(1800799015)(82310400014)(376005)(36860700004); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Mar 2024 17:23:09.9006 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 021e5cca-e8be-454c-7858-08dc41efec76 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS2PEPF00003439.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB4214 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean From: Ashok Reddy Soma Incase of non-aligned length of flash data, ahbbase address is written directly with byte count. This is causing AHB bus error's sometimes and resulting in kernel crash while booting linux. To avoid this write 4 byte aligned byte count to ahbbase address. Also use a temporary variable with 0xffffffff data and overwrite this temp with unaligned bytes data before writing to ahbbase. The value 0xffffffff is chosen as this is flash memory, worst case we will write 0xff to any location which doesn't effect any bits. Signed-off-by: Ashok Reddy Soma Signed-off-by: Tejas Bhumkar --- drivers/spi/cadence_qspi_apb.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c index 4404b0ba07..7576dacfb0 100644 --- a/drivers/spi/cadence_qspi_apb.c +++ b/drivers/spi/cadence_qspi_apb.c @@ -891,10 +891,12 @@ cadence_qspi_apb_indirect_write_execute(struct cadence_spi_priv *priv, while (remaining > 0) { write_bytes = remaining > page_size ? page_size : remaining; writesl(priv->ahbbase, bb_txbuf, write_bytes >> 2); - if (write_bytes % 4) - writesb(priv->ahbbase, - bb_txbuf + rounddown(write_bytes, 4), - write_bytes % 4); + if (write_bytes % 4) { + unsigned int temp = 0xffffffff; + + memcpy(&temp, bb_txbuf + rounddown(write_bytes, 4), write_bytes % 4); + writel(temp, priv->ahbbase); + } ret = wait_for_bit_le32(priv->regbase + CQSPI_REG_SDRAMLEVEL, CQSPI_REG_SDRAMLEVEL_WR_MASK <<