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[59.124.168.89]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e92fa25742sm1011948a91.19.2024.10.30.00.58.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Oct 2024 00:58:41 -0700 (PDT) From: Nick Hu To: trini@konsulko.com, u-boot@lists.denx.de, greentime.hu@sifive.com, zong.li@sifive.com Cc: Nick Hu Subject: [PATCH] driver: sifive ccache: enable TRUNKCLOCKGATE and REGIONCLOCKGATE Date: Wed, 30 Oct 2024 15:58:36 +0800 Message-Id: <20241030075836.3292824-1-nick.hu@sifive.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Enable the clock gating bit of ccache when the platform has the ccache0. Signed-off-by: Nick Hu Reviewed-by: Leo Yu-Chi Liang --- drivers/cache/cache-sifive-ccache.c | 33 ++++++++++++++++++++++++++--- 1 file changed, 30 insertions(+), 3 deletions(-) diff --git a/drivers/cache/cache-sifive-ccache.c b/drivers/cache/cache-sifive-ccache.c index cc00b80f60b..2ff5ca701d6 100644 --- a/drivers/cache/cache-sifive-ccache.c +++ b/drivers/cache/cache-sifive-ccache.c @@ -14,8 +14,17 @@ #define SIFIVE_CCACHE_WAY_ENABLE 0x008 +#define SIFIVE_CCACHE_TRUNKCLOCKGATE 0x1000 +#define SIFIVE_CCACHE_TRUNKCLOCKGATE_DISABLE BIT(0) +#define SIFIVE_CCACHE_REGIONCLOCKGATE_DISABLE BIT(1) + struct sifive_ccache { void __iomem *base; + bool has_cg; +}; + +struct sifive_ccache_quirks { + bool has_cg; }; static int sifive_ccache_enable(struct udevice *dev) @@ -30,6 +39,14 @@ static int sifive_ccache_enable(struct udevice *dev) writel(ways - 1, priv->base + SIFIVE_CCACHE_WAY_ENABLE); + if (priv->has_cg) { + /* enable clock gating bits */ + config = readl(priv->base + SIFIVE_CCACHE_TRUNKCLOCKGATE); + config &= ~(SIFIVE_CCACHE_TRUNKCLOCKGATE_DISABLE | + SIFIVE_CCACHE_REGIONCLOCKGATE_DISABLE); + writel(config, priv->base + SIFIVE_CCACHE_TRUNKCLOCKGATE); + } + return 0; } @@ -50,7 +67,9 @@ static const struct cache_ops sifive_ccache_ops = { static int sifive_ccache_probe(struct udevice *dev) { struct sifive_ccache *priv = dev_get_priv(dev); + const struct sifive_ccache_quirks *quirk = (void *)dev_get_driver_data(dev); + priv->has_cg = quirk->has_cg; priv->base = dev_read_addr_ptr(dev); if (!priv->base) return -EINVAL; @@ -58,10 +77,18 @@ static int sifive_ccache_probe(struct udevice *dev) return 0; } +static const struct sifive_ccache_quirks fu540_ccache = { + .has_cg = false, +}; + +static const struct sifive_ccache_quirks ccache0 = { + .has_cg = true, +}; + static const struct udevice_id sifive_ccache_ids[] = { - { .compatible = "sifive,fu540-c000-ccache" }, - { .compatible = "sifive,fu740-c000-ccache" }, - { .compatible = "sifive,ccache0" }, + { .compatible = "sifive,fu540-c000-ccache", .data = (ulong)&fu540_ccache }, + { .compatible = "sifive,fu740-c000-ccache", .data = (ulong)&fu540_ccache }, + { .compatible = "sifive,ccache0", .data = (ulong)&ccache0 }, {} };