diff mbox series

[v2,1/2] imx9: clock: Add 800MHz fracpll entry

Message ID 20241023-imx93qsb-v2-1-1843ab1a4d5a@nxp.com
State Accepted
Commit 73725363090eba72d8c30cf458851f67ad3b5b36
Delegated to: Fabio Estevam
Headers show
Series imx: Add i.MX93 9x9 QSB board | expand

Commit Message

Peng Fan (OSS) Oct. 23, 2024, 4:03 a.m. UTC 
From: Peng Fan <peng.fan@nxp.com>

Add 800MHz fracpll entry to support DDR 3200MTS.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm/mach-imx/imx9/clock.c | 1 +
 1 file changed, 1 insertion(+)

Comments

Fabio Estevam Oct. 25, 2024, 2:48 p.m. UTC | #1 
On Tue, Oct 22, 2024 at 11:59 PM Peng Fan (OSS) <peng.fan@oss.nxp.com> wrote:
>
> From: Peng Fan <peng.fan@nxp.com>
>
> Add 800MHz fracpll entry to support DDR 3200MTS.
>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>

Applied all, thanks.
diff mbox series

Patch

diff --git a/arch/arm/mach-imx/imx9/clock.c b/arch/arm/mach-imx/imx9/clock.c
index dda57ed7f55170e34cad73d93aa3be654f5f071e..c00be19c4fa9c60f480ddff1da0a2df9261ace46 100644
--- a/arch/arm/mach-imx/imx9/clock.c
+++ b/arch/arm/mach-imx/imx9/clock.c
@@ -35,6 +35,7 @@  static struct imx_intpll_rate_table imx9_intpll_tbl[] = {
 static struct imx_fracpll_rate_table imx9_fracpll_tbl[] = {
 	FRAC_PLL_RATE(1000000000U, 1, 166, 4, 2, 3), /* 1000Mhz */
 	FRAC_PLL_RATE(933000000U, 1, 155, 4, 1, 2), /* 933Mhz */
+	FRAC_PLL_RATE(800000000U, 1, 200, 6, 0, 1), /* 800Mhz */
 	FRAC_PLL_RATE(700000000U, 1, 145, 5, 5, 6), /* 700Mhz */
 	FRAC_PLL_RATE(484000000U, 1, 121, 6, 0, 1),
 	FRAC_PLL_RATE(445333333U, 1, 167, 9, 0, 1),