| Message ID | 20240919144507.249682-1-konnorrigby@gmail.com |
|---|---|
| State | Rejected |
| Delegated to: | Fabio Estevam |
| Headers | show |
| Series | arm: imx: fix board_mmc_init for google coral | expand |
Hi Connor, (Adding the list bak on Cc) On Thu, Sep 19, 2024 at 12:55 PM Connor Rigby <konnorrigby@gmail.com> wrote: > > Looks like latest does in fact work as you say. Sorry for the noise, should have checked this first! > > U-Boot 2024.10-rc5 (Aug 30 2024 - 18:42:43 +0000) > > CPU: Freescale i.MX8MQ rev2.0 at 1000 MHz > Reset cause: POR > Model: Google i.MX8MQ Phanbell > DRAM: 1 GiB > Core: 67 devices, 18 uclasses, devicetree: separate > MMC: FSL_SDHC: 0, FSL_SDHC: 1 Ok, great. I'm glad it is working.
diff --git a/board/google/imx8mq_phanbell/spl.c b/board/google/imx8mq_phanbell/spl.c index cfba9300dc..2786584eed 100644 --- a/board/google/imx8mq_phanbell/spl.c +++ b/board/google/imx8mq_phanbell/spl.c @@ -101,7 +101,7 @@ int board_mmc_init(struct bd_info *bis) switch (i) { case 0: init_clk_usdhc(0); - usdhc_cfg[0].sdhc_clk = mxc_get_clock(USDHC1_CLK_ROOT); + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); usdhc_cfg[0].max_bus_width = 8; imx_iomux_v3_setup_multiple_pads(usdhc1_pads, ARRAY_SIZE(usdhc1_pads)); @@ -112,7 +112,7 @@ int board_mmc_init(struct bd_info *bis) break; case 1: init_clk_usdhc(1); - usdhc_cfg[1].sdhc_clk = mxc_get_clock(USDHC2_CLK_ROOT); + usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); usdhc_cfg[1].max_bus_width = 4; imx_iomux_v3_setup_multiple_pads(usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
This fixes a typo in the mxc_get_clock function preventing SPL from initializing USDHC1 and USDHC2. Signed-off-by: Connor Rigby <konnorrigby@gmail.com> --- board/google/imx8mq_phanbell/spl.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)