From patchwork Thu Sep 19 03:55:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Maniyam, Dinesh" X-Patchwork-Id: 1987152 X-Patchwork-Delegate: dario.binacchi@amarulasolutions.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=S7nL9Ex4; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4X8MCW5M0Dz1y2j for ; Thu, 19 Sep 2024 13:56:55 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id A134C8909B; Thu, 19 Sep 2024 05:56:06 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="S7nL9Ex4"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 837158904E; Thu, 19 Sep 2024 05:56:05 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED,RCVD_IN_VALIDITY_RPBL_BLOCKED, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 597B68901A for ; Thu, 19 Sep 2024 05:56:01 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=dinesh.maniyam@intel.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1726718161; x=1758254161; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=rI5GmtRZL57cEU+XQ47zIsv3lb1MJoI0qBmWDQz12Rs=; b=S7nL9Ex4Q0pRiwUks8GoZjPsq3vsNOz11WSD067Tcvq5e/17z3OIrojR WssPN0YkujKduevMRmjArgmIgnvdnI47zCnusqV23Yn1TaC0W0rSBiZvT Rq+VHdDXNn0jyU4/hirzeZSVa52vJ3GA4vZJ1yaIqvVhIcwSMWZ3eb7EG Ktt2V/bsZXGbZUzSccuhRmv8zv2W2kEpW9wyXHJqBT5DRGjTeRYBZfZxy uzIcPfIEIwN7pyMZNSf0y9asulwwcwxam3lPTvQLBDX1mQfpXXkQOvpCt mK/9ZBAEqoKNMV6ckNqyKqJ18bZUTuekAbHt5MV0Iag0i7dtF3u9MvpPi Q==; X-CSE-ConnectionGUID: xLvc54HiRnGhVSOgCMoTTw== X-CSE-MsgGUID: zi1g95GZRnebcGpjpEiX3g== X-IronPort-AV: E=McAfee;i="6700,10204,11199"; a="43178016" X-IronPort-AV: E=Sophos;i="6.10,240,1719903600"; d="scan'208";a="43178016" Received: from orviesa007.jf.intel.com ([10.64.159.147]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Sep 2024 20:56:00 -0700 X-CSE-ConnectionGUID: vD4BPJbFS2aD/OS4VaH5kw== X-CSE-MsgGUID: g1BkiwsBRVG964jqFLiXWg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,240,1719903600"; d="scan'208";a="70253744" Received: from pglc00481.png.intel.com ([10.221.239.164]) by orviesa007.jf.intel.com with ESMTP; 18 Sep 2024 20:55:55 -0700 From: dinesh.maniyam@intel.com To: u-boot@lists.denx.de Cc: Marek , Simon , Tom Rini , Dario Binacchi , Michael Trimarchi , Johan Jonker , Michal Simek , Arseniy Krasnov , Alexander Dahl , William Zhang , Igor Prusov , Tien Fong , Kok Kiang , Dinesh , Boon Khai , Alif , Teik Heng , Hazim , Tingting Meng , Jit Loon Lim , Sieu Mun Tang Subject: [PATCH 07/19] drivers: mtd: nand: cadence: Add support for NAND_CMD_PARAM Date: Thu, 19 Sep 2024 11:55:00 +0800 Message-Id: <20240919035512.13854-8-dinesh.maniyam@intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20240919035512.13854-1-dinesh.maniyam@intel.com> References: <20240919035512.13854-1-dinesh.maniyam@intel.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean From: Dinesh Maniyam This patch is to add support for reading param page of NAND device. These paramaters are unique and used for identification purpose. Signed-off-by: Dinesh Maniyam --- drivers/mtd/nand/raw/cadence_nand.c | 30 +++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/drivers/mtd/nand/raw/cadence_nand.c b/drivers/mtd/nand/raw/cadence_nand.c index 55fd3dfdb3..1b5cda1955 100644 --- a/drivers/mtd/nand/raw/cadence_nand.c +++ b/drivers/mtd/nand/raw/cadence_nand.c @@ -1940,6 +1940,31 @@ static int cadence_nand_readid(struct mtd_info *mtd, int offset_in_page, unsigne return 0; } +static int cadence_nand_param(struct mtd_info *mtd, u8 offset_in_page, unsigned int command) +{ + struct cadence_nand_info *cadence = mtd_to_cadence(mtd); + struct nand_chip *chip = mtd_to_nand(mtd); + int ret = 0; + + ret = cadence_nand_cmd_opcode(cadence, command); + if (ret) + return ret; + + ret = cadence_nand_cmd_address(cadence, ONE_CYCLE, &offset_in_page); + if (ret) + return ret; + + ret = cadence_nand_waitfunc(mtd, chip); + if (ret) + return ret; + + ret = cadence_nand_cmd_data(cadence, sizeof(struct nand_jedec_params), GCMD_DIR_READ); + if (ret) + return ret; + + return 0; +} + static void cadence_nand_cmdfunc(struct mtd_info *mtd, unsigned int command, int offset_in_page, int page) { @@ -1956,6 +1981,9 @@ static void cadence_nand_cmdfunc(struct mtd_info *mtd, unsigned int command, ret = cadence_nand_readid(mtd, offset_in_page, command); break; + case NAND_CMD_PARAM: + ret = cadence_nand_param(mtd, offset_in_page, command); + break; /* * ecc will override other command for read, write and erase */ @@ -1988,6 +2016,8 @@ static u8 cadence_nand_read_byte(struct mtd_info *mtd) if (cadence->buf_index == 0) { if (cadence->cmd == NAND_CMD_READID) size = 8; + else if (cadence->cmd == NAND_CMD_PARAM) + size = sizeof(struct nand_jedec_params); cadence_nand_read_buf(mtd, &cadence->buf[0], size); }