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Mon, 26 Aug 2024 18:49:12 +0200 (CEST) Received: from llp-Hahn.hahn.test (172.25.0.11) by Berlix.phytec.de (172.25.0.12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.6; Mon, 26 Aug 2024 18:49:11 +0200 From: Benjamin Hahn Date: Mon, 26 Aug 2024 18:49:06 +0200 Subject: [PATCH 2/2] board: phytec: phycore_imx8mp: Add mtd spi partitions MIME-Version: 1.0 Message-ID: <20240826-wip-bhahn-add_qspi_support-v1-2-0ea7840b940a@phytec.de> References: <20240826-wip-bhahn-add_qspi_support-v1-0-0ea7840b940a@phytec.de> In-Reply-To: <20240826-wip-bhahn-add_qspi_support-v1-0-0ea7840b940a@phytec.de> To: Teresa Remmet , Yannic Moog , Tom Rini CC: , , Benjamin Hahn X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1724690951; l=2782; i=B.Hahn@phytec.de; s=20240126; h=from:subject:message-id; bh=XU0dQoorOCHAv/br+1zcpBOotCDqoq+TgDBt9WbWluE=; b=PZWRJIDi1hU0w2dYKyVAXo5sADY2758qM1oW9A/aoE0Eqg/3s+YBo9eRLCDgyiUEp5/mF2Jwv b6UOSg9Xz+1D8eg9AlWli7Iu+OvGS6dSRql24De+LY1mt2wlDIXOOMm X-Developer-Key: i=B.Hahn@phytec.de; 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For this we have to also probe the flash before booting. Signed-off-by: Benjamin Hahn --- board/phytec/phycore_imx8mp/phycore-imx8mp.c | 34 ++++++++++++++++++++++++++ board/phytec/phycore_imx8mp/phycore_imx8mp.env | 4 +++ 2 files changed, 38 insertions(+) diff --git a/board/phytec/phycore_imx8mp/phycore-imx8mp.c b/board/phytec/phycore_imx8mp/phycore-imx8mp.c index ef9513618449..bf2d5ce01fa5 100644 --- a/board/phytec/phycore_imx8mp/phycore-imx8mp.c +++ b/board/phytec/phycore_imx8mp/phycore-imx8mp.c @@ -10,10 +10,34 @@ #include #include #include +#include +#include #include +#include + +#include "../common/imx8m_som_detection.h" DECLARE_GLOBAL_DATA_PTR; +#define EEPROM_ADDR 0x51 +#define EEPROM_ADDR_FALLBACK 0x59 + +int ft_board_setup(void *blob, struct bd_info *bd) +{ + u8 spi = phytec_get_imx8m_spi(NULL); + /* Do nothing if no SPI is populated */ + if (!spi) + return 0; + + static const struct node_info nodes[] = { + { "jedec,spi-nor", MTD_DEV_TYPE_NOR, }, + }; + + fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes)); + + return 0; +} + static int setup_fec(void) { struct iomuxc_gpr_base_regs *gpr = @@ -27,6 +51,11 @@ static int setup_fec(void) int board_init(void) { + int ret = phytec_eeprom_data_setup_fallback(NULL, 0, + EEPROM_ADDR, EEPROM_ADDR_FALLBACK); + if (ret) + printf("%s: EEPROM data init failed\n", __func__); + setup_fec(); return 0; @@ -39,6 +68,11 @@ int board_mmc_get_env_dev(int devno) int board_late_init(void) { + u8 spi = phytec_get_imx8m_spi(NULL); + + if (spi != 0 && spi != PHYTEC_EEPROM_INVAL) + env_set("spiprobe", "sf probe"); + switch (get_boot_device()) { case SD2_BOOT: env_set_ulong("mmcdev", 1); diff --git a/board/phytec/phycore_imx8mp/phycore_imx8mp.env b/board/phytec/phycore_imx8mp/phycore_imx8mp.env index f8f878e8f3a6..e5b49756132a 100644 --- a/board/phytec/phycore_imx8mp/phycore_imx8mp.env +++ b/board/phytec/phycore_imx8mp/phycore_imx8mp.env @@ -7,6 +7,7 @@ bootcmd= fi; mmc dev ${mmcdev}; if mmc rescan; then + run spiprobe; if test ${doraucboot} = 1; then run raucinit; fi; @@ -27,6 +28,9 @@ fdt_addr_r=0x48000000 fdtfile=CONFIG_DEFAULT_FDT_FILE image=Image ip_dyn=yes +mtdparts=30bb0000.spi:3840k(u-boot),128k(env),128k(env_redund),-(none) +mtdids=nor0=30bb0000.spi +spiprobe=true loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile} loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image} mmcargs=