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[1/2] arm64: dts: rockchip: add (but disabled) SFC node for Radxa ROCK 5A

Message ID 20240816212049.500-1-naoki@radxa.com
State Superseded
Delegated to: Kever Yang
Headers show
Series [1/2] arm64: dts: rockchip: add (but disabled) SFC node for Radxa ROCK 5A | expand

Commit Message

FUKAUMI Naoki Aug. 16, 2024, 9:20 p.m. UTC 
This commit adds SFC node for Radxa ROCK 5A.

since sdhci and sfc on RK3588s share pins(i.e. exclusive), it cannot
be enabled both nodes at the same time. so status = "okay" is omitted
here.

you may be able to enable sfc (and disable sdhci) by fdt overlay.

SPI NOR flash chip may vary, so use safe(lowest) spi-max-frequency.

Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Link: https://lore.kernel.org/r/20240623023329.1044-2-naoki@radxa.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

[ upstream commit: 00224650dd45e166ea6eb1593f5f064583963ccf ]

(cherry picked from commit fde218de3133705f3f56dc8eb26baa878f0e0dc9)
---
 dts/upstream/src/arm64/rockchip/rk3588s-rock-5a.dts | 13 +++++++++++++
 1 file changed, 13 insertions(+)
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Patch

diff --git a/dts/upstream/src/arm64/rockchip/rk3588s-rock-5a.dts b/dts/upstream/src/arm64/rockchip/rk3588s-rock-5a.dts
index 3b9a349362d..2e2f7f0e769 100644
--- a/dts/upstream/src/arm64/rockchip/rk3588s-rock-5a.dts
+++ b/dts/upstream/src/arm64/rockchip/rk3588s-rock-5a.dts
@@ -377,6 +377,19 @@ 
 	status = "okay";
 };
 
+&sfc {
+	pinctrl-names = "default";
+	pinctrl-0 = <&fspim0_pins>;
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <104000000>;
+		spi-rx-bus-width = <4>;
+		spi-tx-bus-width = <1>;
+	};
+};
+
 &spi2 {
 	status = "okay";
 	assigned-clocks = <&cru CLK_SPI2>;