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[187.190.205.45]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-7008a5a34c9sm338654a34.73.2024.06.19.14.28.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Jun 2024 14:28:07 -0700 (PDT) From: Tom Rini To: u-boot@lists.denx.de Cc: Heinrich Schuchardt , Ilias Apalodimas Subject: [PATCH 5/7] powerpc: Implement a default flush_dcache_all Date: Wed, 19 Jun 2024 15:27:57 -0600 Message-Id: <20240619212759.3456158-5-trini@konsulko.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240619212759.3456158-1-trini@konsulko.com> References: <20240619212759.3456158-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Implement a weak default version of flush_dcache_all which is based on the ARM default, which is to flush the entire range via flush_dcache_range(...). Signed-off-by: Tom Rini Acked-by: Ilias Apalodimas --- arch/powerpc/lib/cache.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/powerpc/lib/cache.c b/arch/powerpc/lib/cache.c index e480b2696494..130318d745aa 100644 --- a/arch/powerpc/lib/cache.c +++ b/arch/powerpc/lib/cache.c @@ -43,3 +43,12 @@ void flush_cache(ulong start_addr, ulong size) /* flush prefetch queue */ asm volatile("isync" : : : "memory"); } + +/* + * Default implementation: + * do a range flush for the entire range + */ +void flush_dcache_all(void) +{ + flush_dcache_range(0, ~0); +}