| Message ID | 20240619212759.3456158-3-trini@konsulko.com |
|---|---|
| State | Accepted |
| Commit | be9f4ff58567420e470f2f0eccda41347747c8f5 |
| Delegated to: | Tom Rini |
| Headers | show |
| Series | [1/7] m68k: Implement a default flush_dcache_all | expand |
On Thu, 20 Jun 2024 at 00:28, Tom Rini <trini@konsulko.com> wrote: > > Implement a weak default version of flush_dcache_all which is based on > the ARM default, which is to flush the entire range via > flush_dcache_range(...). > > Signed-off-by: Tom Rini <trini@konsulko.com> > --- > Cc: Marek Vasut <marex@denx.de> > Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> > --- > arch/sh/cpu/sh4/cache.c | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/arch/sh/cpu/sh4/cache.c b/arch/sh/cpu/sh4/cache.c > index 8c1839935ca1..f0cb39d6a923 100644 > --- a/arch/sh/cpu/sh4/cache.c > +++ b/arch/sh/cpu/sh4/cache.c > @@ -65,6 +65,15 @@ void flush_dcache_range(unsigned long start, unsigned long end) > } > } > > +/* > + * Default implementation: > + * do a range flush for the entire range > + */ > +void flush_dcache_all(void) > +{ > + flush_dcache_range(0, ~0); > +} > + > void invalidate_dcache_range(unsigned long start, unsigned long end) > { > u32 v; > -- > 2.34.1 > Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
On 6/19/24 11:27 PM, Tom Rini wrote: > Implement a weak default version of flush_dcache_all which is based on > the ARM default, which is to flush the entire range via > flush_dcache_range(...). > > Signed-off-by: Tom Rini <trini@konsulko.com> > --- > Cc: Marek Vasut <marex@denx.de> > Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> > --- > arch/sh/cpu/sh4/cache.c | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/arch/sh/cpu/sh4/cache.c b/arch/sh/cpu/sh4/cache.c > index 8c1839935ca1..f0cb39d6a923 100644 > --- a/arch/sh/cpu/sh4/cache.c > +++ b/arch/sh/cpu/sh4/cache.c > @@ -65,6 +65,15 @@ void flush_dcache_range(unsigned long start, unsigned long end) > } > } > > +/* > + * Default implementation: > + * do a range flush for the entire range > + */ > +void flush_dcache_all(void) > +{ > + flush_dcache_range(0, ~0); > +} The current implementation that is in tree should be fine, thanks.
diff --git a/arch/sh/cpu/sh4/cache.c b/arch/sh/cpu/sh4/cache.c index 8c1839935ca1..f0cb39d6a923 100644 --- a/arch/sh/cpu/sh4/cache.c +++ b/arch/sh/cpu/sh4/cache.c @@ -65,6 +65,15 @@ void flush_dcache_range(unsigned long start, unsigned long end) } } +/* + * Default implementation: + * do a range flush for the entire range + */ +void flush_dcache_all(void) +{ + flush_dcache_range(0, ~0); +} + void invalidate_dcache_range(unsigned long start, unsigned long end) { u32 v;
Implement a weak default version of flush_dcache_all which is based on the ARM default, which is to flush the entire range via flush_dcache_range(...). Signed-off-by: Tom Rini <trini@konsulko.com> --- Cc: Marek Vasut <marex@denx.de> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> --- arch/sh/cpu/sh4/cache.c | 9 +++++++++ 1 file changed, 9 insertions(+)