From patchwork Tue Jun 18 01:05:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: FUKAUMI Naoki X-Patchwork-Id: 1948926 X-Patchwork-Delegate: ykai007@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4W37qn0g1fz20KL for ; Tue, 18 Jun 2024 11:06:29 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 5700688431; Tue, 18 Jun 2024 03:06:14 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=radxa.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id C27C8882D4; Tue, 18 Jun 2024 03:06:11 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.8 required=5.0 tests=BAYES_00,KHOP_HELO_FCRDNS, RCVD_IN_VALIDITY_RPBL_BLOCKED,RCVD_IN_VALIDITY_SAFE_BLOCKED, SPF_HELO_NONE,SPF_SOFTFAIL,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.2 Received: from mail.naobsd.org (sakura.naobsd.org [160.16.200.221]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id D112988402 for ; Tue, 18 Jun 2024 03:06:07 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=radxa.com Authentication-Results: phobos.denx.de; spf=fail smtp.mailfrom=naoki@radxa.com Received: from secure.fukaumi.org ([10.0.0.2]) by mail.naobsd.org (8.14.4/8.14.4/Debian-4.1ubuntu1.1) with ESMTP id 45I15sTu019913; Tue, 18 Jun 2024 10:05:54 +0900 From: FUKAUMI Naoki To: u-boot@lists.denx.de Cc: trini@konsulko.com, sjg@chromium.org, philipp.tomsich@vrull.eu, kever.yang@rock-chips.com, andy.yan@rock-chips.com, gajjar04akash@gmail.com, jonas@kwiboo.se, FUKAUMI Naoki Subject: [PATCH 1/3] configs: rockchip: cosmetic changes for rk3308, rk3328, rk3399, rk3568, and rk3588 Date: Tue, 18 Jun 2024 10:05:46 +0900 Message-ID: <20240618010548.1379-1-naoki@radxa.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean no functional change is intended. Signed-off-by: FUKAUMI Naoki --- include/configs/rk3308_common.h | 26 ++++++++++----------- include/configs/rk3328_common.h | 28 +++++++++++------------ include/configs/rk3399_common.h | 40 ++++++++++++++++----------------- include/configs/rk3568_common.h | 14 ++++++------ include/configs/rk3588_common.h | 12 +++++----- 5 files changed, 60 insertions(+), 60 deletions(-) diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h index 861154fbeb..80113220e4 100644 --- a/include/configs/rk3308_common.h +++ b/include/configs/rk3308_common.h @@ -8,24 +8,24 @@ #include "rockchip-common.h" -#define CFG_IRAM_BASE 0xfff80000 +#define CFG_IRAM_BASE 0xfff80000 #define CFG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xff000000 -#define ENV_MEM_LAYOUT_SETTINGS \ - "scriptaddr=0x00500000\0" \ - "pxefile_addr_r=0x00600000\0" \ - "fdt_addr_r=0x03e00000\0" \ - "fdtoverlay_addr_r=0x03f00000\0" \ - "kernel_addr_r=0x00680000\0" \ +#define ENV_MEM_LAYOUT_SETTINGS \ + "scriptaddr=0x00500000\0" \ + "pxefile_addr_r=0x00600000\0" \ + "fdt_addr_r=0x03e00000\0" \ + "fdtoverlay_addr_r=0x03f00000\0" \ + "kernel_addr_r=0x00680000\0" \ "ramdisk_addr_r=0x04000000\0" -#define CFG_EXTRA_ENV_SETTINGS \ - "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ - ENV_MEM_LAYOUT_SETTINGS \ - "partitions=" PARTS_DEFAULT \ - ROCKCHIP_DEVICE_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ + "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ + "partitions=" PARTS_DEFAULT \ + ENV_MEM_LAYOUT_SETTINGS \ + ROCKCHIP_DEVICE_SETTINGS \ "boot_targets=" BOOT_TARGETS "\0" -#endif +#endif /* __CONFIG_RK3308_COMMON_H */ diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h index 2c40674b22..f9e6634c5f 100644 --- a/include/configs/rk3328_common.h +++ b/include/configs/rk3328_common.h @@ -8,25 +8,25 @@ #include "rockchip-common.h" -#define CFG_IRAM_BASE 0xff090000 +#define CFG_IRAM_BASE 0xff090000 #define CFG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xff000000 -#define ENV_MEM_LAYOUT_SETTINGS \ - "scriptaddr=0x00500000\0" \ - "pxefile_addr_r=0x00600000\0" \ - "fdt_addr_r=0x01f00000\0" \ - "kernel_addr_r=0x02080000\0" \ - "ramdisk_addr_r=0x06000000\0" \ - "kernel_comp_addr_r=0x08000000\0" \ +#define ENV_MEM_LAYOUT_SETTINGS \ + "scriptaddr=0x00500000\0" \ + "pxefile_addr_r=0x00600000\0" \ + "fdt_addr_r=0x01f00000\0" \ + "kernel_addr_r=0x02080000\0" \ + "ramdisk_addr_r=0x06000000\0" \ + "kernel_comp_addr_r=0x08000000\0" \ "kernel_comp_size=0x2000000\0" -#define CFG_EXTRA_ENV_SETTINGS \ - ENV_MEM_LAYOUT_SETTINGS \ - "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ - "partitions=" PARTS_DEFAULT \ - ROCKCHIP_DEVICE_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ + "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ + "partitions=" PARTS_DEFAULT \ + ENV_MEM_LAYOUT_SETTINGS \ + ROCKCHIP_DEVICE_SETTINGS \ "boot_targets=" BOOT_TARGETS "\0" -#endif +#endif /* __CONFIG_RK3328_COMMON_H */ diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index 4e75771055..62007c8b27 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -8,36 +8,36 @@ #include "rockchip-common.h" -#define CFG_IRAM_BASE 0xff8c0000 +#define CFG_IRAM_BASE 0xff8c0000 #define CFG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xf8000000 #ifndef CONFIG_SPL_BUILD -#define ENV_MEM_LAYOUT_SETTINGS \ - "scriptaddr=0x00500000\0" \ - "script_offset_f=0xffe000\0" \ - "script_size_f=0x2000\0" \ - "pxefile_addr_r=0x00600000\0" \ - "fdt_addr_r=0x01f00000\0" \ - "fdtoverlay_addr_r=0x02000000\0" \ - "kernel_addr_r=0x02080000\0" \ - "ramdisk_addr_r=0x06000000\0" \ - "kernel_comp_addr_r=0x08000000\0" \ - "kernel_comp_size=0x2000000\0" - #ifndef ROCKCHIP_DEVICE_SETTINGS #define ROCKCHIP_DEVICE_SETTINGS #endif -#define CFG_EXTRA_ENV_SETTINGS \ - ENV_MEM_LAYOUT_SETTINGS \ - "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ - "partitions=" PARTS_DEFAULT \ - ROCKCHIP_DEVICE_SETTINGS \ +#define ENV_MEM_LAYOUT_SETTINGS \ + "scriptaddr=0x00500000\0" \ + "script_offset_f=0xffe000\0" \ + "script_size_f=0x2000\0" \ + "pxefile_addr_r=0x00600000\0" \ + "fdt_addr_r=0x01f00000\0" \ + "fdtoverlay_addr_r=0x02000000\0" \ + "kernel_addr_r=0x02080000\0" \ + "ramdisk_addr_r=0x06000000\0" \ + "kernel_comp_addr_r=0x08000000\0" \ + "kernel_comp_size=0x2000000\0" + +#define CFG_EXTRA_ENV_SETTINGS \ + "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ + "partitions=" PARTS_DEFAULT \ + ENV_MEM_LAYOUT_SETTINGS \ + ROCKCHIP_DEVICE_SETTINGS \ "boot_targets=" BOOT_TARGETS "\0" -#endif +#endif /* CONFIG_SPL_BUILD */ -#endif +#endif /* __CONFIG_RK3399_COMMON_H */ diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h index 48f93083de..09b7b71c6a 100644 --- a/include/configs/rk3568_common.h +++ b/include/configs/rk3568_common.h @@ -1,4 +1,4 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * (C) Copyright 2021 Rockchip Electronics Co., Ltd */ @@ -10,7 +10,7 @@ #include "rockchip-common.h" -#define CFG_IRAM_BASE 0xfdcc0000 +#define CFG_IRAM_BASE 0xfdcc0000 #define CFG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xf0000000 @@ -28,10 +28,10 @@ "kernel_comp_size=0x8000000\0" #define CFG_EXTRA_ENV_SETTINGS \ - ENV_MEM_LAYOUT_SETTINGS \ - "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ - "partitions=" PARTS_DEFAULT \ - ROCKCHIP_DEVICE_SETTINGS \ + "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ + "partitions=" PARTS_DEFAULT \ + ENV_MEM_LAYOUT_SETTINGS \ + ROCKCHIP_DEVICE_SETTINGS \ "boot_targets=" BOOT_TARGETS "\0" -#endif +#endif /* __CONFIG_RK3568_COMMON_H */ diff --git a/include/configs/rk3588_common.h b/include/configs/rk3588_common.h index 70430612ef..e6654c275a 100644 --- a/include/configs/rk3588_common.h +++ b/include/configs/rk3588_common.h @@ -1,4 +1,4 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * (C) Copyright 2021 Rockchip Electronics Co., Ltd * Copyright (c) 2023 Edgeble AI Technologies Pvt. Ltd. @@ -26,11 +26,11 @@ "ramdisk_addr_r=0x12180000\0" \ "kernel_comp_size=0x8000000\0" -#define CFG_EXTRA_ENV_SETTINGS \ - "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ - "partitions=" PARTS_DEFAULT \ - ENV_MEM_LAYOUT_SETTINGS \ - ROCKCHIP_DEVICE_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ + "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ + "partitions=" PARTS_DEFAULT \ + ENV_MEM_LAYOUT_SETTINGS \ + ROCKCHIP_DEVICE_SETTINGS \ "boot_targets=" BOOT_TARGETS "\0" #endif /* __CONFIG_RK3588_COMMON_H */