diff mbox series

[v2,2/8] arm: mach-k3: am62a: Simplify the logic for QOS reg and val propagation

Message ID 20240614124442.178280-3-j-choudhary@ti.com
State Accepted
Commit 6bc9a5c92f65c1f062ee4d3761330f4fc4a0bf00
Delegated to: Tom Rini
Headers show
Series Enable QoS for DSS on J7 family of TI SoCs | expand

Commit Message

Jayesh Choudhary June 14, 2024, 12:44 p.m. UTC 
For the QOS registers, instead of using the raw values for calculation
for each reg field, use a defined macro which takes in argument for all
the reg fields to get the desired value.
Do the similar simplification for QOS register and group registers and
make the corresponding changes for am62a_qos_uboot file.

Suggested-by: Andrew Davis <afd@ti.com>
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
---
 arch/arm/mach-k3/include/mach/k3-qos.h       | 86 ++++----------------
 arch/arm/mach-k3/r5/am62ax/am62a_qos_uboot.c | 24 +++---
 2 files changed, 28 insertions(+), 82 deletions(-)

Comments

Andrew Davis June 14, 2024, 2:57 p.m. UTC | #1 
On 6/14/24 7:44 AM, Jayesh Choudhary wrote:
> For the QOS registers, instead of using the raw values for calculation
> for each reg field, use a defined macro which takes in argument for all
> the reg fields to get the desired value.
> Do the similar simplification for QOS register and group registers and
> make the corresponding changes for am62a_qos_uboot file.
> 
> Suggested-by: Andrew Davis <afd@ti.com>
> Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
> ---

Looks a bit better IMHO,

Acked-by: Andrew Davis <afd@ti.com>

>   arch/arm/mach-k3/include/mach/k3-qos.h       | 86 ++++----------------
>   arch/arm/mach-k3/r5/am62ax/am62a_qos_uboot.c | 24 +++---
>   2 files changed, 28 insertions(+), 82 deletions(-)
> 
> diff --git a/arch/arm/mach-k3/include/mach/k3-qos.h b/arch/arm/mach-k3/include/mach/k3-qos.h
> index 6ed5704803..eb0f2a0448 100644
> --- a/arch/arm/mach-k3/include/mach/k3-qos.h
> +++ b/arch/arm/mach-k3/include/mach/k3-qos.h
> @@ -9,80 +9,26 @@
>   
>   #include <linux/kernel.h>
>   
> -#define QOS_0	(0 << 0)
> -#define QOS_1	(1 << 0)
> -#define QOS_2	(2 << 0)
> -#define QOS_3	(3 << 0)
> -#define QOS_4	(4 << 0)
> -#define QOS_5	(5 << 0)
> -#define QOS_6	(6 << 0)
> -#define QOS_7	(7 << 0)
> +/* K3_QOS_REG: Registers to configure the channel for a given endpoint */
>   
> -#define ORDERID_0	(0 << 4)
> -#define ORDERID_1	(1 << 4)
> -#define ORDERID_2	(2 << 4)
> -#define ORDERID_3	(3 << 4)
> -#define ORDERID_4	(4 << 4)
> -#define ORDERID_5	(5 << 4)
> -#define ORDERID_6	(6 << 4)
> -#define ORDERID_7	(7 << 4)
> -#define ORDERID_8	(8 << 4)
> -#define ORDERID_9	(9 << 4)
> -#define ORDERID_10	(10 << 4)
> -#define ORDERID_11	(11 << 4)
> -#define ORDERID_12	(12 << 4)
> -#define ORDERID_13	(13 << 4)
> -#define ORDERID_14	(14 << 4)
> -#define ORDERID_15	(15 << 4)
> +#define K3_QOS_REG(base_reg, i)		(base_reg + 0x100 + (i) * 4)
>   
> -#define ASEL_0	(0 << 8)
> -#define ASEL_1	(1 << 8)
> -#define ASEL_2	(2 << 8)
> -#define ASEL_3	(3 << 8)
> -#define ASEL_4	(4 << 8)
> -#define ASEL_5	(5 << 8)
> -#define ASEL_6	(6 << 8)
> -#define ASEL_7	(7 << 8)
> -#define ASEL_8	(8 << 8)
> -#define ASEL_9	(9 << 8)
> -#define ASEL_10	(10 << 8)
> -#define ASEL_11	(11 << 8)
> -#define ASEL_12	(12 << 8)
> -#define ASEL_13	(13 << 8)
> -#define ASEL_14	(14 << 8)
> -#define ASEL_15	(15 << 8)
> +#define K3_QOS_VAL(qos, orderid, asel, epriority, virtid, atype) \
> +	(qos		<< 0  | \
> +	 orderid	<< 4  | \
> +	 asel		<< 8  | \
> +	 epriority	<< 12 | \
> +	 virtid		<< 16 | \
> +	 atype		<< 28)
>   
> -#define EPRIORITY_0	(0 << 12)
> -#define EPRIORITY_1	(1 << 12)
> -#define EPRIORITY_2	(2 << 12)
> -#define EPRIORITY_3	(3 << 12)
> -#define EPRIORITY_4	(4 << 12)
> -#define EPRIORITY_5	(5 << 12)
> -#define EPRIORITY_6	(6 << 12)
> -#define EPRIORITY_7	(7 << 12)
> -
> -#define VIRTID_0	(0 << 16)
> -#define VIRTID_1	(1 << 16)
> -#define VIRTID_2	(2 << 16)
> -#define VIRTID_3	(3 << 16)
> -#define VIRTID_4	(4 << 16)
> -#define VIRTID_5	(5 << 16)
> -#define VIRTID_6	(6 << 16)
> -#define VIRTID_7	(7 << 16)
> -#define VIRTID_8	(8 << 16)
> -#define VIRTID_9	(9 << 16)
> -#define VIRTID_10	(10 << 16)
> -#define VIRTID_11	(11 << 16)
> -#define VIRTID_12	(12 << 16)
> -#define VIRTID_13	(13 << 16)
> -#define VIRTID_14	(14 << 16)
> -#define VIRTID_15	(15 << 16)
> -
> -#define ATYPE_0	(0 << 28)
> -#define ATYPE_1	(1 << 28)
> -#define ATYPE_2	(2 << 28)
> -#define ATYPE_3	(3 << 28)
> +/*
> + * K3_QOS_GROUP_REG: Registers to set 1:1 mapping for orderID MAP1/MAP2
> + * remap registers.
> + */
> +#define K3_QOS_GROUP_REG(base_reg, i)	(base_reg + (i) * 4)
>   
> +#define K3_QOS_GROUP_DEFAULT_VAL_LOW	0x76543210
> +#define K3_QOS_GROUP_DEFAULT_VAL_HIGH	0xfedcba98
>   struct k3_qos_data {
>   	u32 reg;
>   	u32 val;
> diff --git a/arch/arm/mach-k3/r5/am62ax/am62a_qos_uboot.c b/arch/arm/mach-k3/r5/am62ax/am62a_qos_uboot.c
> index 9a82944d5f..1d588acea4 100644
> --- a/arch/arm/mach-k3/r5/am62ax/am62a_qos_uboot.c
> +++ b/arch/arm/mach-k3/r5/am62ax/am62a_qos_uboot.c
> @@ -12,20 +12,20 @@
>   struct k3_qos_data qos_data[] = {
>   	/* modules_qosConfig0 - 1 endpoints, 4 channels */
>   	{
> -		.reg = K3_DSS_UL_MAIN_0_VBUSM_DMA + 0x100 + 0x4 * 0,
> -		.val = ORDERID_8,
> +		.reg = K3_QOS_REG(K3_DSS_UL_MAIN_0_VBUSM_DMA, 0),
> +		.val = K3_QOS_VAL(0, 8, 0, 0, 0, 0),
>   	},
>   	{
> -		.reg = K3_DSS_UL_MAIN_0_VBUSM_DMA + 0x100 + 0x4 * 1,
> -		.val = ORDERID_8,
> +		.reg = K3_QOS_REG(K3_DSS_UL_MAIN_0_VBUSM_DMA, 1),
> +		.val = K3_QOS_VAL(0, 8, 0, 0, 0, 0),
>   	},
>   	{
> -		.reg = K3_DSS_UL_MAIN_0_VBUSM_DMA + 0x100 + 0x4 * 2,
> -		.val = ORDERID_8,
> +		.reg = K3_QOS_REG(K3_DSS_UL_MAIN_0_VBUSM_DMA, 2),
> +		.val = K3_QOS_VAL(0, 8, 0, 0, 0, 0),
>   	},
>   	{
> -		.reg = K3_DSS_UL_MAIN_0_VBUSM_DMA + 0x100 + 0x4 * 3,
> -		.val = ORDERID_8,
> +		.reg = K3_QOS_REG(K3_DSS_UL_MAIN_0_VBUSM_DMA, 3),
> +		.val = K3_QOS_VAL(0, 8, 0, 0, 0, 0),
>   	},
>   
>   	/* Following registers set 1:1 mapping for orderID MAP1/MAP2
> @@ -35,12 +35,12 @@ struct k3_qos_data qos_data[] = {
>   
>   	/* K3_DSS_UL_MAIN_0_VBUSM_DMA - 1 groups */
>   	{
> -		.reg = K3_DSS_UL_MAIN_0_VBUSM_DMA + 0,
> -		.val = 0x76543210,
> +		.reg = K3_QOS_GROUP_REG(K3_DSS_UL_MAIN_0_VBUSM_DMA, 0),
> +		.val = K3_QOS_GROUP_DEFAULT_VAL_LOW,
>   	},
>   	{
> -		.reg = K3_DSS_UL_MAIN_0_VBUSM_DMA + 4,
> -		.val = 0xfedcba98,
> +		.reg = K3_QOS_GROUP_REG(K3_DSS_UL_MAIN_0_VBUSM_DMA, 1),
> +		.val = K3_QOS_GROUP_DEFAULT_VAL_HIGH,
>   	},
>   };
>
diff mbox series

Patch

diff --git a/arch/arm/mach-k3/include/mach/k3-qos.h b/arch/arm/mach-k3/include/mach/k3-qos.h
index 6ed5704803..eb0f2a0448 100644
--- a/arch/arm/mach-k3/include/mach/k3-qos.h
+++ b/arch/arm/mach-k3/include/mach/k3-qos.h
@@ -9,80 +9,26 @@ 
 
 #include <linux/kernel.h>
 
-#define QOS_0	(0 << 0)
-#define QOS_1	(1 << 0)
-#define QOS_2	(2 << 0)
-#define QOS_3	(3 << 0)
-#define QOS_4	(4 << 0)
-#define QOS_5	(5 << 0)
-#define QOS_6	(6 << 0)
-#define QOS_7	(7 << 0)
+/* K3_QOS_REG: Registers to configure the channel for a given endpoint */
 
-#define ORDERID_0	(0 << 4)
-#define ORDERID_1	(1 << 4)
-#define ORDERID_2	(2 << 4)
-#define ORDERID_3	(3 << 4)
-#define ORDERID_4	(4 << 4)
-#define ORDERID_5	(5 << 4)
-#define ORDERID_6	(6 << 4)
-#define ORDERID_7	(7 << 4)
-#define ORDERID_8	(8 << 4)
-#define ORDERID_9	(9 << 4)
-#define ORDERID_10	(10 << 4)
-#define ORDERID_11	(11 << 4)
-#define ORDERID_12	(12 << 4)
-#define ORDERID_13	(13 << 4)
-#define ORDERID_14	(14 << 4)
-#define ORDERID_15	(15 << 4)
+#define K3_QOS_REG(base_reg, i)		(base_reg + 0x100 + (i) * 4)
 
-#define ASEL_0	(0 << 8)
-#define ASEL_1	(1 << 8)
-#define ASEL_2	(2 << 8)
-#define ASEL_3	(3 << 8)
-#define ASEL_4	(4 << 8)
-#define ASEL_5	(5 << 8)
-#define ASEL_6	(6 << 8)
-#define ASEL_7	(7 << 8)
-#define ASEL_8	(8 << 8)
-#define ASEL_9	(9 << 8)
-#define ASEL_10	(10 << 8)
-#define ASEL_11	(11 << 8)
-#define ASEL_12	(12 << 8)
-#define ASEL_13	(13 << 8)
-#define ASEL_14	(14 << 8)
-#define ASEL_15	(15 << 8)
+#define K3_QOS_VAL(qos, orderid, asel, epriority, virtid, atype) \
+	(qos		<< 0  | \
+	 orderid	<< 4  | \
+	 asel		<< 8  | \
+	 epriority	<< 12 | \
+	 virtid		<< 16 | \
+	 atype		<< 28)
 
-#define EPRIORITY_0	(0 << 12)
-#define EPRIORITY_1	(1 << 12)
-#define EPRIORITY_2	(2 << 12)
-#define EPRIORITY_3	(3 << 12)
-#define EPRIORITY_4	(4 << 12)
-#define EPRIORITY_5	(5 << 12)
-#define EPRIORITY_6	(6 << 12)
-#define EPRIORITY_7	(7 << 12)
-
-#define VIRTID_0	(0 << 16)
-#define VIRTID_1	(1 << 16)
-#define VIRTID_2	(2 << 16)
-#define VIRTID_3	(3 << 16)
-#define VIRTID_4	(4 << 16)
-#define VIRTID_5	(5 << 16)
-#define VIRTID_6	(6 << 16)
-#define VIRTID_7	(7 << 16)
-#define VIRTID_8	(8 << 16)
-#define VIRTID_9	(9 << 16)
-#define VIRTID_10	(10 << 16)
-#define VIRTID_11	(11 << 16)
-#define VIRTID_12	(12 << 16)
-#define VIRTID_13	(13 << 16)
-#define VIRTID_14	(14 << 16)
-#define VIRTID_15	(15 << 16)
-
-#define ATYPE_0	(0 << 28)
-#define ATYPE_1	(1 << 28)
-#define ATYPE_2	(2 << 28)
-#define ATYPE_3	(3 << 28)
+/*
+ * K3_QOS_GROUP_REG: Registers to set 1:1 mapping for orderID MAP1/MAP2
+ * remap registers.
+ */
+#define K3_QOS_GROUP_REG(base_reg, i)	(base_reg + (i) * 4)
 
+#define K3_QOS_GROUP_DEFAULT_VAL_LOW	0x76543210
+#define K3_QOS_GROUP_DEFAULT_VAL_HIGH	0xfedcba98
 struct k3_qos_data {
 	u32 reg;
 	u32 val;
diff --git a/arch/arm/mach-k3/r5/am62ax/am62a_qos_uboot.c b/arch/arm/mach-k3/r5/am62ax/am62a_qos_uboot.c
index 9a82944d5f..1d588acea4 100644
--- a/arch/arm/mach-k3/r5/am62ax/am62a_qos_uboot.c
+++ b/arch/arm/mach-k3/r5/am62ax/am62a_qos_uboot.c
@@ -12,20 +12,20 @@ 
 struct k3_qos_data qos_data[] = {
 	/* modules_qosConfig0 - 1 endpoints, 4 channels */
 	{
-		.reg = K3_DSS_UL_MAIN_0_VBUSM_DMA + 0x100 + 0x4 * 0,
-		.val = ORDERID_8,
+		.reg = K3_QOS_REG(K3_DSS_UL_MAIN_0_VBUSM_DMA, 0),
+		.val = K3_QOS_VAL(0, 8, 0, 0, 0, 0),
 	},
 	{
-		.reg = K3_DSS_UL_MAIN_0_VBUSM_DMA + 0x100 + 0x4 * 1,
-		.val = ORDERID_8,
+		.reg = K3_QOS_REG(K3_DSS_UL_MAIN_0_VBUSM_DMA, 1),
+		.val = K3_QOS_VAL(0, 8, 0, 0, 0, 0),
 	},
 	{
-		.reg = K3_DSS_UL_MAIN_0_VBUSM_DMA + 0x100 + 0x4 * 2,
-		.val = ORDERID_8,
+		.reg = K3_QOS_REG(K3_DSS_UL_MAIN_0_VBUSM_DMA, 2),
+		.val = K3_QOS_VAL(0, 8, 0, 0, 0, 0),
 	},
 	{
-		.reg = K3_DSS_UL_MAIN_0_VBUSM_DMA + 0x100 + 0x4 * 3,
-		.val = ORDERID_8,
+		.reg = K3_QOS_REG(K3_DSS_UL_MAIN_0_VBUSM_DMA, 3),
+		.val = K3_QOS_VAL(0, 8, 0, 0, 0, 0),
 	},
 
 	/* Following registers set 1:1 mapping for orderID MAP1/MAP2
@@ -35,12 +35,12 @@  struct k3_qos_data qos_data[] = {
 
 	/* K3_DSS_UL_MAIN_0_VBUSM_DMA - 1 groups */
 	{
-		.reg = K3_DSS_UL_MAIN_0_VBUSM_DMA + 0,
-		.val = 0x76543210,
+		.reg = K3_QOS_GROUP_REG(K3_DSS_UL_MAIN_0_VBUSM_DMA, 0),
+		.val = K3_QOS_GROUP_DEFAULT_VAL_LOW,
 	},
 	{
-		.reg = K3_DSS_UL_MAIN_0_VBUSM_DMA + 4,
-		.val = 0xfedcba98,
+		.reg = K3_QOS_GROUP_REG(K3_DSS_UL_MAIN_0_VBUSM_DMA, 1),
+		.val = K3_QOS_GROUP_DEFAULT_VAL_HIGH,
 	},
 };