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Fri, 07 Jun 2024 13:42:58 -0700 (PDT) Received: from [192.168.0.113] ([2a02:8109:aa0d:be00::8090]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a6c80588851sm300766966b.29.2024.06.07.13.42.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 07 Jun 2024 13:42:57 -0700 (PDT) From: Caleb Connolly Date: Fri, 07 Jun 2024 22:42:51 +0200 Subject: [PATCH v2 3/3] doc: arch: arm64: describe pagetable debugging MIME-Version: 1.0 Message-Id: <20240607-caleb-upstreaming-v2-3-bae407f51f22@linaro.org> References: <20240607-caleb-upstreaming-v2-0-bae407f51f22@linaro.org> In-Reply-To: <20240607-caleb-upstreaming-v2-0-bae407f51f22@linaro.org> To: Tom Rini Cc: Michal Simek , Ilias Apalodimas , Neil Armstrong , u-boot@lists.denx.de, Caleb Connolly X-Mailer: b4 0.14-dev X-Developer-Signature: v=1; a=openpgp-sha256; l=2437; i=caleb.connolly@linaro.org; h=from:subject:message-id; bh=MTi4eb3QnNK3dMRRUrL76HdHjW1mfzW7AiL6LzWeZKg=; b=owEBbQKS/ZANAwAIAQWDMSsZX2S2AcsmYgBmY3DN6v4y/j4pAc7EZtiXICHxkTcTRzjmGysbG bov6sNmewqJAjMEAAEIAB0WIQS2UaFGPGq+0GkMVc0FgzErGV9ktgUCZmNwzQAKCRAFgzErGV9k trLpD/9xSY5gwpZqszdEVW10K3btClJ5kXysUZxDvK7QBFcOsnf3DLb48vddNW6VQztjgM2P/Cd BSYcTHmtYyuQsFR3txlADGfwIMZezdWGfvg/CqbthdaAGIA1zFV0dQpetdBrhBWmDYNEzDYFHN6 sB3+0J4orYsHLJkeBvR/LktAlkJbQoJf7ShoJLvH7N2Rwevhh8QPL4NnNJo2y1sto4LHT6zufbR o/3xfUU0jgw4Nj7BlNOqcShPvECPjc8iJY5Vu9dAYAnp0Vxko/Ld6A/RoinGs0pDcjiUu4LxO5T jSY0SjVDsqFZXgMBX7xD3+PfUnVjNzjzKmWqA0/6n9DtSk32IsJGfDD1zkgpBI7Ncxv3txPEVkR 8Ris2BgrD4ChgZk+b2ZKbNECT3AuQofSqDu4Vl52LPrIMmDCzCkk2Y3WCmDkNcyWVOKrNkLIzIn PQVxdcFVuY3LPNrHL07Ua3cjsSE4hWJEoBNIDQewyGpjXGfQlIM5Bwu1fWhx/HLNTserM4bBDMd i3288IU+cmD0YUgIKJy2Ml5Tbam/N2El7bj5dkitRujEEUk49tMdeooplljG2ForPiDRdJ7vjGi +q3gOjS3bBWniws5Y8QrO5nAsD8NDRMyWoVOg6Q5rhMPk2WwqRfvERfMsOuN7+4BIQTBP6QVdX9 iddAtgnAnUUlfyQ== X-Developer-Key: i=caleb.connolly@linaro.org; a=openpgp; fpr=83B24DA7FE145076BC38BB250CD904EB673A7C47 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Add some brief documentation on using dump_pagetables() to print out U-Boot's pagetables during boot. Signed-off-by: Caleb Connolly --- doc/arch/arm64.rst | 37 +++++++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/doc/arch/arm64.rst b/doc/arch/arm64.rst index 7c0713504c47..0c851304aad4 100644 --- a/doc/arch/arm64.rst +++ b/doc/arch/arm64.rst @@ -47,8 +47,45 @@ Notes 6. CONFIG_ARM64 instead of CONFIG_ARMV8 is used to distinguish aarch64 and aarch32 specific codes. +MMU +--- + +U-Boot uses a simple page table for MMU setup. It uses the smallest number of bits +possible for the virtual address based on the maximum memory address (see the logic +in ``get_tcr()``). + +As with all platforms, U-Boot on ARM64 uses a 1:1 mapping of virtual to physical addresses. +In general, the memory map is expected to remain static once the MMU is enabled. + +It is possible to debug the pagetable generated by U-Boot with the built in +``dump_pagetable()`` and ``walk_pagetable()`` functions (the former being a simple +wrapper for the latter). For example the following can be added to ``setup_all_pgtables()`` +after the first call to ``setup_pgtables()``: + +.. code-block:: c + + dump_pagetable(gd->arch.tlb_addr, get_tcr(NULL, NULL)); + +This will result in a print like the following: + +.. code-block:: text + + Walking pagetable at 000000017df90000, va_bits: 36. Using 3 levels + [0x17df91000] | Table | | + [0x17df92000] | Table | | + [0x000001000 - 0x000200000] | Pages | Device-nGnRnE | Non-shareable + [0x000200000 - 0x040000000] | Block | Device-nGnRnE | Non-shareable + [0x040000000 - 0x080000000] | Block | Device-nGnRnE | Non-shareable + [0x080000000 - 0x140000000] | Block | Normal | Inner-shareable + [0x17df93000] | Table | | + [0x140000000 - 0x17de00000] | Block | Normal | Inner-shareable + [0x17df94000] | Table | | + [0x17de00000 - 0x17dfa0000] | Pages | Normal | Inner-shareable + +For more information, please refer to the function documentation in +``arch/arm/include/asm/armv8/mmu.h``. Contributors ------------ * Tom Rini