| Message ID | 20240605032521.1142768-8-sjg@chromium.org |
|---|---|
| State | Changes Requested |
| Delegated to: | Tom Rini |
| Headers | show |
| Series | Bug-fixes for a few boards | expand |
Hi Simon, On 2024-06-05 05:25, Simon Glass wrote: > This causes a hang, so disable it. When I initially tested this on multiple boards there was some boards that also hanged, that turned out to be an issue in one of the drivers. If I remember correctly such hang was related to a null pointer dereference or unaligned access in one of the drivers. Could there be a similar underlying issue for these boards? Regards, Jonas > > Fixes: 6d8cdfd1536 ("rockchip: spl: Enable caches to speed up checksum validation") > > Signed-off-by: Simon Glass <sjg@chromium.org> > --- > > configs/chromebook_bob_defconfig | 1 + > configs/chromebook_kevin_defconfig | 1 + > 2 files changed, 2 insertions(+) > > diff --git a/configs/chromebook_bob_defconfig b/configs/chromebook_bob_defconfig > index acfe3934104..b2ecfa6050c 100644 > --- a/configs/chromebook_bob_defconfig > +++ b/configs/chromebook_bob_defconfig > @@ -1,5 +1,6 @@ > CONFIG_ARM=y > CONFIG_SKIP_LOWLEVEL_INIT=y > +CONFIG_SPL_SYS_DCACHE_OFF=y > CONFIG_COUNTER_FREQUENCY=24000000 > CONFIG_ARCH_ROCKCHIP=y > CONFIG_TEXT_BASE=0x00200000 > diff --git a/configs/chromebook_kevin_defconfig b/configs/chromebook_kevin_defconfig > index 95fdb418d82..da748e4f022 100644 > --- a/configs/chromebook_kevin_defconfig > +++ b/configs/chromebook_kevin_defconfig > @@ -2,6 +2,7 @@ CONFIG_ARM=y > CONFIG_SKIP_LOWLEVEL_INIT=y > CONFIG_COUNTER_FREQUENCY=24000000 > CONFIG_ARCH_ROCKCHIP=y > +CONFIG_SPL_SYS_DCACHE_OFF=y > CONFIG_TEXT_BASE=0x00200000 > CONFIG_SPL_GPIO=y > CONFIG_NR_DRAM_BANKS=1
Hi Jonas, On Wed, 5 Jun 2024 at 05:07, Jonas Karlman <jonas@kwiboo.se> wrote: > > Hi Simon, > > On 2024-06-05 05:25, Simon Glass wrote: > > This causes a hang, so disable it. > > When I initially tested this on multiple boards there was some boards > that also hanged, that turned out to be an issue in one of the drivers. > > If I remember correctly such hang was related to a null pointer > dereference or unaligned access in one of the drivers. > > Could there be a similar underlying issue for these boards? Yes it could be. I will take a look. But given the release date I would like to get this patch in first. Regards, Simon
Hi Jonas, On Thu, 6 Jun 2024 at 09:04, Simon Glass <sjg@chromium.org> wrote: > > Hi Jonas, > > On Wed, 5 Jun 2024 at 05:07, Jonas Karlman <jonas@kwiboo.se> wrote: > > > > Hi Simon, > > > > On 2024-06-05 05:25, Simon Glass wrote: > > > This causes a hang, so disable it. > > > > When I initially tested this on multiple boards there was some boards > > that also hanged, that turned out to be an issue in one of the drivers. > > > > If I remember correctly such hang was related to a null pointer > > dereference or unaligned access in one of the drivers. > > > > Could there be a similar underlying issue for these boards? > > Yes it could be. I will take a look. > > But given the release date I would like to get this patch in first. I did find a bug in memory sizing, but fixing that was not enough to get the cache running. I am not sure how to debug it, since presumably the code works fine on other rk3399 boards (sadly mine broke a few days ago). Regards, Simon
diff --git a/configs/chromebook_bob_defconfig b/configs/chromebook_bob_defconfig index acfe3934104..b2ecfa6050c 100644 --- a/configs/chromebook_bob_defconfig +++ b/configs/chromebook_bob_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00200000 diff --git a/configs/chromebook_kevin_defconfig b/configs/chromebook_kevin_defconfig index 95fdb418d82..da748e4f022 100644 --- a/configs/chromebook_kevin_defconfig +++ b/configs/chromebook_kevin_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y +CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_TEXT_BASE=0x00200000 CONFIG_SPL_GPIO=y CONFIG_NR_DRAM_BANKS=1
This causes a hang, so disable it. Fixes: 6d8cdfd1536 ("rockchip: spl: Enable caches to speed up checksum validation") Signed-off-by: Simon Glass <sjg@chromium.org> --- configs/chromebook_bob_defconfig | 1 + configs/chromebook_kevin_defconfig | 1 + 2 files changed, 2 insertions(+)