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Fri, 31 May 2024 07:20:05 -0700 (PDT) Received: from localhost.localdomain ([113.30.217.222]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2c1a775ccedsm3563935a91.1.2024.05.31.07.20.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 31 May 2024 07:20:04 -0700 (PDT) From: Anand Moon To: Tom Rini , Simon Glass , Kever Yang , Jagan Teki , Jonas Karlman , Quentin Schulz Cc: Anand Moon , Anand Moon , u-boot@lists.denx.de Subject: [PATCH RFC v2 22/23] sysreset: rockchip: use fst reset for ARM64 SOC Date: Fri, 31 May 2024 19:48:36 +0530 Message-ID: <20240531141837.13189-23-linux.amoon@gmail.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240531141837.13189-1-linux.amoon@gmail.com> References: <20240531141837.13189-1-linux.amoon@gmail.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean From: Kever Yang Rockchip ARM64 SOC will change cpu entry, only fst reset can reset it. Cc: Jagan Teki Signed-off-by: Kever Yang --- drivers/sysreset/sysreset_rockchip.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/sysreset/sysreset_rockchip.c b/drivers/sysreset/sysreset_rockchip.c index f353f9b4c7..17aa191349 100644 --- a/drivers/sysreset/sysreset_rockchip.c +++ b/drivers/sysreset/sysreset_rockchip.c @@ -22,7 +22,12 @@ int rockchip_sysreset_request(struct udevice *dev, enum sysreset_t type) switch (type) { case SYSRESET_WARM: +#ifdef CONFIG_ARM64 + /* Rockchip 64bit SOC need fst reset for cpu reset entry */ + writel(0xfdb9, cru_base + offset->glb_srst_fst_value); +#else writel(0xeca8, cru_base + offset->glb_srst_snd_value); +#endif break; case SYSRESET_COLD: writel(0xfdb9, cru_base + offset->glb_srst_fst_value);