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Tue, 28 May 2024 10:05:28 -0700 (PDT) Received: from localhost.localdomain ([221.220.133.99]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-1f47efff203sm53037705ad.241.2024.05.28.10.05.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 May 2024 10:05:27 -0700 (PDT) From: Jianfeng Liu To: u-boot@lists.denx.de Cc: Sebastian Reichel , Heiko Stuebner , Jianfeng Liu , Boris Brezillon , Diederik de Haas , Kever Yang , Niklas Cassel , Philipp Tomsich , Simon Glass , Sumit Garg , Tom Rini Subject: [PATCH v4 04/10] arm64: dts: rockchip: reorder usb2phy properties for rk3588 Date: Wed, 29 May 2024 01:04:00 +0800 Message-Id: <20240528170406.353616-5-liujianfeng1994@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240528170406.353616-1-liujianfeng1994@gmail.com> References: <20240528170406.353616-1-liujianfeng1994@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Wed, 29 May 2024 00:21:20 +0200 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean From: Sebastian Reichel Reorder common DT properties alphabetically for usb2phy, according to latest DT style rules. Signed-off-by: Sebastian Reichel Link: https://lore.kernel.org/r/20240408225109.128953-6-sebastian.reichel@collabora.com Signed-off-by: Heiko Stuebner [ upstream commit: abe68e0ca71dddce0e5419e35507cb464d61870d ] (cherry picked from commit f6835a60a8a28ff14ffb3dd80c99ce1c137d06c5) Signed-off-by: Jianfeng Liu Reviewed-by: Kever Yang --- (no changes since v1) dts/upstream/src/arm64/rockchip/rk3588s.dtsi | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/dts/upstream/src/arm64/rockchip/rk3588s.dtsi b/dts/upstream/src/arm64/rockchip/rk3588s.dtsi index 87df0902273..58d12969b7e 100644 --- a/dts/upstream/src/arm64/rockchip/rk3588s.dtsi +++ b/dts/upstream/src/arm64/rockchip/rk3588s.dtsi @@ -602,13 +602,13 @@ u2phy2: usb2phy@8000 { compatible = "rockchip,rk3588-usb2phy"; reg = <0x8000 0x10>; - interrupts = ; - resets = <&cru SRST_OTGPHY_U2_0>, <&cru SRST_P_USB2PHY_U2_0_GRF0>; - reset-names = "phy", "apb"; + #clock-cells = <0>; clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>; clock-names = "phyclk"; clock-output-names = "usb480m_phy2"; - #clock-cells = <0>; + interrupts = ; + resets = <&cru SRST_OTGPHY_U2_0>, <&cru SRST_P_USB2PHY_U2_0_GRF0>; + reset-names = "phy", "apb"; status = "disabled"; u2phy2_host: host-port { @@ -627,13 +627,13 @@ u2phy3: usb2phy@c000 { compatible = "rockchip,rk3588-usb2phy"; reg = <0xc000 0x10>; - interrupts = ; - resets = <&cru SRST_OTGPHY_U2_1>, <&cru SRST_P_USB2PHY_U2_1_GRF0>; - reset-names = "phy", "apb"; + #clock-cells = <0>; clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>; clock-names = "phyclk"; clock-output-names = "usb480m_phy3"; - #clock-cells = <0>; + interrupts = ; + resets = <&cru SRST_OTGPHY_U2_1>, <&cru SRST_P_USB2PHY_U2_1_GRF0>; + reset-names = "phy", "apb"; status = "disabled"; u2phy3_host: host-port {