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[1/4] board: phytec: phycore-imx8mp: spl: Fix syle issue

Message ID 20240528133515.307315-2-t.remmet@phytec.de
State Accepted
Commit 7d1895bd4bdb0788017555e4209bf030dcf39354
Delegated to: Fabio Estevam
Headers show
Series Support all phyCORE-i.MX8MP RAM variants | expand

Commit Message

Teresa Remmet May 28, 2024, 1:35 p.m. UTC 
Use tabs instead of spaces.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
---
 board/phytec/phycore_imx8mp/spl.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
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Patch

diff --git a/board/phytec/phycore_imx8mp/spl.c b/board/phytec/phycore_imx8mp/spl.c
index df158024654e..492ce3b7ca6e 100644
--- a/board/phytec/phycore_imx8mp/spl.c
+++ b/board/phytec/phycore_imx8mp/spl.c
@@ -25,8 +25,8 @@ 
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define EEPROM_ADDR             0x51
-#define EEPROM_ADDR_FALLBACK    0x59
+#define EEPROM_ADDR		0x51
+#define EEPROM_ADDR_FALLBACK	0x59
 
 int spl_board_boot_device(enum boot_device boot_dev_spl)
 {