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[188.129.47.65]) by smtp.googlemail.com with ESMTPSA id a640c23a62f3a-a5a8b634cdcsm1081502166b.93.2024.05.22.03.14.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 May 2024 03:14:44 -0700 (PDT) From: Robert Marko To: trini@konsulko.com, caleb.connolly@linaro.org, neil.armstrong@linaro.org, sumit.garg@linaro.org, lukma@denx.de, seanga2@gmail.com, joe.hershberger@ni.com, rfried.dev@gmail.com, j4g8y7@gmail.com, u-boot-qcom@groups.io, u-boot@lists.denx.de Cc: j.beck@linefinity.com, Robert Marko Subject: [PATCH 5/5] arm: dts: add IPQ4019 ESS EDMA U-Boot additions Date: Wed, 22 May 2024 12:13:45 +0200 Message-ID: <20240522101437.225880-5-robert.marko@sartura.hr> X-Mailer: git-send-email 2.45.1 In-Reply-To: <20240522101437.225880-1-robert.marko@sartura.hr> References: <20240522101437.225880-1-robert.marko@sartura.hr> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean IPQ4019 ESS EDMA support is not yet in upstream Linux, and even when eventually it is merged the node will not be compatible with U-Boot driver as the Linux driver properly models the internal switch. So, lets add the U-Boot additions DTSI for ESS EDMA for now. Signed-off-by: Robert Marko --- arch/arm/dts/qcom-ipq4019-u-boot.dtsi | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) create mode 100644 arch/arm/dts/qcom-ipq4019-u-boot.dtsi diff --git a/arch/arm/dts/qcom-ipq4019-u-boot.dtsi b/arch/arm/dts/qcom-ipq4019-u-boot.dtsi new file mode 100644 index 0000000000..f70ef5c9a5 --- /dev/null +++ b/arch/arm/dts/qcom-ipq4019-u-boot.dtsi @@ -0,0 +1,27 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/ { + soc { + edma: edma@c080000 { + compatible = "qcom,ess-edma"; + reg = <0xc080000 0x8000>, <0x98000 0x800>, <0xc000000 0x80000>; + reg-names = "edma", "psgmii_phy", "switch"; + #address-cells = <1>; + #size-cells = <1>; + resets = <&gcc ESS_PSGMII_ARES>, <&gcc ESS_RESET>; + reset-names = "psgmii", "ess"; + clocks = <&gcc GCC_ESS_CLK>; + clock-names = "ess"; + status = "disabled"; + + switch_ports: switch-ports { + phy-mode = "psgmii"; + }; + }; + }; +}; + +&mdio { + psgmiiphy: psgmii-phy@5 { + reg = <5>; + }; +};