diff mbox series

[03/10] rockchip: ringneck_px30: Use common bss and stack addresses

Message ID 20240521-px30-2024-07-rc-v1-3-62109c84d44f@cherry.de
State Superseded
Delegated to: Kever Yang
Headers show
Series rockchip: px30: migrate to common bss and stack addresses + UART fixes for evb-px30 | expand

Commit Message

Quentin Schulz May 21, 2024, 5:39 p.m. UTC
From: Quentin Schulz <quentin.schulz@cherry.de>

U-Boot proper pre-reloc is currently running out of memory and it is
thus impossible to boot into U-Boot CLI.

Fix this by migrating to the common bss and stack addresses for PX30,
which drastically increases the size of the pre-reloc allocation pool (8
times bigger now). The memory layout in SPL and U-Boot proper now
match the other SoCs' using ROCKCHIP_COMMON_STACK_ADDR.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
---
 configs/ringneck-px30_defconfig | 18 +++---------------
 1 file changed, 3 insertions(+), 15 deletions(-)

Comments

Kever Yang May 23, 2024, 3:48 a.m. UTC | #1
On 2024/5/22 01:39, Quentin Schulz wrote:
> From: Quentin Schulz <quentin.schulz@cherry.de>
>
> U-Boot proper pre-reloc is currently running out of memory and it is
> thus impossible to boot into U-Boot CLI.
>
> Fix this by migrating to the common bss and stack addresses for PX30,
> which drastically increases the size of the pre-reloc allocation pool (8
> times bigger now). The memory layout in SPL and U-Boot proper now
> match the other SoCs' using ROCKCHIP_COMMON_STACK_ADDR.
>
> Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

Thanks,
- Kever
> ---
>   configs/ringneck-px30_defconfig | 18 +++---------------
>   1 file changed, 3 insertions(+), 15 deletions(-)
>
> diff --git a/configs/ringneck-px30_defconfig b/configs/ringneck-px30_defconfig
> index 0df1b8a59ac..94179dca3ae 100644
> --- a/configs/ringneck-px30_defconfig
> +++ b/configs/ringneck-px30_defconfig
> @@ -2,27 +2,15 @@ CONFIG_ARM=y
>   CONFIG_SKIP_LOWLEVEL_INIT=y
>   CONFIG_COUNTER_FREQUENCY=24000000
>   CONFIG_ARCH_ROCKCHIP=y
> -CONFIG_TEXT_BASE=0x00200000
> -CONFIG_SYS_MALLOC_F_LEN=0x2000
>   CONFIG_SPL_GPIO=y
> -CONFIG_SPL_LIBCOMMON_SUPPORT=y
> -CONFIG_SPL_LIBGENERIC_SUPPORT=y
>   CONFIG_NR_DRAM_BANKS=2
> -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
> -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000
>   CONFIG_DEFAULT_DEVICE_TREE="px30-ringneck-haikou"
> -CONFIG_SPL_TEXT_BASE=0x00000000
>   CONFIG_DM_RESET=y
>   CONFIG_ROCKCHIP_PX30=y
> +# CONFIG_TPL_ROCKCHIP_COMMON_BOARD is not set
>   CONFIG_TARGET_RINGNECK_PX30=y
> -CONFIG_TPL_LIBGENERIC_SUPPORT=y
> +# CONFIG_TPL_LIBCOMMON_SUPPORT is not set
>   CONFIG_SPL_DRIVERS_MISC=y
> -CONFIG_SPL_STACK_R_ADDR=0x600000
> -CONFIG_SPL_STACK=0x400000
> -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
> -CONFIG_SPL_BSS_START_ADDR=0x4000000
> -CONFIG_SPL_BSS_MAX_SIZE=0x4000
> -CONFIG_SPL_STACK_R=y
>   CONFIG_DEBUG_UART_BASE=0xFF030000
>   CONFIG_DEBUG_UART_CLOCK=24000000
>   CONFIG_SYS_LOAD_ADDR=0x800800
> @@ -41,11 +29,11 @@ CONFIG_SPL_PAD_TO=0x0
>   CONFIG_SPL_BOARD_INIT=y
>   CONFIG_SPL_BOOTROM_SUPPORT=y
>   # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
> -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
>   CONFIG_SPL_SYS_MALLOC=y
>   CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
>   CONFIG_SPL_ATF=y
>   # CONFIG_TPL_FRAMEWORK is not set
> +# CONFIG_TPL_SYS_MALLOC_SIMPLE is not set
>   # CONFIG_CMD_BOOTD is not set
>   # CONFIG_CMD_ELF is not set
>   # CONFIG_CMD_IMI is not set
>
diff mbox series

Patch

diff --git a/configs/ringneck-px30_defconfig b/configs/ringneck-px30_defconfig
index 0df1b8a59ac..94179dca3ae 100644
--- a/configs/ringneck-px30_defconfig
+++ b/configs/ringneck-px30_defconfig
@@ -2,27 +2,15 @@  CONFIG_ARM=y
 CONFIG_SKIP_LOWLEVEL_INIT=y
 CONFIG_COUNTER_FREQUENCY=24000000
 CONFIG_ARCH_ROCKCHIP=y
-CONFIG_TEXT_BASE=0x00200000
-CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_SPL_GPIO=y
-CONFIG_SPL_LIBCOMMON_SUPPORT=y
-CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=2
-CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
-CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000
 CONFIG_DEFAULT_DEVICE_TREE="px30-ringneck-haikou"
-CONFIG_SPL_TEXT_BASE=0x00000000
 CONFIG_DM_RESET=y
 CONFIG_ROCKCHIP_PX30=y
+# CONFIG_TPL_ROCKCHIP_COMMON_BOARD is not set
 CONFIG_TARGET_RINGNECK_PX30=y
-CONFIG_TPL_LIBGENERIC_SUPPORT=y
+# CONFIG_TPL_LIBCOMMON_SUPPORT is not set
 CONFIG_SPL_DRIVERS_MISC=y
-CONFIG_SPL_STACK_R_ADDR=0x600000
-CONFIG_SPL_STACK=0x400000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x4000000
-CONFIG_SPL_BSS_MAX_SIZE=0x4000
-CONFIG_SPL_STACK_R=y
 CONFIG_DEBUG_UART_BASE=0xFF030000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_SYS_LOAD_ADDR=0x800800
@@ -41,11 +29,11 @@  CONFIG_SPL_PAD_TO=0x0
 CONFIG_SPL_BOARD_INIT=y
 CONFIG_SPL_BOOTROM_SUPPORT=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
-# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
 CONFIG_SPL_SYS_MALLOC=y
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
 CONFIG_SPL_ATF=y
 # CONFIG_TPL_FRAMEWORK is not set
+# CONFIG_TPL_SYS_MALLOC_SIMPLE is not set
 # CONFIG_CMD_BOOTD is not set
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set