@@ -28,10 +28,20 @@
#define SOC64_HANDOFF_OFFSET_DATA 0x10
#define SOC64_HANDOFF_SIZE 4096
-#if IS_ENABLED(CONFIG_TARGET_SOCFPGA_STRATIX10) || \
- IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX)
+#if IS_ENABLED(CONFIG_TARGET_SOCFPGA_SOC64) || \
+ IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX7M)
#define SOC64_HANDOFF_BASE 0xFFE3F000
+#if IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX7M)
+#define SOC64_HANDOFF_MISC (SOC64_HANDOFF_BASE + 0x62C)
+/* DDR handoff */
+#define SOC64_HANDOFF_MAGIC_DDR 0x5344524D
+#define SOC64_HANDOFF_DDR_BASE (SOC64_HANDOFF_BASE + 0x610)
+#define SOC64_HANDOFF_DDR_LEN 2
+#define SOC64_HANDOFF_DDR_INTERLEAVING_MODE_MASK BIT(0)
+#define SOC64_HANDOFF_DDR_MEMORY_TYPE_MASK BIT(0)
+#else
#define SOC64_HANDOFF_MISC (SOC64_HANDOFF_BASE + 0x610)
+#endif
#elif IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX5)
#define SOC64_HANDOFF_BASE 0x0007F000
#elif IS_ENABLED(CONFIG_TARGET_SOCFPGA_N5X)