Message ID | 20240516-rework-video-format-v1-6-f69822b742a3@flygoat.com |
---|---|
State | New |
Delegated to: | Anatolij Gustschin |
Headers | show
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Thu, 16 May 2024 18:16:50 -0400 (EDT) From: Jiaxun Yang <jiaxun.yang@flygoat.com> Date: Thu, 16 May 2024 23:16:46 +0100 Subject: [PATCH 6/6] video: bochs: Setup framebuffer endian MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20240516-rework-video-format-v1-6-f69822b742a3@flygoat.com> References: <20240516-rework-video-format-v1-0-f69822b742a3@flygoat.com> In-Reply-To: <20240516-rework-video-format-v1-0-f69822b742a3@flygoat.com> To: u-boot@lists.denx.de Cc: Tom Rini <trini@konsulko.com>, Heiko Schocher <hs@denx.de>, Marcel Ziswiler <marcel.ziswiler@toradex.com>, Anatolij Gustschin <agust@denx.de>, Heinrich Schuchardt <xypron.glpk@gmx.de>, Ilias Apalodimas <ilias.apalodimas@linaro.org>, Simon Glass <sjg@chromium.org>, Jiaxun Yang <jiaxun.yang@flygoat.com> X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1193; i=jiaxun.yang@flygoat.com; h=from:subject:message-id; bh=uXUkYoxewDtt2lIZLTm3YxBjI1nWZJYFhbEQwgQyN3o=; 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Series |
video: pixel format handling fixes and improvements
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expand
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diff --git a/drivers/video/bochs.c b/drivers/video/bochs.c index 00e673a4db08..c315c5477b14 100644 --- a/drivers/video/bochs.c +++ b/drivers/video/bochs.c @@ -65,6 +65,14 @@ static int bochs_init_fb(struct udevice *dev) uc_priv->ysize = ysize; uc_priv->bpix = VIDEO_BPP32; +#if defined(__powerpc__) && defined(__BIG_ENDIAN) + uc_priv->format = VIDEO_XRGB8888_BE; + writel(0xbebebebe, mmio + 0x604); +#else + uc_priv->format = VIDEO_XRGB8888; + writel(0x1e1e1e1e, mmio + 0x604); +#endif + /* setup video mode */ bochs_write(mmio, INDEX_ENABLE, 0); bochs_write(mmio, INDEX_BANK, 0);
So the current situation on endian of bochs framebufer is a little bit complex. QEMU defaulted to little endian for both endian hardware except on powerpc, but provided an endian swich register allows OS to switch endian. Since we can't guarantee the endian switch register is functional, my approach is to default to little endian framebuffer for ISAs except powerpc and perform endian switch to match this assumption. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> --- drivers/video/bochs.c | 8 ++++++++ 1 file changed, 8 insertions(+)