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Thu, 9 May 2024 04:53:34 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 9 May 2024 04:53:34 -0500 Received: from [127.0.1.1] (uda0497581.dhcp.ti.com [10.24.68.185]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 4499rKt4075143; Thu, 9 May 2024 04:53:31 -0500 From: Manorit Chawdhry Date: Thu, 9 May 2024 15:23:17 +0530 Subject: [PATCH v2 3/6] arch: arm: dts: k3-am68-sk-r5: Sync with J721s2 R5 file MIME-Version: 1.0 Message-ID: <20240509-b4-upstream-j721s2-of-upstream-v2-3-149563cd4901@ti.com> References: <20240509-b4-upstream-j721s2-of-upstream-v2-0-149563cd4901@ti.com> In-Reply-To: <20240509-b4-upstream-j721s2-of-upstream-v2-0-149563cd4901@ti.com> To: Tom Rini , Simon Glass , Alper Nebi Yasak CC: , Neha Malcom Francis , Nishanth Menon , Andrew Davis , Udit Kumar , Aniket Limaye , Sumit Garg , Manorit Chawdhry X-Mailer: b4 0.13-dev X-Developer-Signature: v=1; a=ed25519-sha256; t=1715248401; l=1473; i=m-chawdhry@ti.com; s=20231127; h=from:subject:message-id; bh=px1ygQx8uXTg4Ux6TwbBUJxRwUvaiu9lRzqmhzy7ZpA=; b=opTq9Q44uKKEjX8QGCTVmsAdoe+PnxtVn0gLd8yYybvPp/j+BwQAs+cabit/NJiPcmWxDORWq qZkDCAZO0FqDzlWEcM0XNfoVjIWaVMhH+pBTCZwfQnwn/FsFkaJKxRp X-Developer-Key: i=m-chawdhry@ti.com; a=ed25519; pk=fsr6Tm39TvsTgfyfFQLk+nnqIz2sBA1PthfqqfiiYSs= X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Currently AM68 SK boots with J721s2 R5 DTS and then later changes to AM68 SK DT during runtime. To split the support of J721s2 and AM68, sync AM68 R5 DT with J721s2 R5 DT as that contains some essential node changes for booting up AM68 using AM68 R5 DT. secure_proxy_mcu and secure_proxy_sa3 node changes are required for establishing contact with TIFS running on M4 core, and the addition of new power domain helps in holding A72 in reset for configuration of firewalls. Signed-off-by: Manorit Chawdhry Reviewed-by: Neha Malcom Francis --- arch/arm/dts/k3-am68-sk-r5-base-board.dts | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/k3-am68-sk-r5-base-board.dts b/arch/arm/dts/k3-am68-sk-r5-base-board.dts index 695aadc287bd..038b08dc3e01 100644 --- a/arch/arm/dts/k3-am68-sk-r5-base-board.dts +++ b/arch/arm/dts/k3-am68-sk-r5-base-board.dts @@ -24,7 +24,8 @@ compatible = "ti,am654-rproc"; reg = <0x0 0x00a90000 0x0 0x10>; power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>, - <&k3_pds 202 TI_SCI_PD_EXCLUSIVE>; + <&k3_pds 202 TI_SCI_PD_EXCLUSIVE>, + <&k3_pds 4 TI_SCI_PD_EXCLUSIVE>; resets = <&k3_reset 202 0>; clocks = <&k3_clks 61 1>; assigned-clocks = <&k3_clks 61 1>, <&k3_clks 202 0>; @@ -54,10 +55,12 @@ &secure_proxy_mcu { bootph-pre-ram; + status = "okay"; }; &secure_proxy_sa3 { bootph-pre-ram; + status = "okay"; }; &cbass_mcu_wakeup {