diff --git a/arch/arm/dts/rk3566-anbernic-rgxx3.dtsi b/arch/arm/dts/rk3566-anbernic-rgxx3.dtsi
deleted file mode 100644
index 8cbf3d9a4f22..000000000000
--- a/arch/arm/dts/rk3566-anbernic-rgxx3.dtsi
+++ /dev/null
@@ -1,788 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-
-/dts-v1/;
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/linux-event-codes.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-#include <dt-bindings/soc/rockchip,vop2.h>
-#include "rk3566.dtsi"
-
-/ {
-	chosen: chosen {
-		stdout-path = "serial2:1500000n8";
-	};
-
-	adc-joystick {
-		compatible = "adc-joystick";
-		io-channels = <&adc_mux 0>,
-			      <&adc_mux 1>,
-			      <&adc_mux 2>,
-			      <&adc_mux 3>;
-		pinctrl-0 = <&joy_mux_en>;
-		pinctrl-names = "default";
-		poll-interval = <60>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		axis@0 {
-			reg = <0>;
-			abs-flat = <32>;
-			abs-fuzz = <32>;
-			abs-range = <1023 15>;
-			linux,code = <ABS_X>;
-		};
-
-		axis@1 {
-			reg = <1>;
-			abs-flat = <32>;
-			abs-fuzz = <32>;
-			abs-range = <15 1023>;
-			linux,code = <ABS_RX>;
-		};
-
-		axis@2 {
-			reg = <2>;
-			abs-flat = <32>;
-			abs-fuzz = <32>;
-			abs-range = <15 1023>;
-			linux,code = <ABS_Y>;
-		};
-
-		axis@3 {
-			reg = <3>;
-			abs-flat = <32>;
-			abs-fuzz = <32>;
-			abs-range = <1023 15>;
-			linux,code = <ABS_RY>;
-		};
-	};
-
-	adc_keys: adc-keys {
-		compatible = "adc-keys";
-		io-channels = <&saradc 0>;
-		io-channel-names = "buttons";
-		keyup-threshold-microvolt = <1800000>;
-		poll-interval = <60>;
-
-		/*
-		 * Button is mapped to F key in BSP kernel, but
-		 * according to input guidelines it should be mode.
-		 */
-		button-mode {
-			label = "MODE";
-			linux,code = <BTN_MODE>;
-			press-threshold-microvolt = <1750>;
-		};
-	};
-
-	adc_mux: adc-mux {
-		compatible = "io-channel-mux";
-		channels = "left_x", "right_x", "left_y", "right_y";
-		#io-channel-cells = <1>;
-		io-channels = <&saradc 3>;
-		io-channel-names = "parent";
-		mux-controls = <&gpio_mux>;
-		settle-time-us = <100>;
-	};
-
-	gpio_keys_control: gpio-keys-control {
-		compatible = "gpio-keys";
-		pinctrl-0 = <&btn_pins_ctrl>;
-		pinctrl-names = "default";
-
-		button-b {
-			gpios = <&gpio3 RK_PC3 GPIO_ACTIVE_LOW>;
-			label = "SOUTH";
-			linux,code = <BTN_SOUTH>;
-		};
-
-		button-down {
-			gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_LOW>;
-			label = "DPAD-DOWN";
-			linux,code = <BTN_DPAD_DOWN>;
-		};
-
-		button-l1 {
-			gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>;
-			label = "TL";
-			linux,code = <BTN_TL>;
-		};
-
-		button-l2 {
-			gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_LOW>;
-			label = "TL2";
-			linux,code = <BTN_TL2>;
-		};
-
-		button-select {
-			gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>;
-			label = "SELECT";
-			linux,code = <BTN_SELECT>;
-		};
-
-		button-start {
-			gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_LOW>;
-			label = "START";
-			linux,code = <BTN_START>;
-		};
-
-		button-thumbl {
-			gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_LOW>;
-			label = "THUMBL";
-			linux,code = <BTN_THUMBL>;
-		};
-
-		button-thumbr {
-			gpios = <&gpio3 RK_PA2 GPIO_ACTIVE_LOW>;
-			label = "THUMBR";
-			linux,code = <BTN_THUMBR>;
-		};
-
-		button-up {
-			gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_LOW>;
-			label = "DPAD-UP";
-			linux,code = <BTN_DPAD_UP>;
-		};
-
-		button-x {
-			gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>;
-			label = "NORTH";
-			linux,code = <BTN_NORTH>;
-		};
-	};
-
-	gpio_keys_vol: gpio-keys-vol {
-		compatible = "gpio-keys";
-		autorepeat;
-		pinctrl-0 = <&btn_pins_vol>;
-		pinctrl-names = "default";
-
-		button-vol-down {
-			gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
-			label = "VOLUMEDOWN";
-			linux,code = <KEY_VOLUMEDOWN>;
-		};
-
-		button-vol-up {
-			gpios = <&gpio3 RK_PA7 GPIO_ACTIVE_LOW>;
-			label = "VOLUMEUP";
-			linux,code = <KEY_VOLUMEUP>;
-		};
-	};
-
-	gpio_mux: mux-controller {
-		compatible = "gpio-mux";
-		mux-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_LOW>,
-			    <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>;
-		#mux-control-cells = <0>;
-	};
-
-	hdmi-con {
-		compatible = "hdmi-connector";
-		ddc-i2c-bus = <&i2c5>;
-		type = "c";
-
-		port {
-			hdmi_con_in: endpoint {
-				remote-endpoint = <&hdmi_out_con>;
-			};
-		};
-	};
-
-	leds: pwm-leds {
-		compatible = "pwm-leds";
-
-		green_led: led-0 {
-			color = <LED_COLOR_ID_GREEN>;
-			default-state = "on";
-			function = LED_FUNCTION_POWER;
-			max-brightness = <255>;
-			pwms = <&pwm6 0 25000 0>;
-		};
-
-		amber_led: led-1 {
-			color = <LED_COLOR_ID_AMBER>;
-			function = LED_FUNCTION_CHARGING;
-			max-brightness = <255>;
-			pwms = <&pwm7 0 25000 0>;
-		};
-
-		red_led: led-2 {
-			color = <LED_COLOR_ID_RED>;
-			default-state = "off";
-			function = LED_FUNCTION_STATUS;
-			max-brightness = <255>;
-			pwms = <&pwm0 0 25000 0>;
-		};
-	};
-
-	sdio_pwrseq: sdio-pwrseq {
-		compatible = "mmc-pwrseq-simple";
-		clocks = <&rk817 1>;
-		clock-names = "ext_clock";
-		pinctrl-0 = <&wifi_enable_h>;
-		pinctrl-names = "default";
-		post-power-on-delay-ms = <200>;
-		reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_LOW>;
-	};
-
-	vcc3v3_lcd0_n: regulator-vcc3v3-lcd0 {
-		compatible = "regulator-fixed";
-		gpio = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
-		enable-active-high;
-		pinctrl-0 = <&vcc_lcd_h>;
-		pinctrl-names = "default";
-		regulator-boot-on;
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		regulator-name = "vcc3v3_lcd0_n";
-		vin-supply = <&vcc_3v3>;
-		regulator-state-mem {
-			regulator-off-in-suspend;
-		};
-	};
-
-	vcc_sys: regulator-vcc-sys {
-		compatible = "regulator-fixed";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <3800000>;
-		regulator-max-microvolt = <3800000>;
-		regulator-name = "vcc_sys";
-	};
-
-	vcc_wifi: regulator-vcc-wifi {
-		compatible = "regulator-fixed";
-		enable-active-high;
-		gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
-		pinctrl-0 = <&vcc_wifi_h>;
-		pinctrl-names = "default";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		regulator-name = "vcc_wifi";
-	};
-
-	vibrator: pwm-vibrator {
-		compatible = "pwm-vibrator";
-		pwm-names = "enable";
-		pwms = <&pwm5 0 1000000000 0>;
-	};
-};
-
-&combphy1 {
-	status = "okay";
-};
-
-&cpu0 {
-	cpu-supply = <&vdd_cpu>;
-};
-
-&cpu1 {
-	cpu-supply = <&vdd_cpu>;
-};
-
-&cpu2 {
-	cpu-supply = <&vdd_cpu>;
-};
-
-&cpu3 {
-	cpu-supply = <&vdd_cpu>;
-};
-
-&gpu {
-	mali-supply = <&vdd_gpu>;
-	status = "okay";
-};
-
-&hdmi {
-	ddc-i2c-bus = <&i2c5>;
-	pinctrl-0 = <&hdmitxm0_cec>;
-	pinctrl-names = "default";
-	status = "okay";
-};
-
-&hdmi_in {
-	hdmi_in_vp0: endpoint {
-		remote-endpoint = <&vp0_out_hdmi>;
-	};
-};
-
-&hdmi_out {
-	hdmi_out_con: endpoint {
-		remote-endpoint = <&hdmi_con_in>;
-	};
-};
-
-&hdmi_sound {
-	status = "okay";
-};
-
-&i2c0 {
-	status = "okay";
-
-	rk817: pmic@20 {
-		compatible = "rockchip,rk817";
-		reg = <0x20>;
-		interrupt-parent = <&gpio0>;
-		interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
-		clock-output-names = "rk808-clkout1", "rk808-clkout2";
-		clock-names = "mclk";
-		clocks = <&cru I2S1_MCLKOUT_TX>;
-		assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
-		assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
-		#clock-cells = <1>;
-		#sound-dai-cells = <0>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&i2s1m0_mclk>, <&pmic_int_l>;
-		wakeup-source;
-
-		vcc1-supply = <&vcc_sys>;
-		vcc2-supply = <&vcc_sys>;
-		vcc3-supply = <&vcc_sys>;
-		vcc4-supply = <&vcc_sys>;
-		vcc5-supply = <&vcc_sys>;
-		vcc6-supply = <&vcc_sys>;
-		vcc7-supply = <&vcc_sys>;
-		vcc8-supply = <&vcc_sys>;
-		vcc9-supply = <&dcdc_boost>;
-
-		regulators {
-			vdd_logic: DCDC_REG1 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <1350000>;
-				regulator-ramp-delay = <6001>;
-				regulator-initial-mode = <0x2>;
-				regulator-name = "vdd_logic";
-				regulator-state-mem {
-					regulator-off-in-suspend;
-					regulator-suspend-microvolt = <900000>;
-				};
-			};
-
-			vdd_gpu: DCDC_REG2 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <1350000>;
-				regulator-ramp-delay = <6001>;
-				regulator-initial-mode = <0x2>;
-				regulator-name = "vdd_gpu";
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc_ddr: DCDC_REG3 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-initial-mode = <0x2>;
-				regulator-name = "vcc_ddr";
-				regulator-state-mem {
-					regulator-on-in-suspend;
-				};
-			};
-
-			vcc_3v3: DCDC_REG4 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-				regulator-initial-mode = <0x2>;
-				regulator-name = "vcc_3v3";
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <3300000>;
-				};
-			};
-
-			vcca1v8_pmu: LDO_REG1 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-name = "vcca1v8_pmu";
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <1800000>;
-				};
-			};
-
-			vdda_0v9: LDO_REG2 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <900000>;
-				regulator-max-microvolt = <900000>;
-				regulator-name = "vdda_0v9";
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vdda0v9_pmu: LDO_REG3 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <900000>;
-				regulator-max-microvolt = <900000>;
-				regulator-name = "vdda0v9_pmu";
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <900000>;
-				};
-			};
-
-			vccio_acodec: LDO_REG4 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-				regulator-name = "vccio_acodec";
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vccio_sd: LDO_REG5 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <3300000>;
-				regulator-name = "vccio_sd";
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc3v3_pmu: LDO_REG6 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-				regulator-name = "vcc3v3_pmu";
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <3300000>;
-				};
-			};
-
-			vcc_1v8: LDO_REG7 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-name = "vcc_1v8";
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc1v8_dvp: LDO_REG8 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <3300000>;
-				regulator-name = "vcc1v8_dvp";
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc2v8_dvp: LDO_REG9 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <2800000>;
-				regulator-max-microvolt = <2800000>;
-				regulator-name = "vcc2v8_dvp";
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			dcdc_boost: BOOST {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <4700000>;
-				regulator-max-microvolt = <5400000>;
-				regulator-name = "boost";
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			otg_switch: OTG_SWITCH {
-				regulator-name = "otg_switch";
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-		};
-	};
-
-	vdd_cpu: regulator@40 {
-		compatible = "fcs,fan53555";
-		reg = <0x40>;
-		fcs,suspend-voltage-selector = <1>;
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <712500>;
-		regulator-max-microvolt = <1390000>;
-		regulator-name = "vdd_cpu";
-		regulator-ramp-delay = <2300>;
-		vin-supply = <&vcc_sys>;
-		regulator-state-mem {
-			regulator-off-in-suspend;
-		};
-	};
-};
-
-&i2c1 {
-	/* Unknown/unused device at 0x3c */
-	status = "disabled";
-};
-
-&i2c5 {
-	pinctrl-0 = <&i2c5m1_xfer>;
-	pinctrl-names = "default";
-	status = "okay";
-};
-
-&i2s0_8ch {
-	status = "okay";
-};
-
-&i2s1_8ch {
-	pinctrl-0 = <&i2s1m0_sclktx
-		     &i2s1m0_lrcktx
-		     &i2s1m0_sdi0
-		     &i2s1m0_sdo0>;
-	pinctrl-names = "default";
-	rockchip,trcm-sync-tx-only;
-	status = "okay";
-};
-
-&pinctrl {
-	gpio-btns {
-		btn_pins_ctrl: btn-pins-ctrl {
-			rockchip,pins =
-				<3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>,
-				<3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>,
-				<3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>,
-				<3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>,
-				<3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>,
-				<3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
-				<3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>,
-				<3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>,
-				<3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>,
-				<3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>,
-				<3 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>,
-				<3 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>,
-				<3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_up>,
-				<3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>,
-				<3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>,
-				<3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_up>;
-		};
-
-		btn_pins_vol: btn-pins-vol {
-			rockchip,pins =
-			<3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>,
-			<3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
-		};
-	};
-
-	joy-mux {
-		joy_mux_en: joy-mux-en {
-			rockchip,pins =
-				<0 RK_PB5 RK_FUNC_GPIO &pcfg_output_low>;
-		};
-	};
-
-	pmic {
-		pmic_int_l: pmic-int-l {
-			rockchip,pins =
-				<0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
-		};
-	};
-
-	sdio-pwrseq {
-		wifi_enable_h: wifi-enable-h {
-			rockchip,pins =
-				<4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	vcc3v3-lcd {
-		vcc_lcd_h: vcc-lcd-h {
-			rockchip,pins =
-				<0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	vcc-wifi {
-		vcc_wifi_h: vcc-wifi-h {
-			rockchip,pins =
-				<0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-};
-
-&pmu_io_domains {
-	status = "okay";
-	pmuio1-supply = <&vcc3v3_pmu>;
-	pmuio2-supply = <&vcc3v3_pmu>;
-	vccio1-supply = <&vccio_acodec>;
-	vccio3-supply = <&vccio_sd>;
-	vccio4-supply = <&vcc_1v8>;
-	vccio5-supply = <&vcc_3v3>;
-	vccio6-supply = <&vcc1v8_dvp>;
-	vccio7-supply = <&vcc_3v3>;
-};
-
-&pwm0 {
-	pinctrl-0 = <&pwm0m1_pins>;
-	pinctrl-names = "default";
-	status = "okay";
-};
-
-&pwm5 {
-	status = "okay";
-};
-
-&pwm6 {
-	status = "okay";
-};
-
-&pwm7 {
-	status = "okay";
-};
-
-&saradc {
-	vref-supply = <&vcc_1v8>;
-	status = "okay";
-};
-
-&sdmmc0 {
-	bus-width = <4>;
-	cap-sd-highspeed;
-	cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
-	disable-wp;
-	pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
-	pinctrl-names = "default";
-	sd-uhs-sdr104;
-	vmmc-supply = <&vcc_3v3>;
-	vqmmc-supply = <&vccio_sd>;
-	status = "okay";
-};
-
-&sdmmc1 {
-	bus-width = <4>;
-	cap-sd-highspeed;
-	cd-gpios = <&gpio2 RK_PB2 GPIO_ACTIVE_LOW>;
-	disable-wp;
-	pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk &sdmmc1_det>;
-	pinctrl-names = "default";
-	sd-uhs-sdr104;
-	vmmc-supply = <&vcc_3v3>;
-	vqmmc-supply = <&vcc1v8_dvp>;
-	status = "okay";
-};
-
-&sdmmc2 {
-	bus-width = <4>;
-	cap-sd-highspeed;
-	cap-sdio-irq;
-	keep-power-in-suspend;
-	mmc-pwrseq = <&sdio_pwrseq>;
-	non-removable;
-	pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>;
-	pinctrl-names = "default";
-	vmmc-supply = <&vcc_wifi>;
-	vqmmc-supply = <&vcca1v8_pmu>;
-	status = "okay";
-};
-
-&tsadc {
-	rockchip,hw-tshut-mode = <1>;
-	rockchip,hw-tshut-polarity = <0>;
-	status = "okay";
-};
-
-&uart1 {
-	pinctrl-0 = <&uart1m1_xfer &uart1m1_ctsn &uart1m1_rtsn>;
-	pinctrl-names = "default";
-	uart-has-rtscts;
-	status = "okay";
-
-	bluetooth {
-		compatible = "realtek,rtl8821cs-bt", "realtek,rtl8723bs-bt";
-		device-wake-gpios = <&gpio4 4 GPIO_ACTIVE_HIGH>;
-		enable-gpios = <&gpio4 3 GPIO_ACTIVE_HIGH>;
-		host-wake-gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>;
-	};
-};
-
-&uart2 {
-	status = "okay";
-};
-
-/*
- * Lack the schematics to verify, but port works as a peripheral
- * (and not a host or OTG port).
- */
-&usb_host0_xhci {
-	dr_mode = "peripheral";
-	phys = <&usb2phy0_otg>;
-	phy-names = "usb2-phy";
-	status = "okay";
-};
-
-&usb_host1_ehci {
-	status = "okay";
-};
-
-&usb_host1_ohci {
-	status = "okay";
-};
-
-&usb_host1_xhci {
-	phy-names = "usb2-phy", "usb3-phy";
-	phys = <&usb2phy1_host>, <&combphy1 PHY_TYPE_USB3>;
-	status = "okay";
-};
-
-&usb2phy0 {
-	status = "okay";
-};
-
-&usb2phy0_otg {
-	status = "okay";
-};
-
-&usb2phy1 {
-	status = "okay";
-};
-
-&usb2phy1_host {
-	status = "okay";
-};
-
-&vop {
-	assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
-	assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
-	status = "okay";
-};
-
-&vop_mmu {
-	status = "okay";
-};
-
-&vp0 {
-	vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
-		reg = <ROCKCHIP_VOP2_EP_HDMI0>;
-		remote-endpoint = <&hdmi_in_vp0>;
-	};
-};
diff --git a/arch/arm/dts/rk3566-quartz64-a.dts b/arch/arm/dts/rk3566-quartz64-a.dts
deleted file mode 100644
index 59843a7a199c..000000000000
--- a/arch/arm/dts/rk3566-quartz64-a.dts
+++ /dev/null
@@ -1,838 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-
-/dts-v1/;
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-#include <dt-bindings/soc/rockchip,vop2.h>
-#include "rk3566.dtsi"
-
-/ {
-	model = "Pine64 RK3566 Quartz64-A Board";
-	compatible = "pine64,quartz64-a", "rockchip,rk3566";
-
-	aliases {
-		ethernet0 = &gmac1;
-		mmc0 = &sdmmc0;
-		mmc1 = &sdhci;
-	};
-
-	chosen: chosen {
-		stdout-path = "serial2:1500000n8";
-	};
-
-	gmac1_clkin: external-gmac1-clock {
-		compatible = "fixed-clock";
-		clock-frequency = <125000000>;
-		clock-output-names = "gmac1_clkin";
-		#clock-cells = <0>;
-	};
-
-	fan: gpio_fan {
-		compatible = "gpio-fan";
-		gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
-		gpio-fan,speed-map =
-				<   0 0>,
-				<4500 1>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&fan_en_h>;
-		#cooling-cells = <2>;
-	};
-
-	hdmi-con {
-		compatible = "hdmi-connector";
-		type = "a";
-
-		port {
-			hdmi_con_in: endpoint {
-				remote-endpoint = <&hdmi_out_con>;
-			};
-		};
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		led-work {
-			label = "work-led";
-			default-state = "off";
-			gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
-			pinctrl-names = "default";
-			pinctrl-0 = <&work_led_enable_h>;
-			retain-state-suspended;
-		};
-
-		led-diy {
-			label = "diy-led";
-			default-state = "on";
-			gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
-			linux,default-trigger = "heartbeat";
-			pinctrl-names = "default";
-			pinctrl-0 = <&diy_led_enable_h>;
-			retain-state-suspended;
-		};
-	};
-
-	rk817-sound {
-		compatible = "simple-audio-card";
-		simple-audio-card,format = "i2s";
-		simple-audio-card,name = "Analog RK817";
-		simple-audio-card,mclk-fs = <256>;
-
-		simple-audio-card,cpu {
-			sound-dai = <&i2s1_8ch>;
-		};
-
-		simple-audio-card,codec {
-			sound-dai = <&rk817>;
-		};
-	};
-
-	sdio_pwrseq: sdio-pwrseq {
-		compatible = "mmc-pwrseq-simple";
-		clocks = <&rk817 1>;
-		clock-names = "ext_clock";
-		pinctrl-names = "default";
-		pinctrl-0 = <&wifi_enable_h>;
-		post-power-on-delay-ms = <100>;
-		power-off-delay-us = <5000000>;
-		reset-gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_LOW>;
-	};
-
-	spdif_dit: spdif-dit {
-		compatible = "linux,spdif-dit";
-		#sound-dai-cells = <0>;
-	};
-
-	spdif_sound: spdif-sound {
-		compatible = "simple-audio-card";
-		simple-audio-card,name = "SPDIF";
-
-		simple-audio-card,cpu {
-			sound-dai = <&spdif>;
-		};
-
-		simple-audio-card,codec {
-			sound-dai = <&spdif_dit>;
-		};
-	};
-
-	vcc12v_dcin: vcc12v_dcin {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc12v_dcin";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <12000000>;
-		regulator-max-microvolt = <12000000>;
-	};
-
-	/* vbus feeds the rk817 usb input.
-	 * With no battery attached, also feeds vcc_bat+
-	 * via ON/OFF_BAT jumper
-	 */
-	vbus: vbus {
-		compatible = "regulator-fixed";
-		regulator-name = "vbus";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		vin-supply = <&vcc12v_dcin>;
-	};
-
-	vcc3v3_pcie_p: vcc3v3-pcie-p-regulator {
-		compatible = "regulator-fixed";
-		enable-active-high;
-		gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pcie_enable_h>;
-		regulator-name = "vcc3v3_pcie_p";
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		vin-supply = <&vcc_3v3>;
-	};
-
-	vcc5v0_usb: vcc5v0_usb {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v0_usb";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		vin-supply = <&vcc12v_dcin>;
-	};
-
-	/* all four ports are controlled by one gpio
-	 * the host ports are sourced from vcc5v0_usb
-	 * the otg port is sourced from vcc5v0_midu
-	 */
-	vcc5v0_usb20_host: vcc5v0_usb20_host {
-		compatible = "regulator-fixed";
-		enable-active-high;
-		gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&vcc5v0_usb20_host_en>;
-		regulator-name = "vcc5v0_usb20_host";
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		vin-supply = <&vcc5v0_usb>;
-	};
-
-	vcc5v0_usb20_otg: vcc5v0_usb20_otg {
-		compatible = "regulator-fixed";
-		enable-active-high;
-		gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
-		regulator-name = "vcc5v0_usb20_otg";
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		vin-supply = <&dcdc_boost>;
-	};
-
-	vcc3v3_sd: vcc3v3_sd {
-		compatible = "regulator-fixed";
-		gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&vcc_sd_h>;
-		regulator-boot-on;
-		regulator-name = "vcc3v3_sd";
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		vin-supply = <&vcc_3v3>;
-	};
-
-	/* sourced from vbus and vcc_bat+ via rk817 sw5 */
-	vcc_sys: vcc_sys {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc_sys";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <4400000>;
-		regulator-max-microvolt = <4400000>;
-		vin-supply = <&vbus>;
-	};
-
-	/* sourced from vcc_sys, sdio module operates internally at 3.3v */
-	vcc_wl: vcc_wl {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc_wl";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		vin-supply = <&vcc_sys>;
-	};
-};
-
-&combphy1 {
-	status = "okay";
-};
-
-&combphy2 {
-	status = "okay";
-};
-
-&cpu0 {
-	cpu-supply = <&vdd_cpu>;
-};
-
-&cpu1 {
-	cpu-supply = <&vdd_cpu>;
-};
-
-&cpu2 {
-	cpu-supply = <&vdd_cpu>;
-};
-
-&cpu3 {
-	cpu-supply = <&vdd_cpu>;
-};
-
-&cpu_thermal {
-	trips {
-		cpu_hot: cpu_hot {
-			temperature = <55000>;
-			hysteresis = <2000>;
-			type = "active";
-		};
-	};
-
-	cooling-maps {
-		map1 {
-			trip = <&cpu_hot>;
-			cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-		};
-	};
-};
-
-&gmac1 {
-	assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>;
-	assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>;
-	clock_in_out = "input";
-	phy-supply = <&vcc_3v3>;
-	phy-mode = "rgmii";
-	pinctrl-names = "default";
-	pinctrl-0 = <&gmac1m0_miim
-		     &gmac1m0_tx_bus2
-		     &gmac1m0_rx_bus2
-		     &gmac1m0_rgmii_clk
-		     &gmac1m0_clkinout
-		     &gmac1m0_rgmii_bus>;
-	snps,reset-gpio = <&gpio0 RK_PC3 GPIO_ACTIVE_LOW>;
-	snps,reset-active-low;
-	/* Reset time is 20ms, 100ms for rtl8211f */
-	snps,reset-delays-us = <0 20000 100000>;
-	tx_delay = <0x30>;
-	rx_delay = <0x10>;
-	phy-handle = <&rgmii_phy1>;
-	status = "okay";
-};
-
-&gpu {
-	mali-supply = <&vdd_gpu>;
-	status = "okay";
-};
-
-&hdmi {
-	avdd-0v9-supply = <&vdda_0v9>;
-	avdd-1v8-supply = <&vcc_1v8>;
-	status = "okay";
-};
-
-&hdmi_in {
-	hdmi_in_vp0: endpoint {
-		remote-endpoint = <&vp0_out_hdmi>;
-	};
-};
-
-&hdmi_out {
-	hdmi_out_con: endpoint {
-		remote-endpoint = <&hdmi_con_in>;
-	};
-};
-
-&hdmi_sound {
-	status = "okay";
-};
-
-&i2c0 {
-	status = "okay";
-
-	vdd_cpu: regulator@1c {
-		compatible = "tcs,tcs4525";
-		reg = <0x1c>;
-		fcs,suspend-voltage-selector = <1>;
-		regulator-name = "vdd_cpu";
-		regulator-min-microvolt = <800000>;
-		regulator-max-microvolt = <1150000>;
-		regulator-ramp-delay = <2300>;
-		regulator-always-on;
-		regulator-boot-on;
-		vin-supply = <&vcc_sys>;
-
-		regulator-state-mem {
-			regulator-off-in-suspend;
-		};
-	};
-
-	rk817: pmic@20 {
-		compatible = "rockchip,rk817";
-		reg = <0x20>;
-		interrupt-parent = <&gpio0>;
-		interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
-		assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
-		assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
-		clock-names = "mclk";
-		clocks = <&cru I2S1_MCLKOUT_TX>;
-		clock-output-names = "rk808-clkout1", "rk808-clkout2";
-		#clock-cells = <1>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pmic_int_l>, <&i2s1m0_mclk>;
-		rockchip,system-power-controller;
-		#sound-dai-cells = <0>;
-		wakeup-source;
-
-		vcc1-supply = <&vcc_sys>;
-		vcc2-supply = <&vcc_sys>;
-		vcc3-supply = <&vcc_sys>;
-		vcc4-supply = <&vcc_sys>;
-		vcc5-supply = <&vcc_sys>;
-		vcc6-supply = <&vcc_sys>;
-		vcc7-supply = <&vcc_sys>;
-		vcc8-supply = <&vcc_sys>;
-		vcc9-supply = <&dcdc_boost>;
-
-		regulators {
-			vdd_logic: DCDC_REG1 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <1350000>;
-				regulator-ramp-delay = <6001>;
-				regulator-initial-mode = <0x2>;
-				regulator-name = "vdd_logic";
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <900000>;
-				};
-			};
-
-			vdd_gpu: DCDC_REG2 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <1350000>;
-				regulator-ramp-delay = <6001>;
-				regulator-initial-mode = <0x2>;
-				regulator-name = "vdd_gpu";
-					regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc_ddr: DCDC_REG3 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-initial-mode = <0x2>;
-				regulator-name = "vcc_ddr";
-				regulator-state-mem {
-					regulator-on-in-suspend;
-				};
-			};
-
-			vcc_3v3: DCDC_REG4 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-				regulator-initial-mode = <0x2>;
-				regulator-name = "vcc_3v3";
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcca1v8_pmu: LDO_REG1 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-name = "vcca1v8_pmu";
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <1800000>;
-				};
-			};
-
-			vdda_0v9: LDO_REG2 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <900000>;
-				regulator-max-microvolt = <900000>;
-				regulator-name = "vdda_0v9";
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vdda0v9_pmu: LDO_REG3 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <900000>;
-				regulator-max-microvolt = <900000>;
-				regulator-name = "vdda0v9_pmu";
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <900000>;
-				};
-			};
-
-			vccio_acodec: LDO_REG4 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-				regulator-name = "vccio_acodec";
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vccio_sd: LDO_REG5 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <3300000>;
-				regulator-name = "vccio_sd";
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc3v3_pmu: LDO_REG6 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-				regulator-name = "vcc3v3_pmu";
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <3300000>;
-				};
-			};
-
-			vcc_1v8: LDO_REG7 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-name = "vcc_1v8";
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc1v8_dvp: LDO_REG8 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-name = "vcc1v8_dvp";
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc2v8_dvp: LDO_REG9 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <2800000>;
-				regulator-max-microvolt = <2800000>;
-				regulator-name = "vcc2v8_dvp";
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			dcdc_boost: BOOST {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <5000000>;
-				regulator-max-microvolt = <5000000>;
-				regulator-name = "boost";
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			otg_switch: OTG_SWITCH {
-				regulator-name = "otg_switch";
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-		};
-	};
-};
-
-/* i2c3 is exposed on con40
- * pin 3 - i2c3_sda_m0, pullup to vcc_3v3
- * pin 5 - i2c3_scl_m0, pullup to vcc_3v3
- */
-&i2c3 {
-	status = "okay";
-};
-
-&i2s0_8ch {
-	status = "okay";
-};
-
-&i2s1_8ch {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2s1m0_sclktx
-		     &i2s1m0_lrcktx
-		     &i2s1m0_sdi0
-		     &i2s1m0_sdo0>;
-	rockchip,trcm-sync-tx-only;
-	status = "okay";
-};
-
-&mdio1 {
-	rgmii_phy1: ethernet-phy@0 {
-		compatible = "ethernet-phy-ieee802.3-c22";
-		reg = <0>;
-	};
-};
-
-&pcie2x1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pcie_reset_h>;
-	reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
-	vpcie3v3-supply = <&vcc3v3_pcie_p>;
-	status = "okay";
-};
-
-&pinctrl {
-	bt {
-		bt_enable_h: bt-enable-h {
-			rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-
-		bt_host_wake_l: bt-host-wake-l {
-			rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_down>;
-		};
-
-		bt_wake_l: bt-wake-l {
-			rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	fan {
-		fan_en_h: fan-en-h {
-			rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	leds {
-		work_led_enable_h: work-led-enable-h {
-			rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-
-		diy_led_enable_h: diy-led-enable-h {
-			rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	pcie {
-		pcie_enable_h: pcie-enable-h {
-			rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-
-		pcie_reset_h: pcie-reset-h {
-			rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	pmic {
-		pmic_int_l: pmic-int-l {
-			rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
-		};
-	};
-
-	usb2 {
-		vcc5v0_usb20_host_en: vcc5v0-usb20-host-en {
-			rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	sdio-pwrseq {
-		wifi_enable_h: wifi-enable-h {
-			rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	vcc_sd {
-		vcc_sd_h: vcc-sd-h {
-			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-};
-
-&pmu_io_domains {
-	pmuio1-supply = <&vcc3v3_pmu>;
-	pmuio2-supply = <&vcc3v3_pmu>;
-	vccio1-supply = <&vccio_acodec>;
-	vccio2-supply = <&vcc_1v8>;
-	vccio3-supply = <&vccio_sd>;
-	vccio4-supply = <&vcc_1v8>;
-	vccio5-supply = <&vcc_3v3>;
-	vccio6-supply = <&vcc1v8_dvp>;
-	vccio7-supply = <&vcc_3v3>;
-	status = "okay";
-};
-
-&sdhci {
-	bus-width = <8>;
-	mmc-hs200-1_8v;
-	non-removable;
-	vmmc-supply = <&vcc_3v3>;
-	vqmmc-supply = <&vcc_1v8>;
-	status = "okay";
-};
-
-&sdmmc0 {
-	bus-width = <4>;
-	cap-sd-highspeed;
-	cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
-	disable-wp;
-	pinctrl-names = "default";
-	pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
-	sd-uhs-sdr104;
-	vmmc-supply = <&vcc3v3_sd>;
-	vqmmc-supply = <&vccio_sd>;
-	status = "okay";
-};
-
-&sdmmc1 {
-	bus-width = <4>;
-	cap-sd-highspeed;
-	cap-sdio-irq;
-	keep-power-in-suspend;
-	mmc-pwrseq = <&sdio_pwrseq>;
-	non-removable;
-	pinctrl-names = "default";
-	pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
-	sd-uhs-sdr104;
-	vmmc-supply = <&vcc_wl>;
-	vqmmc-supply = <&vcc_1v8>;
-	status = "okay";
-};
-
-&sfc {
-	pinctrl-0 = <&fspi_pins>;
-	pinctrl-names = "default";
-	#address-cells = <1>;
-	#size-cells = <0>;
-	status = "disabled";
-
-	flash@0 {
-		compatible = "jedec,spi-nor";
-		reg = <0>;
-		spi-max-frequency = <24000000>;
-		spi-rx-bus-width = <4>;
-		spi-tx-bus-width = <1>;
-	};
-};
-
-/* spdif is exposed on con40 pin 18 */
-&spdif {
-	status = "okay";
-};
-
-/* spi1 is exposed on con40
- * pin 11 - spi1_mosi_m1
- * pin 13 - spi1_miso_m1
- * pin 15 - spi1_clk_m1
- * pin 17 - spi1_cs0_m1
- */
-&spi1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&spi1m1_cs0 &spi1m1_pins>;
-};
-
-&tsadc {
-	/* tshut mode 0:CRU 1:GPIO */
-	rockchip,hw-tshut-mode = <1>;
-	/* tshut polarity 0:LOW 1:HIGH */
-	rockchip,hw-tshut-polarity = <0>;
-	status = "okay";
-};
-
-/* uart0 is exposed on con40
- * pin 12 - uart0_tx
- * pin 14 - uart0_rx
- */
-&uart0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&uart0_xfer>;
-	status = "okay";
-};
-
-&uart1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>;
-	status = "okay";
-	uart-has-rtscts;
-
-	bluetooth {
-		compatible = "brcm,bcm43438-bt";
-		clocks = <&rk817 1>;
-		clock-names = "lpo";
-		host-wakeup-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
-		device-wakeup-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
-		shutdown-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
-		vbat-supply = <&vcc_sys>;
-		vddio-supply = <&vcca1v8_pmu>;
-		max-speed = <3000000>;
-	};
-};
-
-/* uart2 is exposed on con40
- * pin 8 - uart2_tx_m0_debug
- * pin 10 - uart2_rx_m0_debug
- */
-&uart2 {
-	status = "okay";
-};
-
-&usb_host0_ehci {
-	status = "okay";
-};
-
-&usb_host0_ohci {
-	status = "okay";
-};
-
-&usb_host1_ehci {
-	status = "okay";
-};
-
-&usb_host1_ohci {
-	status = "okay";
-};
-
-&usb_host0_xhci {
-	dr_mode = "host";
-	status = "okay";
-};
-
-/* usb3 controller is muxed with sata1 */
-&usb_host1_xhci {
-	status = "okay";
-};
-
-&usb2phy0 {
-	status = "okay";
-};
-
-&usb2phy0_host {
-	phy-supply = <&vcc5v0_usb20_host>;
-	status = "okay";
-};
-
-&usb2phy0_otg {
-	phy-supply = <&vcc5v0_usb20_otg>;
-	status = "okay";
-};
-
-&usb2phy1 {
-	status = "okay";
-};
-
-&usb2phy1_host {
-	phy-supply = <&vcc5v0_usb20_host>;
-	status = "okay";
-};
-
-&usb2phy1_otg {
-	phy-supply = <&vcc5v0_usb20_host>;
-	status = "okay";
-};
-
-&vop {
-	assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
-	assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
-	status = "okay";
-};
-
-&vop_mmu {
-	status = "okay";
-};
-
-&vp0 {
-	vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
-		reg = <ROCKCHIP_VOP2_EP_HDMI0>;
-		remote-endpoint = <&hdmi_in_vp0>;
-	};
-};
diff --git a/arch/arm/dts/rk3566-quartz64-b.dts b/arch/arm/dts/rk3566-quartz64-b.dts
deleted file mode 100644
index 2d92713be2a0..000000000000
--- a/arch/arm/dts/rk3566-quartz64-b.dts
+++ /dev/null
@@ -1,737 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-
-/dts-v1/;
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-#include <dt-bindings/soc/rockchip,vop2.h>
-#include "rk3566.dtsi"
-
-/ {
-	model = "Pine64 RK3566 Quartz64-B Board";
-	compatible = "pine64,quartz64-b", "rockchip,rk3566";
-
-	aliases {
-		ethernet0 = &gmac1;
-		mmc0 = &sdmmc0;
-		mmc1 = &sdhci;
-		mmc2 = &sdmmc1;
-	};
-
-	chosen: chosen {
-		stdout-path = "serial2:1500000n8";
-	};
-
-	gmac1_clkin: external-gmac1-clock {
-		compatible = "fixed-clock";
-		clock-frequency = <125000000>;
-		clock-output-names = "gmac1_clkin";
-		#clock-cells = <0>;
-	};
-
-	hdmi-con {
-		compatible = "hdmi-connector";
-		type = "a";
-
-		port {
-			hdmi_con_in: endpoint {
-				remote-endpoint = <&hdmi_out_con>;
-			};
-		};
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		led-user {
-			label = "user-led";
-			default-state = "on";
-			gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
-			linux,default-trigger = "heartbeat";
-			pinctrl-names = "default";
-			pinctrl-0 = <&user_led_enable_h>;
-			retain-state-suspended;
-		};
-	};
-
-	sound {
-		compatible = "simple-audio-card";
-		simple-audio-card,format = "i2s";
-		simple-audio-card,name = "Analog RK809";
-		simple-audio-card,mclk-fs = <256>;
-
-		simple-audio-card,cpu {
-			sound-dai = <&i2s1_8ch>;
-		};
-
-		simple-audio-card,codec {
-			sound-dai = <&rk809>;
-		};
-	};
-
-	sdio_pwrseq: sdio-pwrseq {
-		status = "okay";
-		compatible = "mmc-pwrseq-simple";
-		clocks = <&rk809 1>;
-		clock-names = "ext_clock";
-		pinctrl-names = "default";
-		pinctrl-0 = <&wifi_enable_h>;
-		reset-gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>;
-		post-power-on-delay-ms = <100>;
-		power-off-delay-us = <5000000>;
-	};
-
-	vcc3v3_pcie_p: vcc3v3-pcie-p-regulator {
-		compatible = "regulator-fixed";
-		enable-active-high;
-		gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pcie_enable_h>;
-		regulator-name = "vcc3v3_pcie_p";
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		vin-supply = <&vcc_3v3>;
-	};
-
-	vcc5v0_in: vcc5v0-in-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v0_in";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-	};
-
-	vcc5v0_sys: vcc5v0-sys-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v0_sys";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		vin-supply = <&vcc5v0_in>;
-	};
-
-	vcc3v3_sys: vcc3v3-sys-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc3v3_sys";
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		regulator-always-on;
-		vin-supply = <&vcc5v0_sys>;
-	};
-
-	vcc5v0_usb30_host: vcc5v0-usb30-host-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v0_usb30_host";
-		enable-active-high;
-		gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&vcc5v0_usb30_host_en_h>;
-		regulator-always-on;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		vin-supply = <&vcc5v0_sys>;
-	};
-
-	vcc5v0_usb_otg: vcc5v0-usb-otg-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v0_usb_otg";
-		enable-active-high;
-		gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&vcc5v0_usb_otg_en_h>;
-		regulator-always-on;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		vin-supply = <&vcc5v0_sys>;
-	};
-};
-
-&combphy1 {
-	status = "okay";
-};
-
-&combphy2 {
-	status = "okay";
-};
-
-&cpu0 {
-	cpu-supply = <&vdd_cpu>;
-};
-
-&cpu1 {
-	cpu-supply = <&vdd_cpu>;
-};
-
-&cpu2 {
-	cpu-supply = <&vdd_cpu>;
-};
-
-&cpu3 {
-	cpu-supply = <&vdd_cpu>;
-};
-
-&gmac1 {
-	assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>;
-	assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>;
-	clock_in_out = "input";
-	phy-mode = "rgmii";
-	phy-supply = <&vcc_3v3>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&gmac1m1_miim
-		     &gmac1m1_tx_bus2
-		     &gmac1m1_rx_bus2
-		     &gmac1m1_rgmii_clk
-		     &gmac1m1_clkinout
-		     &gmac1m1_rgmii_bus>;
-	snps,reset-gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>;
-	snps,reset-active-low;
-	/* Reset time is 20ms, 100ms for rtl8211f, also works well here */
-	snps,reset-delays-us = <0 20000 100000>;
-	tx_delay = <0x4f>;
-	rx_delay = <0x24>;
-	phy-handle = <&rgmii_phy1>;
-	status = "okay";
-};
-
-&gpu {
-	mali-supply = <&vdd_gpu>;
-	status = "okay";
-};
-
-&hdmi {
-	avdd-0v9-supply = <&vdda0v9_image>;
-	avdd-1v8-supply = <&vcca1v8_image>;
-	status = "okay";
-};
-
-&hdmi_in {
-	hdmi_in_vp0: endpoint {
-		remote-endpoint = <&vp0_out_hdmi>;
-	};
-};
-
-&hdmi_out {
-	hdmi_out_con: endpoint {
-		remote-endpoint = <&hdmi_con_in>;
-	};
-};
-
-&hdmi_sound {
-	status = "okay";
-};
-
-&i2c0 {
-	status = "okay";
-
-	vdd_cpu: regulator@1c {
-		compatible = "tcs,tcs4525";
-		reg = <0x1c>;
-		fcs,suspend-voltage-selector = <1>;
-		regulator-name = "vdd_cpu";
-		regulator-min-microvolt = <800000>;
-		regulator-max-microvolt = <1150000>;
-		regulator-ramp-delay = <2300>;
-		regulator-always-on;
-		regulator-boot-on;
-		vin-supply = <&vcc5v0_sys>;
-
-		regulator-state-mem {
-			regulator-off-in-suspend;
-		};
-	};
-
-	rk809: pmic@20 {
-		compatible = "rockchip,rk809";
-		reg = <0x20>;
-		interrupt-parent = <&gpio0>;
-		interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
-		assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
-		assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
-		clock-names = "mclk";
-		clocks = <&cru I2S1_MCLKOUT_TX>;
-		clock-output-names = "rk808-clkout1", "rk808-clkout2";
-
-		pinctrl-names = "default";
-		pinctrl-0 = <&pmic_int>, <&i2s1m0_mclk>;
-		rockchip,system-power-controller;
-		#sound-dai-cells = <0>;
-		wakeup-source;
-		#clock-cells = <1>;
-
-		vcc1-supply = <&vcc3v3_sys>;
-		vcc2-supply = <&vcc3v3_sys>;
-		vcc3-supply = <&vcc3v3_sys>;
-		vcc4-supply = <&vcc3v3_sys>;
-		vcc5-supply = <&vcc3v3_sys>;
-		vcc6-supply = <&vcc3v3_sys>;
-		vcc7-supply = <&vcc3v3_sys>;
-		vcc8-supply = <&vcc3v3_sys>;
-		vcc9-supply = <&vcc3v3_sys>;
-
-		regulators {
-			vdd_log: DCDC_REG1 {
-				regulator-name = "vdd_log";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <1350000>;
-				regulator-ramp-delay = <6001>;
-
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <900000>;
-				};
-			};
-
-			vdd_gpu: DCDC_REG2 {
-				regulator-name = "vdd_gpu";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <900000>;
-				regulator-max-microvolt = <1350000>;
-				regulator-ramp-delay = <6001>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-					regulator-suspend-microvolt = <900000>;
-				};
-			};
-
-			vcc_ddr: DCDC_REG3 {
-				regulator-name = "vcc_ddr";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-initial-mode = <0x2>;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-				};
-			};
-
-			vdd_npu: DCDC_REG4 {
-				regulator-name = "vdd_npu";
-				regulator-min-microvolt = <900000>;
-				regulator-max-microvolt = <1350000>;
-				regulator-initial-mode = <0x2>;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc_1v8: DCDC_REG5 {
-				regulator-name = "vcc_1v8";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <1800000>;
-				};
-			};
-
-			vdda0v9_image: LDO_REG1 {
-				regulator-name = "vdda0v9_image";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <900000>;
-				regulator-max-microvolt = <900000>;
-
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <900000>;
-				};
-			};
-
-			vdda_0v9: LDO_REG2 {
-				regulator-name = "vdda_0v9";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <900000>;
-				regulator-max-microvolt = <900000>;
-
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <900000>;
-				};
-			};
-
-			vdda0v9_pmu: LDO_REG3 {
-				regulator-name = "vdda0v9_pmu";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <900000>;
-				regulator-max-microvolt = <900000>;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <900000>;
-				};
-			};
-
-			vccio_acodec: LDO_REG4 {
-				regulator-name = "vccio_acodec";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <3300000>;
-
-				};
-			};
-
-			vccio_sd: LDO_REG5 {
-				regulator-name = "vccio_sd";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <3300000>;
-
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <3300000>;
-				};
-			};
-
-			vcc3v3_pmu: LDO_REG6 {
-				regulator-name = "vcc3v3_pmu";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <3300000>;
-				};
-			};
-
-			vcca_1v8: LDO_REG7 {
-				regulator-name = "vcca_1v8";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <1800000>;
-				};
-			};
-
-			vcca1v8_pmu: LDO_REG8 {
-				regulator-name = "vcca1v8_pmu";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <1800000>;
-				};
-			};
-
-			vcca1v8_image: LDO_REG9 {
-				regulator-name = "vcca1v8_image";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <1800000>;
-				};
-			};
-
-			vcc_3v3: SWITCH_REG1 {
-				regulator-boot-on;
-				regulator-name = "vcc_3v3";
-			};
-
-			vcc3v3_sd: SWITCH_REG2 {
-				regulator-name = "vcc3v3_sd";
-			};
-		};
-	};
-};
-
-/* i2c2_m1 exposed on csi port, pulled up to vcc_3v3 */
-&i2c2 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c2m1_xfer>;
-	status = "okay";
-};
-
-/* i2c3_m1 exposed on dsi port, pulled up to vcc_3v3 */
-&i2c3 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c3m1_xfer>;
-	status = "okay";
-};
-
-/*
- * i2c4_m0 is exposed on PI40, pulled up to vcc_3v3
- * pin 27 - i2c4_sda_m0
- * pin 28 - i2c4_scl_m0
- */
-&i2c4 {
-	status = "okay";
-};
-
-/*
- * i2c5_m0 is exposed on PI40
- * pin 29 - i2c5_scl_m0
- * pin 31 - i2c5_sda_m0
- */
-&i2c5 {
-	status = "disabled";
-};
-
-&i2s0_8ch {
-	status = "okay";
-};
-
-&i2s1_8ch {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2s1m0_sclktx
-		     &i2s1m0_lrcktx
-		     &i2s1m0_sdi0
-		     &i2s1m0_sdo0>;
-	rockchip,trcm-sync-tx-only;
-	status = "okay";
-};
-
-&mdio1 {
-	rgmii_phy1: ethernet-phy@1 {
-		compatible = "ethernet-phy-ieee802.3-c22";
-		reg = <0x1>;
-	};
-};
-
-&pcie2x1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pcie_reset_h>;
-	reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
-	vpcie3v3-supply = <&vcc3v3_pcie_p>;
-	status = "okay";
-};
-
-&pinctrl {
-	bt {
-		bt_enable_h: bt-enable-h {
-			rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-
-		bt_host_wake_l: bt-host-wake-l {
-			rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_down>;
-		};
-
-		bt_wake_l: bt-wake-l {
-			rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	leds {
-		user_led_enable_h: user-led-enable-h {
-			rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	pcie {
-		pcie_enable_h: pcie-enable-h {
-			rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-
-		pcie_reset_h: pcie-reset-h {
-			rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	pmic {
-		pmic_int: pmic_int {
-			rockchip,pins =
-				<0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
-		};
-	};
-
-	sdio-pwrseq {
-		wifi_enable_h: wifi-enable-h {
-			rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	usb {
-		vcc5v0_usb30_host_en_h: vcc5v0-usb30-host-en_h {
-			rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-
-		vcc5v0_usb_otg_en_h: vcc5v0-usb-otg-en_h {
-			rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-};
-
-&pmu_io_domains {
-	status = "okay";
-	pmuio1-supply = <&vcc3v3_pmu>;
-	pmuio2-supply = <&vcca1v8_pmu>;
-	vccio1-supply = <&vccio_acodec>;
-	vccio2-supply = <&vcc_1v8>;
-	vccio3-supply = <&vccio_sd>;
-	vccio4-supply = <&vcca1v8_pmu>;
-	vccio5-supply = <&vcc_3v3>;
-	vccio6-supply = <&vcc_3v3>;
-	vccio7-supply = <&vcc_3v3>;
-};
-
-&saradc {
-	vref-supply = <&vcca_1v8>;
-	status = "okay";
-};
-
-&sdhci {
-	bus-width = <8>;
-	mmc-hs200-1_8v;
-	non-removable;
-	vmmc-supply = <&vcc_3v3>;
-	vqmmc-supply = <&vcc_1v8>;
-	status = "okay";
-};
-
-&sdmmc0 {
-	bus-width = <4>;
-	cap-sd-highspeed;
-	cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
-	disable-wp;
-	pinctrl-names = "default";
-	pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
-	sd-uhs-sdr50;
-	vmmc-supply = <&vcc3v3_sd>;
-	vqmmc-supply = <&vccio_sd>;
-	status = "okay";
-};
-
-&sdmmc1 {
-	bus-width = <4>;
-	cap-sd-highspeed;
-	cap-sdio-irq;
-	keep-power-in-suspend;
-	mmc-pwrseq = <&sdio_pwrseq>;
-	non-removable;
-	pinctrl-names = "default";
-	pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
-	vmmc-supply = <&vcc3v3_sys>;
-	vqmmc-supply = <&vcca1v8_pmu>;
-	status = "okay";
-};
-
-&sfc {
-	pinctrl-0 = <&fspi_pins>;
-	pinctrl-names = "default";
-	#address-cells = <1>;
-	#size-cells = <0>;
-	status = "okay";
-
-	flash@0 {
-		compatible = "jedec,spi-nor";
-		reg = <0>;
-		spi-max-frequency = <24000000>;
-		spi-rx-bus-width = <4>;
-		spi-tx-bus-width = <1>;
-	};
-};
-
-&tsadc {
-	status = "okay";
-};
-
-&uart1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>;
-	status = "okay";
-	uart-has-rtscts;
-
-	bluetooth {
-		compatible = "brcm,bcm4345c5";
-		clocks = <&rk809 1>;
-		clock-names = "lpo";
-		device-wakeup-gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
-		host-wakeup-gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
-		shutdown-gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
-		vbat-supply = <&vcc3v3_sys>;
-		vddio-supply = <&vcca1v8_pmu>;
-	};
-};
-
-/*
- * uart2_m0 is exposed on PI40
- * pin 8  - uart2_tx_m0
- * pin 10 - uart2_rx_m0
- */
-&uart2 {
-	status = "okay";
-};
-
-&usb2phy0_host {
-	phy-supply = <&vcc5v0_usb30_host>;
-	status = "okay";
-};
-
-&usb2phy0_otg {
-	phy-supply = <&vcc5v0_usb_otg>;
-	status = "okay";
-};
-
-&usb2phy1_otg {
-	phy-supply = <&vcc5v0_usb30_host>;
-	status = "okay";
-};
-
-&usb2phy0 {
-	status = "okay";
-};
-
-&usb2phy1 {
-	status = "okay";
-};
-
-&usb_host0_xhci {
-	status = "okay";
-};
-
-&usb_host1_xhci {
-	status = "okay";
-};
-
-&usb_host0_ehci {
-	status = "okay";
-};
-
-&usb_host0_ohci {
-	status = "okay";
-};
-
-&vop {
-	assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
-	assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
-	status = "okay";
-};
-
-&vop_mmu {
-	status = "okay";
-};
-
-&vp0 {
-	vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
-		reg = <ROCKCHIP_VOP2_EP_HDMI0>;
-		remote-endpoint = <&hdmi_in_vp0>;
-	};
-};
diff --git a/arch/arm/dts/rk3566-radxa-cm3-io.dts b/arch/arm/dts/rk3566-radxa-cm3-io.dts
deleted file mode 100644
index 3ae24e39450a..000000000000
--- a/arch/arm/dts/rk3566-radxa-cm3-io.dts
+++ /dev/null
@@ -1,281 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2022 Radxa Limited
- * Copyright (c) 2022 Amarula Solutions(India)
- */
-
-/dts-v1/;
-#include <dt-bindings/soc/rockchip,vop2.h>
-#include "rk3566.dtsi"
-#include "rk3566-radxa-cm3.dtsi"
-
-/ {
-	model = "Radxa Compute Module 3(CM3) IO Board";
-	compatible = "radxa,cm3-io", "radxa,cm3", "rockchip,rk3566";
-
-	aliases {
-		ethernet0 = &gmac1;
-		mmc1 = &sdmmc0;
-	};
-
-	chosen: chosen {
-		stdout-path = "serial2:1500000n8";
-	};
-
-	gmac1_clkin: external-gmac1-clock {
-		compatible = "fixed-clock";
-		clock-frequency = <125000000>;
-		clock-output-names = "gmac1_clkin";
-		#clock-cells = <0>;
-	};
-
-	hdmi-con {
-		compatible = "hdmi-connector";
-		type = "a";
-
-		port {
-			hdmi_con_in: endpoint {
-				remote-endpoint = <&hdmi_out_con>;
-			};
-		};
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		led-1 {
-			gpios = <&gpio4 RK_PA4 GPIO_ACTIVE_LOW>;
-			color = <LED_COLOR_ID_GREEN>;
-			function = LED_FUNCTION_ACTIVITY;
-			linux,default-trigger = "heartbeat";
-			pinctrl-names = "default";
-			pinctrl-0 = <&pi_nled_activity>;
-		};
-	};
-
-	vcc5v0_usb30: vcc5v0-usb30-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v0_usb30";
-		enable-active-high;
-		gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&vcc5v0_usb30_en_h>;
-		regulator-always-on;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		vin-supply = <&vcc_sys>;
-	};
-
-	vcca1v8_image: vcca1v8-image-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcca1v8_image";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <1800000>;
-		regulator-max-microvolt = <1800000>;
-		vin-supply = <&vcc_1v8_p>;
-	};
-
-	vdda0v9_image: vdda0v9-image-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcca0v9_image";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <900000>;
-		regulator-max-microvolt = <900000>;
-		vin-supply = <&vdda_0v9>;
-	};
-};
-
-&combphy1 {
-	status = "okay";
-};
-
-&gmac1 {
-	assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
-	assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&gmac1_clkin>;
-	assigned-clock-rates = <0>, <125000000>;
-	clock_in_out = "input";
-	phy-handle = <&rgmii_phy1>;
-	phy-mode = "rgmii";
-	pinctrl-names = "default";
-	pinctrl-0 = <&gmac1m0_miim
-		     &gmac1m0_tx_bus2
-		     &gmac1m0_rx_bus2
-		     &gmac1m0_rgmii_clk
-		     &gmac1m0_rgmii_bus
-		     &gmac1m0_clkinout>;
-	snps,reset-gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
-	snps,reset-active-low;
-	/* Reset time is 20ms, 100ms for rtl8211f */
-	snps,reset-delays-us = <0 20000 100000>;
-	tx_delay = <0x46>;
-	rx_delay = <0x2e>;
-	status = "okay";
-};
-
-&hdmi {
-	avdd-0v9-supply = <&vdda0v9_image>;
-	avdd-1v8-supply = <&vcca1v8_image>;
-	status = "okay";
-};
-
-&hdmi_in {
-	hdmi_in_vp0: endpoint {
-		remote-endpoint = <&vp0_out_hdmi>;
-	};
-};
-
-&hdmi_out {
-	hdmi_out_con: endpoint {
-		remote-endpoint = <&hdmi_con_in>;
-	};
-};
-
-&hdmi_sound {
-	status = "okay";
-};
-
-&mdio1 {
-	rgmii_phy1: ethernet-phy@0 {
-		compatible = "ethernet-phy-ieee802.3-c22";
-		reg = <0x0>;
-	};
-};
-
-&pinctrl {
-	gmac1 {
-		gmac1m0_miim: gmac1m0-miim {
-			rockchip,pins =
-				/* gmac1_mdcm0 */
-				<3 RK_PC4 3 &pcfg_pull_none_drv_level_15>,
-				/* gmac1_mdiom0 */
-				<3 RK_PC5 3 &pcfg_pull_none_drv_level_15>;
-		};
-
-		gmac1m0_rx_bus2: gmac1m0-rx-bus2 {
-			rockchip,pins =
-				/* gmac1_rxd0m0 */
-				<3 RK_PB1 3 &pcfg_pull_none_drv_level_15>,
-				/* gmac1_rxd1m0 */
-				<3 RK_PB2 3 &pcfg_pull_none_drv_level_15>,
-				/* gmac1_rxdvcrsm0 */
-				<3 RK_PB3 3 &pcfg_pull_none_drv_level_15>;
-		};
-
-		gmac1m0_tx_bus2: gmac1m0-tx-bus2 {
-			rockchip,pins =
-				/* gmac1_txd0m0 */
-				<3 RK_PB5 3 &pcfg_pull_none_drv_level_15>,
-				/* gmac1_txd1m0 */
-				<3 RK_PB6 3 &pcfg_pull_none_drv_level_15>,
-				/* gmac1_txenm0 */
-				<3 RK_PB7 3 &pcfg_pull_none_drv_level_15>;
-		};
-
-		gmac1m0_rgmii_clk: gmac1m0-rgmii-clk {
-			rockchip,pins =
-				/* gmac1_rxclkm0 */
-				<3 RK_PA7 3 &pcfg_pull_none_drv_level_15>,
-				/* gmac1_txclkm0 */
-				<3 RK_PA6 3 &pcfg_pull_none_drv_level_15>;
-		};
-
-		gmac1m0_rgmii_bus: gmac1m0-rgmii-bus {
-			rockchip,pins =
-				/* gmac1_rxd2m0 */
-				<3 RK_PA4 3 &pcfg_pull_none_drv_level_15>,
-				/* gmac1_rxd3m0 */
-				<3 RK_PA5 3 &pcfg_pull_none_drv_level_15>,
-				/* gmac1_txd2m0 */
-				<3 RK_PA2 3 &pcfg_pull_none_drv_level_15>,
-				/* gmac1_txd3m0 */
-				<3 RK_PA3 3 &pcfg_pull_none_drv_level_15>;
-		};
-
-		gmac1m0_clkinout: gmac1m0-clkinout {
-			rockchip,pins =
-				/* gmac1_mclkinoutm0 */
-				<3 RK_PC0 3 &pcfg_pull_none_drv_level_15>;
-		};
-	};
-
-	leds {
-		pi_nled_activity: pi-nled-activity {
-			rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	sdcard {
-		sdmmc_pwren: sdmmc-pwren {
-			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	usb {
-		vcc5v0_usb30_en_h: vcc5v0-host-en-h {
-			rockchip,pins = <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-};
-
-&sdmmc0 {
-	bus-width = <4>;
-	cap-mmc-highspeed;
-	cap-sd-highspeed;
-	disable-wp;
-	vqmmc-supply = <&vccio_sd>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det &sdmmc0_pwren>;
-	status = "okay";
-};
-
-&uart2 {
-	status = "okay";
-};
-
-&usb2phy0_host {
-	phy-supply = <&vcc5v0_usb30>;
-	status = "okay";
-};
-
-&usb2phy1_host {
-	status = "okay";
-};
-
-&usb2phy1_otg {
-	status = "okay";
-};
-
-&usb_host0_ehci {
-	status = "okay";
-};
-
-&usb_host1_xhci {
-	status = "okay";
-};
-
-&usb2phy0_otg {
-	status = "okay";
-};
-
-&usb_host0_xhci {
-	status = "okay";
-};
-
-&vop {
-	assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
-	assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
-	status = "okay";
-};
-
-&vop_mmu {
-	status = "okay";
-};
-
-&vp0 {
-	vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
-		reg = <ROCKCHIP_VOP2_EP_HDMI0>;
-		remote-endpoint = <&hdmi_in_vp0>;
-	};
-};
diff --git a/arch/arm/dts/rk3566-radxa-cm3.dtsi b/arch/arm/dts/rk3566-radxa-cm3.dtsi
deleted file mode 100644
index 45de2630bb50..000000000000
--- a/arch/arm/dts/rk3566-radxa-cm3.dtsi
+++ /dev/null
@@ -1,425 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2022 Radxa Limited
- * Copyright (c) 2022 Amarula Solutions(India)
- */
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/leds/common.h>
-
-/ {
-	compatible = "radxa,cm3", "rockchip,rk3566";
-
-	aliases {
-		mmc0 = &sdhci;
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		led-0 {
-			gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
-			color = <LED_COLOR_ID_GREEN>;
-			function = LED_FUNCTION_STATUS;
-			linux,default-trigger = "timer";
-			default-state = "on";
-			pinctrl-names = "default";
-			pinctrl-0 = <&user_led2>;
-		};
-	};
-
-	vcc_sys: vcc-sys-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc_sys";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-	};
-
-	vcc_1v8: vcc-1v8-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc_1v8";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <1800000>;
-		regulator-max-microvolt = <1800000>;
-		vin-supply = <&vcc_1v8_p>;
-	};
-
-	vcc_3v3: vcc-3v3-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc_3v3";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		vin-supply = <&vcc3v3_sys>;
-	};
-
-	vcca_1v8: vcca-1v8-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcca_1v8";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <1800000>;
-		regulator-max-microvolt = <1800000>;
-		vin-supply = <&vcc_1v8_p>;
-	};
-
-	sdio_pwrseq: pwrseq-sdio {
-		compatible = "mmc-pwrseq-simple";
-		clocks = <&rk817 1>;
-		clock-names = "ext_clock";
-		pinctrl-names = "default";
-		pinctrl-0 = <&wifi_reg_on_h>;
-		reset-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_LOW>;
-	};
-};
-
-&cpu0 {
-	cpu-supply = <&vdd_cpu>;
-};
-
-&cpu1 {
-	cpu-supply = <&vdd_cpu>;
-};
-
-&cpu2 {
-	cpu-supply = <&vdd_cpu>;
-};
-
-&cpu3 {
-	cpu-supply = <&vdd_cpu>;
-};
-
-&gpu {
-	mali-supply = <&vdd_gpu_npu>;
-	status = "okay";
-};
-
-&i2c0 {
-	status = "okay";
-
-	vdd_cpu: regulator@1c {
-		compatible = "tcs,tcs4525";
-		reg = <0x1c>;
-		fcs,suspend-voltage-selector = <1>;
-		regulator-name = "vdd_cpu";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <712500>;
-		regulator-max-microvolt = <1390000>;
-		regulator-ramp-delay = <2300>;
-		vin-supply = <&vcc_sys>;
-
-		regulator-state-mem {
-			regulator-off-in-suspend;
-		};
-	};
-
-	rk817: pmic@20 {
-		compatible = "rockchip,rk817";
-		reg = <0x20>;
-		#clock-cells = <1>;
-		clock-output-names = "rk817-clkout1", "rk817-clkout2";
-		interrupt-parent = <&gpio0>;
-		interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pmic_int_l>;
-		rockchip,system-power-controller;
-		wakeup-source;
-
-		vcc1-supply = <&vcc_sys>;
-		vcc2-supply = <&vcc_sys>;
-		vcc3-supply = <&vcc_sys>;
-		vcc4-supply = <&vcc_sys>;
-		vcc5-supply = <&vcc_sys>;
-		vcc6-supply = <&vcc_sys>;
-		vcc7-supply = <&vcc_sys>;
-
-		regulators {
-			vdd_logic: DCDC_REG1 {
-				regulator-name = "vdd_logic";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-initial-mode = <0x2>;
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <1350000>;
-				regulator-ramp-delay = <6001>;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <900000>;
-				};
-			};
-
-			vdd_gpu_npu: DCDC_REG2 {
-				regulator-name = "vdd_gpu_npu";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-initial-mode = <0x2>;
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <1350000>;
-				regulator-ramp-delay = <6001>;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc_ddr: DCDC_REG3 {
-				regulator-name = "vcc_ddr";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-initial-mode = <0x2>;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-				};
-			};
-
-			vcc3v3_sys: DCDC_REG4 {
-				regulator-name = "vcc3v3_sys";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-initial-mode = <0x2>;
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <3300000>;
-				};
-			};
-
-			vcca1v8_pmu: LDO_REG1 {
-				regulator-name = "vcca1v8_pmu";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <1800000>;
-				};
-			};
-
-			vdda_0v9: LDO_REG2 {
-				regulator-name = "vdda_0v9";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <900000>;
-				regulator-max-microvolt = <900000>;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vdda0v9_pmu: LDO_REG3 {
-				regulator-name = "vdda0v9_pmu";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <900000>;
-				regulator-max-microvolt = <900000>;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <900000>;
-				};
-			};
-
-			vccio_acodec: LDO_REG4 {
-				regulator-name = "vccio_acodec";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vccio_sd: LDO_REG5 {
-				regulator-name = "vccio_sd";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <3300000>;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc3v3_pmu: LDO_REG6 {
-				regulator-name = "vcc3v3_pmu";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <3300000>;
-				};
-			};
-
-			vcc_1v8_p: LDO_REG7 {
-				regulator-name = "vcc_1v8_p";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc1v8_dvp: LDO_REG8 {
-				regulator-name = "vcc1v8_dvp";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc2v8_dvp: LDO_REG9 {
-				regulator-name = "vcc2v8_dvp";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <2800000>;
-				regulator-max-microvolt = <2800000>;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-		};
-	};
-};
-
-&pinctrl {
-	bluetooth {
-		bt_host_wake_h: bt-host-wake-h {
-			rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-
-		bt_reg_on_h: bt-reg-on-h {
-			rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-
-		bt_wake_host_h: bt-wake-host-h {
-			rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	pmic {
-		pmic_int_l: pmic-int-l {
-			rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
-		};
-	};
-
-	leds {
-		user_led2: user-led2 {
-			rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	wifi {
-		wifi_reg_on_h: wifi-reg-on-h {
-			rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-
-		wifi_host_wake_h: wifi-host-wake-h {
-			rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-};
-
-&pmu_io_domains {
-	pmuio1-supply = <&vcc3v3_pmu>;
-	pmuio2-supply = <&vcc_3v3>;
-	vccio1-supply = <&vccio_acodec>;
-	vccio2-supply = <&vcc_1v8>;
-	vccio3-supply = <&vccio_sd>;
-	vccio4-supply = <&vcc_1v8>;
-	vccio5-supply = <&vcc_3v3>;
-	vccio6-supply = <&vcc_3v3>;
-	vccio7-supply = <&vcc_3v3>;
-	status = "okay";
-};
-
-&saradc {
-	vref-supply = <&vcca_1v8>;
-	status = "okay";
-};
-
-&sdmmc1 {
-	#address-cells = <1>;
-	#size-cells = <0>;
-	bus-width = <4>;
-	disable-wp;
-	cap-sd-highspeed;
-	cap-sdio-irq;
-	keep-power-in-suspend;
-	mmc-pwrseq = <&sdio_pwrseq>;
-	non-removable;
-	pinctrl-names = "default";
-	pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_clk &sdmmc1_cmd>;
-	sd-uhs-sdr104;
-	vmmc-supply = <&vcc_3v3>;
-	vqmmc-supply = <&vcc_1v8>;
-	status = "okay";
-
-	wifi@1 {
-		compatible = "brcm,bcm43455-fmac";
-		reg = <1>;
-		interrupt-parent = <&gpio2>;
-		interrupts = <RK_PC1 IRQ_TYPE_LEVEL_HIGH>;
-		interrupt-names = "host-wake";
-		pinctrl-names = "default";
-		pinctrl-0 = <&wifi_host_wake_h>;
-	};
-};
-
-&sdhci {
-	bus-width = <8>;
-	max-frequency = <200000000>;
-	mmc-hs200-1_8v;
-	non-removable;
-	pinctrl-names = "default";
-	pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
-	vmmc-supply = <&vcc_3v3>;
-	vqmmc-supply = <&vcc_1v8>;
-	status = "okay";
-};
-
-&uart1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&uart1m0_ctsn &uart1m0_rtsn &uart1m0_xfer>;
-	status = "okay";
-
-	bluetooth {
-		compatible = "brcm,bcm4345c5";
-		clocks = <&rk817 1>;
-		clock-names = "lpo";
-		device-wakeup-gpios = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>;
-		host-wakeup-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_HIGH>;
-		reset-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_LOW>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&bt_host_wake_h &bt_reg_on_h &bt_wake_host_h>;
-		vbat-supply = <&vcc_3v3>;
-		vddio-supply = <&vcc_1v8>;
-	};
-};
-
-&usb2phy0 {
-	status = "okay";
-};
-
-&usb2phy1 {
-	status = "okay";
-};
-
-&tsadc {
-	rockchip,hw-tshut-mode = <1>;
-	rockchip,hw-tshut-polarity = <0>;
-	status = "okay";
-};
diff --git a/arch/arm/dts/rk3566-soquartz-blade.dts b/arch/arm/dts/rk3566-soquartz-blade.dts
deleted file mode 100644
index fdbf1c783242..000000000000
--- a/arch/arm/dts/rk3566-soquartz-blade.dts
+++ /dev/null
@@ -1,198 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-
-/dts-v1/;
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-
-#include "rk3566-soquartz.dtsi"
-
-/ {
-	model = "PINE64 RK3566 SOQuartz on Blade carrier board";
-	compatible = "pine64,soquartz-blade", "pine64,soquartz", "rockchip,rk3566";
-
-	aliases {
-		ethernet0 = &gmac1;
-	};
-
-	/* labeled VCC3V0_SD in schematic to not conflict with PMIC regulator */
-	vcc3v0_sd: vcc3v0-sd-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc3v0_sd";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		vin-supply = <&vcc3v3_sys>;
-	};
-
-	/* labeled VCC_SSD in schematic */
-	vcc3v3_pcie_p: vcc3v3-pcie-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc3v3_pcie_p";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		vin-supply = <&vbus>;
-	};
-
-	vcc5v_dcin: vcc5v-dcin-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v_dcin";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-	};
-};
-
-&combphy2 {
-	phy-supply = <&vcc3v3_sys>;
-	status = "okay";
-};
-
-&gmac1 {
-	status = "okay";
-};
-
-/*
- * i2c1 is exposed on CM1 / Module1A
- * pin 80 - SCL0 - i2c1_scl_m0, pullup to vcc3v3_pmu
- * pin 82 - SDA0 - i2c1_sda_m0, pullup to vcc3v3_pmu
- */
-&i2c1 {
-	status = "okay";
-
-};
-
-/*
- * i2c2 is exposed on CM1 / Module1A - to PI40
- * pin 56 - GPIO3 - i2c2_scl_m1, pullup to vcc_3v3, shared with i2s1_8ch
- * pin 58 - GPIO2 - i2c2_sda_m1, pullup to vcc_3v3
- */
-&i2c2 {
-	status = "disabled";
-};
-
-/*
- * i2c3 is exposed on CM1 / Module1A - to PI40
- * pin 35 - ID_SC(GPIO28) - i2c3_scl_m0, pullup to vcc_3v3
- * pin 36 - ID_SD(GPIO27) - i2c3_sda_m0, pullup to vcc_3v3
- */
-&i2c3 {
-	status = "disabled";
-};
-
-/*
- * i2c4 is exposed on CM2 / Module1B - to PI40
- * pin 45 - GPIO24 - i2c4_scl_m1
- * pin 47 - GPIO23 - i2c4_sda_m1
- */
-&i2c4 {
-	status = "disabled";
-};
-
-/*
- * i2s1_8ch is exposed on CM1 / Module1A - to PI40
- * pin 24 - GPIO26 - i2s1_sdi1_m1
- * pin 25 - GPIO21 - i2s1_sdo0_m1
- * pin 26 - GPIO19 - i2s1_lrck_tx_m1
- * pin 27 - GPIO20 - i2s1_sdi0_m1
- * pin 29 - GPIO16 - i2s1_sdi3_m1
- * pin 30 - GPIO6  - i2s1_sdi2_m1
- * pin 40 - GPIO9  - i2s1_sdo1_m1, shared with spi3
- * pin 41 - GPIO25 - i2s1_sdo2_m1
- * pin 49 - GPIO18 - i2s1_sclk_tx_m1
- * pin 50 - GPIO17 - i2s1_mclk_m1
- * pin 56 - GPIO3  - i2s1_sdo3_m1, shared with i2c2
- */
-&i2s1_8ch {
-	status = "disabled";
-};
-
-&led_diy {
-	color = <LED_COLOR_ID_RED>;
-	function = LED_FUNCTION_DISK_ACTIVITY;
-	linux,default-trigger = "disk-activity";
-	status = "okay";
-};
-
-&led_work {
-	color = <LED_COLOR_ID_GREEN>;
-	function = LED_FUNCTION_STATUS;
-	linux,default-trigger = "heartbeat";
-	status = "okay";
-};
-
-&pcie2x1 {
-	vpcie3v3-supply = <&vcc3v3_pcie_p>;
-	status = "okay";
-};
-
-&rgmii_phy1 {
-	status = "okay";
-};
-
-/*
- * saradc is exposed on CM1 / Module1A - to J2
- * pin 94 - AIN1 - saradc_vin3
- * pin 96 - AIN0 - saradc_vin2
- */
-&saradc {
-	status = "disabled";
-};
-
-&sdmmc0 {
-	vmmc-supply = <&vcc3v0_sd>;
-	status = "okay";
-};
-
-/*
- * spi3 is exposed on CM1 / Module1A - to PI40
- * pin 37 - GPIO7  - spi3_cs1_m0
- * pin 38 - GPIO11 - spi3_clk_m0
- * pin 39 - GPIO8  - spi3_cs0_m0
- * pin 40 - GPIO9  - spi3_miso_m0, shared with i2s1_8ch
- * pin 44 - GPIO10 - spi3_mosi_m0
- */
-&spi3 {
-	status = "disabled";
-};
-
-/*
- * uart2 is exposed on CM1 / Module1A - to PI40
- * pin 51 - GPIO15 - uart2_rx_m0
- * pin 55 - GPIO14 - uart2_tx_m0
- */
-&uart2 {
-	status = "okay";
-};
-
-/*
- * uart7 is exposed on CM1 / Module1A - to PI40
- * pin 46 - GPIO22 - uart7_tx_m2
- * pin 47 - GPIO23 - uart7_rx_m2
- */
-&uart7 {
-	status = "okay";
-};
-
-&usb2phy0 {
-	status = "okay";
-};
-
-&usb2phy0_otg {
-	phy-supply = <&vbus>;
-	status = "okay";
-};
-
-&usb_host0_xhci {
-	status = "okay";
-};
-
-&vbus {
-	vin-supply = <&vcc5v_dcin>;
-};
diff --git a/arch/arm/dts/rk3566-soquartz-cm4.dts b/arch/arm/dts/rk3566-soquartz-cm4.dts
deleted file mode 100644
index 6ed3fa4aee34..000000000000
--- a/arch/arm/dts/rk3566-soquartz-cm4.dts
+++ /dev/null
@@ -1,196 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-
-/dts-v1/;
-
-#include "rk3566-soquartz.dtsi"
-
-/ {
-	model = "Pine64 RK3566 SoQuartz with CM4-IO Carrier Board";
-	compatible = "pine64,soquartz-cm4io", "pine64,soquartz", "rockchip,rk3566";
-
-	aliases {
-		ethernet0 = &gmac1;
-	};
-
-	/* labeled +12v in schematic */
-	vcc12v_dcin: vcc12v-dcin-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc12v_dcin";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <12000000>;
-		regulator-max-microvolt = <12000000>;
-	};
-
-	/* labeled +5v in schematic */
-	vcc_5v: vcc-5v-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc_5v";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		vin-supply = <&vcc12v_dcin>;
-	};
-
-	vcc_sd_pwr: vcc-sd-pwr-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc_sd_pwr";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		vin-supply = <&vcc3v3_sys>;
-	};
-};
-
-/* phy for pcie */
-&combphy2 {
-	phy-supply = <&vcc3v3_sys>;
-	status = "okay";
-};
-
-&gmac1 {
-	status = "okay";
-};
-
-/*
- * i2c1 is exposed on CM1 / Module1A
- * pin 80 - SCL0 - i2c1_scl_m0, pullup to vcc3v3_pmu
- * pin 82 - SDA0 - i2c1_sda_m0, pullup to vcc3v3_pmu
- */
-&i2c1 {
-	status = "okay";
-
-	/*
-	 * the rtc interrupt is tied to PMIC_PWRON,
-	 * it will force reset the board if triggered.
-	 */
-	pcf85063: rtc@51 {
-		compatible = "nxp,pcf85063";
-		reg = <0x51>;
-	};
-};
-
-/*
- * i2c2 is exposed on CM1 / Module1A - to PI40
- * pin 56 - GPIO3 - i2c2_scl_m1, pullup to vcc_3v3, shared with i2s1_8ch
- * pin 58 - GPIO2 - i2c2_sda_m1, pullup to vcc_3v3
- */
-&i2c2 {
-	status = "disabled";
-};
-
-/*
- * i2c3 is exposed on CM1 / Module1A - to PI40
- * pin 35 - ID_SC(GPIO28) - i2c3_scl_m0, pullup to vcc_3v3
- * pin 36 - ID_SD(GPIO27) - i2c3_sda_m0, pullup to vcc_3v3
- */
-&i2c3 {
-	status = "disabled";
-};
-
-/*
- * i2c4 is exposed on CM2 / Module1B - to PI40
- * pin 45 - GPIO24 - i2c4_scl_m1
- * pin 47 - GPIO23 - i2c4_sda_m1
- */
-&i2c4 {
-	status = "disabled";
-};
-
-/*
- * i2s1_8ch is exposed on CM1 / Module1A - to PI40
- * pin 24 - GPIO26 - i2s1_sdi1_m1
- * pin 25 - GPIO21 - i2s1_sdo0_m1
- * pin 26 - GPIO19 - i2s1_lrck_tx_m1
- * pin 27 - GPIO20 - i2s1_sdi0_m1
- * pin 29 - GPIO16 - i2s1_sdi3_m1
- * pin 30 - GPIO6  - i2s1_sdi2_m1
- * pin 40 - GPIO9  - i2s1_sdo1_m1, shared with spi3
- * pin 41 - GPIO25 - i2s1_sdo2_m1
- * pin 49 - GPIO18 - i2s1_sclk_tx_m1
- * pin 50 - GPIO17 - i2s1_mclk_m1
- * pin 56 - GPIO3  - i2s1_sdo3_m1, shared with i2c2
- */
-&i2s1_8ch {
-	status = "disabled";
-};
-
-&led_diy {
-	status = "okay";
-};
-
-&led_work {
-	status = "okay";
-};
-
-&pcie2x1 {
-	vpcie3v3-supply = <&vcc_3v3>;
-	status = "okay";
-};
-
-&rgmii_phy1 {
-	status = "okay";
-};
-
-/*
- * saradc is exposed on CM1 / Module1A - to J2
- * pin 94 - AIN1 - saradc_vin3
- * pin 96 - AIN0 - saradc_vin2
- */
-&saradc {
-	status = "disabled";
-};
-
-&sdmmc0 {
-	vmmc-supply = <&vcc_sd_pwr>;
-	status = "okay";
-};
-
-/*
- *  spi3 is exposed on CM1 / Module1A - to PI40
- * pin 37 - GPIO7  - spi3_cs1_m0
- * pin 38 - GPIO11 - spi3_clk_m0
- * pin 39 - GPIO8  - spi3_cs0_m0
- * pin 40 - GPIO9  - spi3_miso_m0, shared with i2s1_8ch
- * pin 44 - GPIO10 - spi3_mosi_m0
- */
-&spi3 {
-	status = "disabled";
-};
-
-/*
- * uart2 is exposed on CM1 / Module1A - to PI40
- * pin 51 - GPIO15 - uart2_rx_m0
- * pin 55 - GPIO14 - uart2_tx_m0
- */
-&uart2 {
-	status = "okay";
-};
-
-/*
- * uart7 is exposed on CM1 / Module1A - to PI40
- * pin 46 - GPIO22 - uart7_tx_m2
- * pin 47 - GPIO23 - uart7_rx_m2
- */
-&uart7 {
-	status = "okay";
-};
-
-&usb2phy0 {
-	status = "okay";
-};
-
-&usb2phy0_otg {
-	phy-supply = <&vcc_5v>;
-	status = "okay";
-};
-
-&usb_host0_xhci {
-	status = "okay";
-};
-
-&vbus {
-	vin-supply = <&vcc_5v>;
-};
diff --git a/arch/arm/dts/rk3566-soquartz-model-a.dts b/arch/arm/dts/rk3566-soquartz-model-a.dts
deleted file mode 100644
index f2095dfa4eaf..000000000000
--- a/arch/arm/dts/rk3566-soquartz-model-a.dts
+++ /dev/null
@@ -1,236 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-
-/dts-v1/;
-
-#include "rk3566-soquartz.dtsi"
-
-/ {
-	model = "PINE64 RK3566 SOQuartz on Model A carrier board";
-	compatible = "pine64,soquartz-model-a", "pine64,soquartz", "rockchip,rk3566";
-
-	aliases {
-		ethernet0 = &gmac1;
-	};
-
-	/* labeled DCIN_12V in schematic */
-	vcc12v_dcin: vcc12v-dcin-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc12v_dcin";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <12000000>;
-		regulator-max-microvolt = <12000000>;
-	};
-
-	vcc5v0_usb: vcc5v0-usb-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v0_usb";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		vin-supply = <&vcc12v_dcin>;
-	};
-
-	/*
-	 * Labelled VCC3V0_SD in schematic to not conflict with PMIC
-	 * regulator, it's 3.3v in actuality
-	 */
-	vcc3v0_sd: vcc3v0-sd-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc3v0_sd";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		vin-supply = <&vcc3v3_sys>;
-	};
-
-	vcc3v3_pcie: vcc3v3-pcie-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc3v3_pcie";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		vin-supply = <&vcc12v_dcin>;
-	};
-
-	vcc12v_pcie: vcc12v-pcie-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc12v_pcie";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <12000000>;
-		regulator-max-microvolt = <12000000>;
-		vin-supply = <&vcc12v_dcin>;
-	};
-};
-
-/* phy for pcie */
-&combphy2 {
-	phy-supply = <&vcc3v3_sys>;
-	status = "okay";
-};
-
-&gmac1 {
-	status = "okay";
-};
-
-/*
- * i2c1 is exposed on CM1 / Module1A
- * pin 80 - SCL0 - i2c1_scl_m0, pullup to vcc3v3_pmu
- * pin 82 - SDA0 - i2c1_sda_m0, pullup to vcc3v3_pmu
- */
-&i2c1 {
-	status = "okay";
-
-	/*
-	 * the rtc interrupt is tied to PMIC_PWRON,
-	 * it will force reset the board if triggered.
-	 */
-	pcf85063: rtc@51 {
-		compatible = "nxp,pcf85063";
-		reg = <0x51>;
-	};
-};
-
-/*
- * i2c2 is exposed on CM1 / Module1A - to PI40
- * pin 56 - GPIO3 - i2c2_scl_m1, pullup to vcc_3v3, shared with i2s1_8ch
- * pin 58 - GPIO2 - i2c2_sda_m1, pullup to vcc_3v3
- */
-&i2c2 {
-	status = "disabled";
-};
-
-/*
- * i2c3 is exposed on CM1 / Module1A - to PI40
- * pin 35 - ID_SC(GPIO28) - i2c3_scl_m0, pullup to vcc_3v3
- * pin 36 - ID_SD(GPIO27) - i2c3_sda_m0, pullup to vcc_3v3
- */
-&i2c3 {
-	status = "disabled";
-};
-
-/*
- * i2c4 is exposed on CM2 / Module1B - to PI40
- * pin 45 - GPIO24 - i2c4_scl_m1
- * pin 47 - GPIO23 - i2c4_sda_m1
- */
-&i2c4 {
-	status = "disabled";
-};
-
-/*
- * i2s1_8ch is exposed on CM1 / Module1A - to PI40
- * pin 24 - GPIO26 - i2s1_sdi1_m1
- * pin 25 - GPIO21 - i2s1_sdo0_m1
- * pin 26 - GPIO19 - i2s1_lrck_tx_m1
- * pin 27 - GPIO20 - i2s1_sdi0_m1
- * pin 29 - GPIO16 - i2s1_sdi3_m1
- * pin 30 - GPIO6  - i2s1_sdi2_m1
- * pin 40 - GPIO9  - i2s1_sdo1_m1, shared with spi3
- * pin 41 - GPIO25 - i2s1_sdo2_m1
- * pin 49 - GPIO18 - i2s1_sclk_tx_m1
- * pin 50 - GPIO17 - i2s1_mclk_m1
- * pin 56 - GPIO3  - i2s1_sdo3_m1, shared with i2c2
- */
-&i2s1_8ch {
-	status = "disabled";
-};
-
-&led_diy {
-	status = "okay";
-};
-
-&led_work {
-	status = "okay";
-};
-
-&pcie2x1 {
-	vpcie3v3-supply = <&vcc3v3_pcie>;
-	status = "okay";
-};
-
-&rgmii_phy1 {
-	status = "okay";
-};
-
-&rgmii_phy1 {
-	status = "okay";
-};
-
-/*
- * saradc is exposed on CM1 / Module1A - to J2
- * pin 94 - AIN1 - saradc_vin3
- * pin 96 - AIN0 - saradc_vin2
- */
-&saradc {
-	status = "disabled";
-};
-
-/*
- * vmmc-supply is vcc3v3_sd on v1.0 and vcc3v0_sd on v1.1+
- * the soquartz SoM has SDMMC_PWR (CM1 pin 75) hardwired to vcc3v3_sys,
- * so we use vcc3v3_sd here to ensure the regulator is enabled on older boards.
- */
-&sdmmc0 {
-	vmmc-supply = <&vcc3v3_sd>;
-	status = "okay";
-};
-
-/*
- * spi3 is exposed on CM1 / Module1A - to PI40
- * pin 37 - GPIO7  - spi3_cs1_m0
- * pin 38 - GPIO11 - spi3_clk_m0
- * pin 39 - GPIO8  - spi3_cs0_m0
- * pin 40 - GPIO9  - spi3_miso_m0, shared with i2s1_8ch
- * pin 44 - GPIO10 - spi3_mosi_m0
- */
-&spi3 {
-	status = "disabled";
-};
-
-/*
- * uart2 is exposed on CM1 / Module1A - to PI40
- * pin 51 - GPIO15 - uart2_rx_m0
- * pin 55 - GPIO14 - uart2_tx_m0
- */
-&uart2 {
-	status = "okay";
-};
-
-/*
- * uart7 is exposed on CM1 / Module1A - to PI40
- * pin 46 - GPIO22 - uart7_tx_m2
- * pin 47 - GPIO23 - uart7_rx_m2
- */
-&uart7 {
-	status = "okay";
-};
-
-&usb2phy0 {
-	status = "okay";
-};
-
-&usb2phy0_otg {
-	phy-supply = <&vcc5v0_usb>;
-	status = "okay";
-};
-
-&usb_host0_xhci {
-	status = "okay";
-};
-
-&vbus {
-	vin-supply = <&vcc5v0_usb>;
-};
-
-&vcc3v3_sd {
-	regulator-always-on;
-	regulator-boot-on;
-	regulator-min-microvolt = <3300000>;
-	regulator-max-microvolt = <3300000>;
-	status = "okay";
-};
diff --git a/arch/arm/dts/rk3566-soquartz.dtsi b/arch/arm/dts/rk3566-soquartz.dtsi
deleted file mode 100644
index bfb7b952f4c5..000000000000
--- a/arch/arm/dts/rk3566-soquartz.dtsi
+++ /dev/null
@@ -1,684 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-
-/dts-v1/;
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-#include <dt-bindings/soc/rockchip,vop2.h>
-#include "rk3566.dtsi"
-
-/ {
-	model = "Pine64 RK3566 SoQuartz SOM";
-	compatible = "pine64,soquartz", "rockchip,rk3566";
-
-	aliases {
-		mmc0 = &sdmmc0;
-		mmc1 = &sdhci;
-		mmc2 = &sdmmc1;
-	};
-
-	chosen: chosen {
-		stdout-path = "serial2:1500000n8";
-	};
-
-	gmac1_clkin: external-gmac1-clock {
-		compatible = "fixed-clock";
-		clock-frequency = <125000000>;
-		clock-output-names = "gmac1_clkin";
-		#clock-cells = <0>;
-	};
-
-	hdmi-con {
-		compatible = "hdmi-connector";
-		type = "a";
-
-		port {
-			hdmi_con_in: endpoint {
-				remote-endpoint = <&hdmi_out_con>;
-			};
-		};
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		led_diy: led-diy {
-			label = "diy-led";
-			default-state = "on";
-			gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_LOW>;
-			linux,default-trigger = "heartbeat";
-			pinctrl-names = "default";
-			pinctrl-0 = <&diy_led_enable_h>;
-			retain-state-suspended;
-			status = "disabled";
-		};
-
-		led_work: led-work {
-			label = "work-led";
-			default-state = "off";
-			gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>;
-			pinctrl-names = "default";
-			pinctrl-0 = <&work_led_enable_h>;
-			retain-state-suspended;
-			status = "disabled";
-		};
-	};
-
-	sdio_pwrseq: sdio-pwrseq {
-		status = "okay";
-		compatible = "mmc-pwrseq-simple";
-		clocks = <&rk809 1>;
-		clock-names = "ext_clock";
-		pinctrl-names = "default";
-		pinctrl-0 = <&wifi_enable_h>;
-		reset-gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_LOW>;
-	};
-
-	vbus: vbus-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vbus";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-	};
-
-	/* sourced from vbus, vbus is provided by the carrier board */
-	vcc5v0_sys: vcc5v0-sys-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v0_sys";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		vin-supply = <&vbus>;
-	};
-
-	vcc3v3_sys: vcc3v3-sys-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc3v3_sys";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		vin-supply = <&vcc5v0_sys>;
-	};
-};
-
-&cpu0 {
-	cpu-supply = <&vdd_cpu>;
-};
-
-&cpu1 {
-	cpu-supply = <&vdd_cpu>;
-};
-
-&cpu2 {
-	cpu-supply = <&vdd_cpu>;
-};
-
-&cpu3 {
-	cpu-supply = <&vdd_cpu>;
-};
-
-&gmac1 {
-	assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>;
-	assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>;
-	clock_in_out = "input";
-	phy-supply = <&vcc_3v3>;
-	phy-mode = "rgmii";
-	pinctrl-names = "default";
-	pinctrl-0 = <&gmac1m0_miim
-		     &gmac1m0_tx_bus2
-		     &gmac1m0_rx_bus2
-		     &gmac1m0_rgmii_clk
-		     &gmac1m0_clkinout
-		     &gmac1m0_rgmii_bus>;
-	snps,reset-gpio = <&gpio0 RK_PC3 GPIO_ACTIVE_LOW>;
-	snps,reset-active-low;
-	/* Reset time is 20ms, 100ms for rtl8211f, also works well here */
-	snps,reset-delays-us = <0 20000 100000>;
-	tx_delay = <0x30>;
-	rx_delay = <0x10>;
-	phy-handle = <&rgmii_phy1>;
-	status = "disabled";
-};
-
-&gpio0 {
-	nextrst-hog {
-		gpio-hog;
-		/*
-		 * GPIO_ACTIVE_LOW + output-low here means that the pin is set
-		 * to high, because output-low decides the value pre-inversion.
-		 */
-		gpios = <RK_PA5 GPIO_ACTIVE_LOW>;
-		line-name = "nEXTRST";
-		output-low;
-	};
-};
-
-&gpu {
-	mali-supply = <&vdd_gpu>;
-	status = "okay";
-};
-
-&hdmi {
-	avdd-0v9-supply = <&vdda0v9_image>;
-	avdd-1v8-supply = <&vcca1v8_image>;
-	status = "okay";
-};
-
-&hdmi_in {
-	hdmi_in_vp0: endpoint {
-		remote-endpoint = <&vp0_out_hdmi>;
-	};
-};
-
-&hdmi_out {
-	hdmi_out_con: endpoint {
-		remote-endpoint = <&hdmi_con_in>;
-	};
-};
-
-&hdmi_sound {
-	status = "okay";
-};
-
-&i2c0 {
-	status = "okay";
-
-	vdd_cpu: regulator@1c {
-		compatible = "tcs,tcs4525";
-		reg = <0x1c>;
-		fcs,suspend-voltage-selector = <1>;
-		regulator-name = "vdd_cpu";
-		regulator-min-microvolt = <800000>;
-		regulator-max-microvolt = <1150000>;
-		regulator-ramp-delay = <2300>;
-		regulator-always-on;
-		regulator-boot-on;
-		vin-supply = <&vcc5v0_sys>;
-
-		regulator-state-mem {
-			regulator-off-in-suspend;
-		};
-	};
-
-	rk809: pmic@20 {
-		compatible = "rockchip,rk809";
-		reg = <0x20>;
-		interrupt-parent = <&gpio0>;
-		interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
-		#clock-cells = <1>;
-		clock-output-names = "rk808-clkout1", "rk808-clkout2";
-		pinctrl-names = "default";
-		pinctrl-0 = <&pmic_int_l>;
-		rockchip,system-power-controller;
-		wakeup-source;
-
-		vcc1-supply = <&vcc3v3_sys>;
-		vcc2-supply = <&vcc3v3_sys>;
-		vcc3-supply = <&vcc3v3_sys>;
-		vcc4-supply = <&vcc3v3_sys>;
-		vcc5-supply = <&vcc3v3_sys>;
-		vcc6-supply = <&vcc3v3_sys>;
-		vcc7-supply = <&vcc3v3_sys>;
-		vcc8-supply = <&vcc3v3_sys>;
-		vcc9-supply = <&vcc3v3_sys>;
-
-		regulators {
-			vdd_logic: DCDC_REG1 {
-				regulator-name = "vdd_logic";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <1350000>;
-				regulator-ramp-delay = <6001>;
-				regulator-initial-mode = <0x2>;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <900000>;
-				};
-			};
-
-			vdd_gpu: DCDC_REG2 {
-				regulator-name = "vdd_gpu";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <1350000>;
-				regulator-ramp-delay = <6001>;
-				regulator-initial-mode = <0x2>;
-					regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc_ddr: DCDC_REG3 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-initial-mode = <0x2>;
-				regulator-name = "vcc_ddr";
-				regulator-state-mem {
-					regulator-on-in-suspend;
-				};
-			};
-
-			vdd_npu: DCDC_REG4 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <1350000>;
-				regulator-initial-mode = <0x2>;
-				regulator-name = "vdd_npu";
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc_1v8: DCDC_REG5 {
-				regulator-name = "vcc_1v8";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <1800000>;
-				};
-			};
-
-			vdda0v9_image: LDO_REG1 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <900000>;
-				regulator-max-microvolt = <900000>;
-				regulator-name = "vdda0v9_image";
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <900000>;
-				};
-			};
-
-			vdda_0v9: LDO_REG2 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <900000>;
-				regulator-max-microvolt = <900000>;
-				regulator-name = "vdda_0v9";
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vdda0v9_pmu: LDO_REG3 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <900000>;
-				regulator-max-microvolt = <900000>;
-				regulator-name = "vdda0v9_pmu";
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <900000>;
-				};
-			};
-
-			vccio_acodec: LDO_REG4 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-				regulator-name = "vccio_acodec";
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vccio_sd: LDO_REG5 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <3300000>;
-				regulator-name = "vccio_sd";
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc3v3_pmu: LDO_REG6 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-				regulator-name = "vcc3v3_pmu";
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <3300000>;
-				};
-			};
-
-			vcca_1v8: LDO_REG7 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-name = "vcca_1v8";
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcca1v8_pmu: LDO_REG8 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-name = "vcca1v8_pmu";
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcca1v8_image: LDO_REG9 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-name = "vcca1v8_image";
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc_3v3: SWITCH_REG1 {
-				regulator-name = "vcc_3v3";
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc3v3_sd: SWITCH_REG2 {
-				regulator-name = "vcc3v3_sd";
-				status = "disabled";
-				regulator-state-mem {
-					regulator-on-in-suspend;
-				};
-			};
-
-		};
-	};
-};
-
-/*
- * i2c1 is exposed on CM1 / Module1A
- * pin 80 - i2c1_scl_m0, pullup to vcc3v3_pmu
- * pin 82 - i2c1_sda_m0, pullup to vcc3v3_pmu
- */
-&i2c1 {
-	status = "disabled";
-};
-
-/*
- * i2c2 is exposed on CM1 / Module1A
- * pin 56 - i2c2_scl_m1, pullup to vcc_3v3, shared with i2s1_8ch
- * pin 58 - i2c2_sda_m1, pullup to vcc_3v3
- */
-&i2c2 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c2m1_xfer>;
-	status = "disabled";
-};
-
-/*
- * i2c3 is exposed on CM1 / Module1A
- * pin 35 - i2c3_scl_m0, pullup to vcc_3v3
- * pin 36 - i2c3_sda_m0, pullup to vcc_3v3
- */
-&i2c3 {
-	status = "disabled";
-};
-
-/*
- * i2c4 is exposed on CM2 / Module1B
- * pin 45 - i2c4_scl_m1
- * pin 47 - i2c4_sda_m1
- */
-&i2c4 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c4m1_xfer>;
-	status = "disabled";
-};
-
-&i2s0_8ch {
-	status = "okay";
-};
-
-/*
- * i2s1_8ch is exposed on CM1 / Module1A
- * pin 24 - i2s1_sdi1_m1
- * pin 25 - i2s1_sdo0_m1
- * pin 26 - i2s1_lrck_tx_m1
- * pin 27 - i2s1_sdi0_m1
- * pin 29 - i2s1_sdi3_m1
- * pin 30 - i2s1_sdi2_m1
- * pin 40 - i2s1_sdo1_m1, shared with spi3
- * pin 41 - i2s1_sdo2_m1
- * pin 49 - i2s1_sclk_tx_m1
- * pin 50 - i2s1_mclk_m1
- * pin 56 - i2s1_sdo3_m1, shared with i2c2
- */
-&i2s1_8ch {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2s1m1_sclktx &i2s1m1_sclkrx
-		     &i2s1m1_lrcktx &i2s1m1_lrckrx
-		     &i2s1m1_sdi0   &i2s1m1_sdi1
-		     &i2s1m1_sdi2   &i2s1m1_sdi3
-		     &i2s1m1_sdo0   &i2s1m1_sdo1
-		     &i2s1m1_sdo2   &i2s1m1_sdo3>;
-	status = "disabled";
-};
-
-&mdio1 {
-	rgmii_phy1: ethernet-phy@0 {
-		compatible = "ethernet-phy-ieee802.3-c22";
-		reg = <0>;
-		status = "disabled";
-	};
-};
-
-&pcie2x1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pcie_reset_h>;
-	reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
-};
-
-&pinctrl {
-	bt {
-		bt_enable_h: bt-enable-h {
-			rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-
-		bt_host_wake_l: bt-host-wake-l {
-			rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_down>;
-		};
-
-		bt_wake_l: bt-wake-l {
-			rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	leds {
-		work_led_enable_h: work-led-enable-h {
-			rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-
-		diy_led_enable_h: diy-led-enable-h {
-			rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	pcie {
-		pcie_clkreq_h: pcie-clkreq-h {
-			rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-		pcie_reset_h: pcie-reset-h {
-			rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	pmic {
-		pmic_int_l: pmic-int-l {
-			rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
-		};
-	};
-
-	sdio-pwrseq {
-		wifi_enable_h: wifi-enable-h {
-			rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-};
-
-&pmu_io_domains {
-	pmuio1-supply = <&vcc3v3_pmu>;
-	pmuio2-supply = <&vcc3v3_pmu>;
-	vccio1-supply = <&vcc_3v3>;
-	vccio2-supply = <&vcc_1v8>;
-	vccio3-supply = <&vccio_sd>;
-	vccio4-supply = <&vcc_1v8>;
-	vccio5-supply = <&vcc_3v3>;
-	vccio6-supply = <&vcc_3v3>;
-	vccio7-supply = <&vcc_3v3>;
-	status = "okay";
-};
-
-/*
- * saradc is exposed on CM1 / Module1A
- * pin 94 - saradc_vin3
- * pin 96 - saradc_vin2
- */
-&saradc {
-	vref-supply = <&vcca_1v8>;
-	status = "disabled";
-};
-
-&sdhci {
-	bus-width = <8>;
-	mmc-hs200-1_8v;
-	non-removable;
-	vmmc-supply = <&vcc_3v3>;
-	vqmmc-supply = <&vcc_1v8>;
-	status = "okay";
-};
-
-&sdmmc0 {
-	broken-cd;
-	bus-width = <4>;
-	cap-sd-highspeed;
-	disable-wp;
-	pinctrl-names = "default";
-	pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
-	vqmmc-supply = <&vccio_sd>;
-	status = "disabled";
-};
-
-&sdmmc1 {
-	bus-width = <4>;
-	cap-sd-highspeed;
-	cap-sdio-irq;
-	keep-power-in-suspend;
-	mmc-pwrseq = <&sdio_pwrseq>;
-	non-removable;
-	pinctrl-names = "default";
-	pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
-	sd-uhs-sdr50;
-	vmmc-supply = <&vcc3v3_sys>;
-	vqmmc-supply = <&vcc_1v8>;
-	status = "okay";
-};
-
-/*
- * spi3 is exposed on CM1 / Module1A
- * pin 37 - spi3_cs1_m0
- * pin 38 - spi3_clk_m0
- * pin 39 - spi3_cs0_m0
- * pin 40 - spi3_miso_m0, shared with i2s1_8ch
- * pin 44 - spi3_mosi_m0
- */
-&spi3 {
-	status = "disabled";
-};
-
-&tsadc {
-	status = "okay";
-};
-
-&uart1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>;
-	uart-has-rtscts;
-	status = "okay";
-
-	bluetooth {
-		compatible = "brcm,bcm43438-bt";
-		clocks = <&rk809 1>;
-		clock-names = "lpo";
-		device-wakeup-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
-		host-wakeup-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
-		shutdown-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
-		vbat-supply = <&vcc3v3_sys>;
-		vddio-supply = <&vcca1v8_pmu>;
-	};
-};
-
-/*
- * uart2 is exposed on CM1 / Module1A
- * pin 51 - uart2_rx_m0
- * pin 55 - uart2_tx_m0
- */
-&uart2 {
-	status = "disabled";
-};
-
-/*
- * uart7 is exposed on CM1 / Module1A
- * pin 46 - uart7_tx_m2
- * pin 47 - uart7_rx_m2
- */
-&uart7 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&uart7m2_xfer>;
-	status = "disabled";
-};
-
-/* dwc3_otg is the only usb port available */
-&usb2phy0 {
-	status = "disabled";
-};
-
-&usb2phy0_otg {
-	status = "disabled";
-};
-
-&usb_host0_xhci {
-	status = "disabled";
-};
-
-&vop {
-	assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
-	assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
-	status = "okay";
-};
-
-&vop_mmu {
-	status = "okay";
-};
-
-&vp0 {
-	vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
-		reg = <ROCKCHIP_VOP2_EP_HDMI0>;
-		remote-endpoint = <&hdmi_in_vp0>;
-	};
-};
diff --git a/arch/arm/dts/rk3566.dtsi b/arch/arm/dts/rk3566.dtsi
deleted file mode 100644
index 6c4b17d27bdc..000000000000
--- a/arch/arm/dts/rk3566.dtsi
+++ /dev/null
@@ -1,35 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-
-#include "rk356x.dtsi"
-
-/ {
-	compatible = "rockchip,rk3566";
-};
-
-&pipegrf {
-	compatible = "rockchip,rk3566-pipe-grf", "syscon";
-};
-
-&power {
-	power-domain@RK3568_PD_PIPE {
-		reg = <RK3568_PD_PIPE>;
-		clocks = <&cru PCLK_PIPE>;
-		pm_qos = <&qos_pcie2x1>,
-			 <&qos_sata1>,
-			 <&qos_sata2>,
-			 <&qos_usb3_0>,
-			 <&qos_usb3_1>;
-		#power-domain-cells = <0>;
-	};
-};
-
-&usb_host0_xhci {
-	phys = <&usb2phy0_otg>;
-	phy-names = "usb2-phy";
-	extcon = <&usb2phy0>;
-	maximum-speed = "high-speed";
-};
-
-&vop {
-	compatible = "rockchip,rk3566-vop";
-};
diff --git a/arch/arm/dts/rk3568-bpi-r2-pro.dts b/arch/arm/dts/rk3568-bpi-r2-pro.dts
deleted file mode 100644
index f9127ddfbb7d..000000000000
--- a/arch/arm/dts/rk3568-bpi-r2-pro.dts
+++ /dev/null
@@ -1,852 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Author: Frank Wunderlich <frank-w@public-files.de>
- *
- */
-
-/dts-v1/;
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-#include <dt-bindings/soc/rockchip,vop2.h>
-#include "rk3568.dtsi"
-
-/ {
-	model = "Bananapi-R2 Pro (RK3568) DDR4 Board";
-	compatible = "rockchip,rk3568-bpi-r2pro", "rockchip,rk3568";
-
-	aliases {
-		ethernet0 = &gmac0;
-		ethernet1 = &gmac1;
-		mmc0 = &sdmmc0;
-		mmc1 = &sdhci;
-	};
-
-	chosen: chosen {
-		stdout-path = "serial2:1500000n8";
-	};
-
-	leds {
-		compatible = "gpio-leds";
-		pinctrl-names = "default";
-		pinctrl-0 = <&blue_led_pin &green_led_pin>;
-
-		blue_led: led-0 {
-			color = <LED_COLOR_ID_BLUE>;
-			default-state = "off";
-			function = LED_FUNCTION_STATUS;
-			gpios = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>;
-		};
-
-		green_led: led-1 {
-			color = <LED_COLOR_ID_GREEN>;
-			default-state = "on";
-			function = LED_FUNCTION_POWER;
-			gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
-		};
-	};
-
-	dc_12v: dc-12v-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "dc_12v";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <12000000>;
-		regulator-max-microvolt = <12000000>;
-	};
-
-	hdmi-con {
-		compatible = "hdmi-connector";
-		type = "a";
-
-		port {
-			hdmi_con_in: endpoint {
-				remote-endpoint = <&hdmi_out_con>;
-			};
-		};
-	};
-
-	ir-receiver {
-		compatible = "gpio-ir-receiver";
-		gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&ir_receiver_pin>;
-	};
-
-	vcc3v3_sys: vcc3v3-sys-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc3v3_sys";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		vin-supply = <&dc_12v>;
-	};
-
-	vcc5v0_sys: vcc5v0-sys-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v0_sys";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		vin-supply = <&dc_12v>;
-	};
-
-	pcie30_avdd0v9: pcie30-avdd0v9-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "pcie30_avdd0v9";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <900000>;
-		regulator-max-microvolt = <900000>;
-		vin-supply = <&vcc3v3_sys>;
-	};
-
-	pcie30_avdd1v8: pcie30-avdd1v8-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "pcie30_avdd1v8";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <1800000>;
-		regulator-max-microvolt = <1800000>;
-		vin-supply = <&vcc3v3_sys>;
-	};
-
-	/* pi6c pcie clock generator feeds both ports */
-	vcc3v3_pi6c_05: vcc3v3-pi6c-05-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc3v3_pcie";
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		enable-active-high;
-		gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
-		startup-delay-us = <200000>;
-		vin-supply = <&vcc5v0_sys>;
-	};
-
-	/* actually fed by vcc3v3_sys, dependent on pi6c clock generator */
-	vcc3v3_minipcie: vcc3v3-minipcie-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc3v3_minipcie";
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		enable-active-high;
-		gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&minipcie_enable_h>;
-		startup-delay-us = <50000>;
-		vin-supply = <&vcc3v3_pi6c_05>;
-	};
-
-	/* actually fed by vcc3v3_sys, dependent on pi6c clock generator */
-	vcc3v3_ngff: vcc3v3-ngff-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc3v3_ngff";
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		enable-active-high;
-		gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&ngffpcie_enable_h>;
-		startup-delay-us = <50000>;
-		vin-supply = <&vcc3v3_pi6c_05>;
-	};
-
-	vcc5v0_usb: vcc5v0-usb-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v0_usb";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		vin-supply = <&dc_12v>;
-	};
-
-	vcc5v0_usb_host: vcc5v0-usb-host-regulator {
-		compatible = "regulator-fixed";
-		enable-active-high;
-		gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&vcc5v0_usb_host_en>;
-		regulator-name = "vcc5v0_usb_host";
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		vin-supply = <&vcc5v0_usb>;
-	};
-
-	vcc5v0_usb_otg: vcc5v0-usb-otg-regulator {
-		compatible = "regulator-fixed";
-		enable-active-high;
-		gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&vcc5v0_usb_otg_en>;
-		regulator-name = "vcc5v0_usb_otg";
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		vin-supply = <&vcc5v0_usb>;
-	};
-};
-
-&combphy0 {
-	/* used for USB3 */
-	status = "okay";
-};
-
-&combphy1 {
-	/* used for USB3 */
-	status = "okay";
-};
-
-&combphy2 {
-	/* used for SATA */
-	status = "okay";
-};
-
-&gmac0 {
-	assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
-	assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>;
-	clock_in_out = "input";
-	phy-mode = "rgmii";
-	pinctrl-names = "default";
-	pinctrl-0 = <&gmac0_miim
-		     &gmac0_tx_bus2
-		     &gmac0_rx_bus2
-		     &gmac0_rgmii_clk
-		     &gmac0_rgmii_bus>;
-	snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
-	snps,reset-active-low;
-	/* Reset time is 20ms, 100ms for rtl8211f */
-	snps,reset-delays-us = <0 20000 100000>;
-	tx_delay = <0x4f>;
-	rx_delay = <0x0f>;
-	status = "okay";
-
-	fixed-link {
-		speed = <1000>;
-		full-duplex;
-		pause;
-	};
-};
-
-&gmac1 {
-	assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
-	assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
-	clock_in_out = "output";
-	phy-handle = <&rgmii_phy1>;
-	phy-mode = "rgmii";
-	pinctrl-names = "default";
-	pinctrl-0 = <&gmac1m1_miim
-		     &gmac1m1_tx_bus2
-		     &gmac1m1_rx_bus2
-		     &gmac1m1_rgmii_clk
-		     &gmac1m1_rgmii_bus>;
-
-	snps,reset-gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
-	snps,reset-active-low;
-	/* Reset time is 20ms, 100ms for rtl8211f */
-	snps,reset-delays-us = <0 20000 100000>;
-
-	tx_delay = <0x3c>;
-	rx_delay = <0x2f>;
-
-	status = "okay";
-};
-
-&gpu {
-	mali-supply = <&vdd_gpu>;
-	status = "okay";
-};
-
-&hdmi {
-	avdd-0v9-supply = <&vdda0v9_image>;
-	avdd-1v8-supply = <&vcca1v8_image>;
-	status = "okay";
-};
-
-&hdmi_in {
-	hdmi_in_vp0: endpoint {
-		remote-endpoint = <&vp0_out_hdmi>;
-	};
-};
-
-&hdmi_out {
-	hdmi_out_con: endpoint {
-		remote-endpoint = <&hdmi_con_in>;
-	};
-};
-
-&hdmi_sound {
-	status = "okay";
-};
-
-&i2c0 {
-	status = "okay";
-
-	rk809: pmic@20 {
-		compatible = "rockchip,rk809";
-		reg = <0x20>;
-		interrupt-parent = <&gpio0>;
-		interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
-		#clock-cells = <1>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pmic_int>;
-		rockchip,system-power-controller;
-		vcc1-supply = <&vcc3v3_sys>;
-		vcc2-supply = <&vcc3v3_sys>;
-		vcc3-supply = <&vcc3v3_sys>;
-		vcc4-supply = <&vcc3v3_sys>;
-		vcc5-supply = <&vcc3v3_sys>;
-		vcc6-supply = <&vcc3v3_sys>;
-		vcc7-supply = <&vcc3v3_sys>;
-		vcc8-supply = <&vcc3v3_sys>;
-		vcc9-supply = <&vcc3v3_sys>;
-		wakeup-source;
-
-		regulators {
-			vdd_logic: DCDC_REG1 {
-				regulator-name = "vdd_logic";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-initial-mode = <0x2>;
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <1350000>;
-				regulator-ramp-delay = <6001>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vdd_gpu: DCDC_REG2 {
-				regulator-name = "vdd_gpu";
-				regulator-always-on;
-				regulator-initial-mode = <0x2>;
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <1350000>;
-				regulator-ramp-delay = <6001>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc_ddr: DCDC_REG3 {
-				regulator-name = "vcc_ddr";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-initial-mode = <0x2>;
-
-				regulator-state-mem {
-					regulator-on-in-suspend;
-				};
-			};
-
-			vdd_npu: DCDC_REG4 {
-				regulator-name = "vdd_npu";
-				regulator-initial-mode = <0x2>;
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <1350000>;
-				regulator-ramp-delay = <6001>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc_1v8: DCDC_REG5 {
-				regulator-name = "vcc_1v8";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vdda0v9_image: LDO_REG1 {
-				regulator-name = "vdda0v9_image";
-				regulator-always-on;
-				regulator-min-microvolt = <900000>;
-				regulator-max-microvolt = <900000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vdda_0v9: LDO_REG2 {
-				regulator-name = "vdda_0v9";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <900000>;
-				regulator-max-microvolt = <900000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vdda0v9_pmu: LDO_REG3 {
-				regulator-name = "vdda0v9_pmu";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <900000>;
-				regulator-max-microvolt = <900000>;
-
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <900000>;
-				};
-			};
-
-			vccio_acodec: LDO_REG4 {
-				regulator-name = "vccio_acodec";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vccio_sd: LDO_REG5 {
-				regulator-name = "vccio_sd";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <3300000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc3v3_pmu: LDO_REG6 {
-				regulator-name = "vcc3v3_pmu";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <3300000>;
-				};
-			};
-
-			vcca_1v8: LDO_REG7 {
-				regulator-name = "vcca_1v8";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcca1v8_pmu: LDO_REG8 {
-				regulator-name = "vcca1v8_pmu";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <1800000>;
-				};
-			};
-
-			vcca1v8_image: LDO_REG9 {
-				regulator-name = "vcca1v8_image";
-				regulator-always-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc_3v3: SWITCH_REG1 {
-				regulator-name = "vcc_3v3";
-				regulator-always-on;
-				regulator-boot-on;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc3v3_sd: SWITCH_REG2 {
-				regulator-name = "vcc3v3_sd";
-				regulator-always-on;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-		};
-	};
-};
-
-&i2c3 {
-	status = "okay";
-
-	hym8563: rtc@51 {
-		compatible = "haoyu,hym8563";
-		reg = <0x51>;
-		interrupt-parent = <&gpio0>;
-		interrupts = <RK_PD3 IRQ_TYPE_EDGE_FALLING>;
-		#clock-cells = <0>;
-		clock-output-names = "rtcic_32kout";
-		pinctrl-names = "default";
-		pinctrl-0 = <&hym8563_int>;
-		wakeup-source;
-	};
-};
-
-&i2c5 {
-	/* pin 3 (SDA) + 4 (SCL) of header con2 */
-	status = "disabled";
-};
-
-&i2s0_8ch {
-	/* hdmi sound */
-	status = "okay";
-};
-
-&mdio0 {
-	#address-cells = <1>;
-	#size-cells = <0>;
-
-	switch@0 {
-		compatible = "mediatek,mt7531";
-		reg = <0>;
-
-		ports {
-			#address-cells = <1>;
-			#size-cells = <0>;
-
-			port@1 {
-				reg = <1>;
-				label = "lan0";
-			};
-
-			port@2 {
-				reg = <2>;
-				label = "lan1";
-			};
-
-			port@3 {
-				reg = <3>;
-				label = "lan2";
-			};
-
-			port@4 {
-				reg = <4>;
-				label = "lan3";
-			};
-
-			port@5 {
-				reg = <5>;
-				label = "cpu";
-				ethernet = <&gmac0>;
-				phy-mode = "rgmii";
-
-				fixed-link {
-					speed = <1000>;
-					full-duplex;
-					pause;
-				};
-			};
-		};
-	};
-};
-
-&mdio1 {
-	rgmii_phy1: ethernet-phy@0 {
-		compatible = "ethernet-phy-ieee802.3-c22";
-		reg = <0x0>;
-	};
-};
-
-&pcie30phy {
-	data-lanes = <1 2>;
-	phy-supply = <&vcc3v3_pi6c_05>;
-	status = "okay";
-};
-
-&pcie3x1 {
-	/* M.2 slot */
-	num-lanes = <1>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&ngffpcie_reset_h>;
-	reset-gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
-	vpcie3v3-supply = <&vcc3v3_ngff>;
-	status = "okay";
-};
-
-&pcie3x2 {
-	/* mPCIe slot */
-	num-lanes = <1>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&minipcie_reset_h>;
-	reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
-	vpcie3v3-supply = <&vcc3v3_minipcie>;
-	status = "okay";
-};
-
-&pinctrl {
-	leds {
-		blue_led_pin: blue-led-pin {
-			rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-		green_led_pin: green-led-pin {
-			rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	hym8563 {
-		hym8563_int: hym8563-int {
-			rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	ir-receiver {
-		ir_receiver_pin: ir-receiver-pin {
-			rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	pcie {
-		minipcie_enable_h: minipcie-enable-h {
-			rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none_drv_level_5>;
-		};
-
-		ngffpcie_enable_h: ngffpcie-enable-h {
-			rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none_drv_level_5>;
-		};
-
-		minipcie_reset_h: minipcie-reset-h {
-			rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none_drv_level_5>;
-		};
-
-		ngffpcie_reset_h: ngffpcie-reset-h {
-			rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none_drv_level_5>;
-		};
-	};
-
-	pmic {
-		pmic_int: pmic_int {
-			rockchip,pins =
-				<0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
-		};
-	};
-
-	usb {
-		vcc5v0_usb_host_en: vcc5v0_usb_host_en {
-			rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-
-		vcc5v0_usb_otg_en: vcc5v0_usb_otg_en {
-			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-};
-
-&pmu_io_domains {
-	pmuio1-supply = <&vcc3v3_pmu>;
-	pmuio2-supply = <&vcc3v3_pmu>;
-	vccio1-supply = <&vccio_acodec>;
-	vccio3-supply = <&vccio_sd>;
-	vccio4-supply = <&vcc_3v3>;
-	vccio5-supply = <&vcc_3v3>;
-	vccio6-supply = <&vcc_1v8>;
-	vccio7-supply = <&vcc_3v3>;
-	status = "okay";
-};
-
-&pwm8 {
-	/* fan 5v - gnd - pwm */
-	status = "okay";
-};
-
-&pwm10 {
-	/* pin 7 of header con2 */
-	status = "disabled";
-};
-
-&pwm11 {
-	/* pin 15 of header con2 */
-	status = "disabled";
-};
-
-&pwm12 {
-	/* pin 21 of header con2 */
-	/* shared with uart9 + spi3 */
-	pinctrl-0 = <&pwm12m1_pins>;
-	status = "disabled";
-};
-
-&pwm13 {
-	/* pin 24 of header con2 */
-	/* shared with uart9 */
-	pinctrl-0 = <&pwm13m1_pins>;
-	status = "disabled";
-};
-
-&pwm14 {
-	/* pin 23 of header con2 */
-	/* shared with spi3 */
-	pinctrl-0 = <&pwm14m1_pins>;
-	status = "disabled";
-};
-
-&pwm15 {
-	/* pin 19 of header con2 */
-	/* shared with spi3 */
-	pinctrl-0 = <&pwm15m1_pins>;
-	status = "disabled";
-};
-
-&saradc {
-	vref-supply = <&vcca_1v8>;
-	status = "okay";
-};
-
-&sata2 {
-	status = "okay";
-};
-
-&sdhci {
-	bus-width = <8>;
-	max-frequency = <200000000>;
-	non-removable;
-	pinctrl-names = "default";
-	pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
-	status = "okay";
-};
-
-&sdmmc0 {
-	bus-width = <4>;
-	cap-sd-highspeed;
-	cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
-	disable-wp;
-	pinctrl-names = "default";
-	pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
-	sd-uhs-sdr104;
-	vmmc-supply = <&vcc3v3_sd>;
-	vqmmc-supply = <&vccio_sd>;
-	status = "okay";
-};
-
-&spi3 {
-	/* pin 19 (MO) + 21 (MI) + 23 (CK) of header con2 */
-	/* shared with pwm12/14/15 and uart9 */
-	pinctrl-0 = <&spi3m1_pins>;
-	status = "disabled";
-};
-
-&tsadc {
-	rockchip,hw-tshut-mode = <1>;
-	rockchip,hw-tshut-polarity = <0>;
-	status = "okay";
-};
-
-&uart0 {
-	/* pin 8 (TX) + 10 (RX) (RTS:16, CTS:18) of header con2 */
-	status = "disabled";
-};
-
-&uart2 {
-	/* debug-uart */
-	status = "okay";
-};
-
-&uart7 {
-	/* pin 11 (TX) + 13 (RX) of header con2 */
-	pinctrl-0 = <&uart7m1_xfer>;
-	status = "disabled";
-};
-
-&uart9 {
-	/* pin 21 (TX) + 24 (RX) of header con2 */
-	/* shared with pwm13 and pwm12/spi3 */
-	pinctrl-0 = <&uart9m1_xfer>;
-	status = "disabled";
-};
-
-&usb_host0_ehci {
-	status = "okay";
-};
-
-&usb_host0_ohci {
-	status = "okay";
-};
-
-&usb_host0_xhci {
-	dr_mode = "host";
-	status = "okay";
-};
-
-&usb_host1_ehci {
-	status = "okay";
-};
-
-&usb_host1_ohci {
-	status = "okay";
-};
-
-&usb_host1_xhci {
-	status = "okay";
-};
-
-&usb2phy0 {
-	status = "okay";
-};
-
-&usb2phy0_host {
-	phy-supply = <&vcc5v0_usb_host>;
-	status = "okay";
-};
-
-&usb2phy0_otg {
-	phy-supply = <&vcc5v0_usb_otg>;
-	status = "okay";
-};
-
-&usb2phy1 {
-	/* USB for PCIe/M2 */
-	status = "okay";
-};
-
-&usb2phy1_host {
-	status = "okay";
-};
-
-&usb2phy1_otg {
-	status = "okay";
-};
-
-&vop {
-	assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
-	assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
-	status = "okay";
-};
-
-&vop_mmu {
-	status = "okay";
-};
-
-&vp0 {
-	vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
-		reg = <ROCKCHIP_VOP2_EP_HDMI0>;
-		remote-endpoint = <&hdmi_in_vp0>;
-	};
-};
diff --git a/arch/arm/dts/rk3568-evb.dts b/arch/arm/dts/rk3568-evb.dts
deleted file mode 100644
index 19f8fc369b13..000000000000
--- a/arch/arm/dts/rk3568-evb.dts
+++ /dev/null
@@ -1,689 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
- *
- */
-
-/dts-v1/;
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-#include <dt-bindings/soc/rockchip,vop2.h>
-#include "rk3568.dtsi"
-
-/ {
-	model = "Rockchip RK3568 EVB1 DDR4 V10 Board";
-	compatible = "rockchip,rk3568-evb1-v10", "rockchip,rk3568";
-
-	aliases {
-		ethernet0 = &gmac0;
-		ethernet1 = &gmac1;
-		mmc0 = &sdmmc0;
-		mmc1 = &sdhci;
-	};
-
-	chosen: chosen {
-		stdout-path = "serial2:1500000n8";
-	};
-
-	dc_12v: dc-12v {
-		compatible = "regulator-fixed";
-		regulator-name = "dc_12v";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <12000000>;
-		regulator-max-microvolt = <12000000>;
-	};
-
-	hdmi-con {
-		compatible = "hdmi-connector";
-		type = "a";
-
-		port {
-			hdmi_con_in: endpoint {
-				remote-endpoint = <&hdmi_out_con>;
-			};
-		};
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		led_work: led-0 {
-			gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
-			function = LED_FUNCTION_HEARTBEAT;
-			color = <LED_COLOR_ID_BLUE>;
-			linux,default-trigger = "heartbeat";
-			pinctrl-names = "default";
-			pinctrl-0 = <&led_work_en>;
-		};
-	};
-
-	rk809-sound {
-		compatible = "simple-audio-card";
-		simple-audio-card,format = "i2s";
-		simple-audio-card,name = "Analog RK809";
-		simple-audio-card,mclk-fs = <256>;
-
-		simple-audio-card,cpu {
-			sound-dai = <&i2s1_8ch>;
-		};
-		simple-audio-card,codec {
-			sound-dai = <&rk809>;
-		};
-	};
-
-	vcc3v3_sys: vcc3v3-sys {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc3v3_sys";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		vin-supply = <&dc_12v>;
-	};
-
-	vcc5v0_sys: vcc5v0-sys {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v0_sys";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		vin-supply = <&dc_12v>;
-	};
-
-	vcc5v0_usb: vcc5v0-usb {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v0_usb";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		vin-supply = <&dc_12v>;
-	};
-
-	vcc5v0_usb_host: vcc5v0-usb-host {
-		compatible = "regulator-fixed";
-		enable-active-high;
-		gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&vcc5v0_usb_host_en>;
-		regulator-name = "vcc5v0_usb_host";
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		vin-supply = <&vcc5v0_usb>;
-	};
-
-	vcc5v0_usb_otg: vcc5v0-usb-otg {
-		compatible = "regulator-fixed";
-		enable-active-high;
-		gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&vcc5v0_usb_otg_en>;
-		regulator-name = "vcc5v0_usb_otg";
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		vin-supply = <&vcc5v0_usb>;
-	};
-
-	vcc3v3_lcd0_n: vcc3v3-lcd0-n {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc3v3_lcd0_n";
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		enable-active-high;
-		gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
-		vin-supply = <&vcc3v3_sys>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&vcc3v3_lcd0_n_en>;
-
-		regulator-state-mem {
-			regulator-off-in-suspend;
-		};
-	};
-
-	vcc3v3_lcd1_n: vcc3v3-lcd1-n {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc3v3_lcd1_n";
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		enable-active-high;
-		gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
-		vin-supply = <&vcc3v3_sys>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&vcc3v3_lcd1_n_en>;
-
-		regulator-state-mem {
-			regulator-off-in-suspend;
-		};
-	};
-};
-
-&combphy0 {
-	status = "okay";
-};
-
-&combphy1 {
-	status = "okay";
-};
-
-&cpu0 {
-	cpu-supply = <&vdd_cpu>;
-};
-
-&cpu1 {
-	cpu-supply = <&vdd_cpu>;
-};
-
-&cpu2 {
-	cpu-supply = <&vdd_cpu>;
-};
-
-&cpu3 {
-	cpu-supply = <&vdd_cpu>;
-};
-
-&gmac0 {
-	assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
-	assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>;
-	assigned-clock-rates = <0>, <125000000>;
-	clock_in_out = "output";
-	phy-handle = <&rgmii_phy0>;
-	phy-mode = "rgmii-id";
-	pinctrl-names = "default";
-	pinctrl-0 = <&gmac0_miim
-		     &gmac0_tx_bus2
-		     &gmac0_rx_bus2
-		     &gmac0_rgmii_clk
-		     &gmac0_rgmii_bus>;
-	status = "okay";
-};
-
-&gmac1 {
-	assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
-	assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>;
-	assigned-clock-rates = <0>, <125000000>;
-	clock_in_out = "output";
-	phy-handle = <&rgmii_phy1>;
-	phy-mode = "rgmii-id";
-	pinctrl-names = "default";
-	pinctrl-0 = <&gmac1m1_miim
-		     &gmac1m1_tx_bus2
-		     &gmac1m1_rx_bus2
-		     &gmac1m1_rgmii_clk
-		     &gmac1m1_rgmii_bus>;
-	status = "okay";
-};
-
-&gpu {
-	mali-supply = <&vdd_gpu>;
-	status = "okay";
-};
-
-&hdmi {
-	avdd-0v9-supply = <&vdda0v9_image>;
-	avdd-1v8-supply = <&vcca1v8_image>;
-	status = "okay";
-};
-
-&hdmi_in {
-	hdmi_in_vp0: endpoint {
-		remote-endpoint = <&vp0_out_hdmi>;
-	};
-};
-
-&hdmi_out {
-	hdmi_out_con: endpoint {
-		remote-endpoint = <&hdmi_con_in>;
-	};
-};
-
-&hdmi_sound {
-	status = "okay";
-};
-
-&i2c0 {
-	status = "okay";
-
-	vdd_cpu: regulator@1c {
-		compatible = "tcs,tcs4525";
-		reg = <0x1c>;
-		fcs,suspend-voltage-selector = <1>;
-		regulator-name = "vdd_cpu";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <800000>;
-		regulator-max-microvolt = <1150000>;
-		regulator-ramp-delay = <2300>;
-		vin-supply = <&vcc5v0_sys>;
-
-		regulator-state-mem {
-			regulator-off-in-suspend;
-		};
-	};
-
-	rk809: pmic@20 {
-		compatible = "rockchip,rk809";
-		reg = <0x20>;
-		interrupt-parent = <&gpio0>;
-		interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
-		assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
-		assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
-		#clock-cells = <1>;
-		clock-names = "mclk";
-		clocks = <&cru I2S1_MCLKOUT_TX>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pmic_int>, <&i2s1m0_mclk>;
-		rockchip,system-power-controller;
-		#sound-dai-cells = <0>;
-		vcc1-supply = <&vcc3v3_sys>;
-		vcc2-supply = <&vcc3v3_sys>;
-		vcc3-supply = <&vcc3v3_sys>;
-		vcc4-supply = <&vcc3v3_sys>;
-		vcc5-supply = <&vcc3v3_sys>;
-		vcc6-supply = <&vcc3v3_sys>;
-		vcc7-supply = <&vcc3v3_sys>;
-		vcc8-supply = <&vcc3v3_sys>;
-		vcc9-supply = <&vcc3v3_sys>;
-		wakeup-source;
-
-		regulators {
-			vdd_logic: DCDC_REG1 {
-				regulator-name = "vdd_logic";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-initial-mode = <0x2>;
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <1350000>;
-				regulator-ramp-delay = <6001>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vdd_gpu: DCDC_REG2 {
-				regulator-name = "vdd_gpu";
-				regulator-always-on;
-				regulator-initial-mode = <0x2>;
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <1350000>;
-				regulator-ramp-delay = <6001>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc_ddr: DCDC_REG3 {
-				regulator-name = "vcc_ddr";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-initial-mode = <0x2>;
-
-				regulator-state-mem {
-					regulator-on-in-suspend;
-				};
-			};
-
-			vdd_npu: DCDC_REG4 {
-				regulator-name = "vdd_npu";
-				regulator-initial-mode = <0x2>;
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <1350000>;
-				regulator-ramp-delay = <6001>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc_1v8: DCDC_REG5 {
-				regulator-name = "vcc_1v8";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vdda0v9_image: LDO_REG1 {
-				regulator-name = "vdda0v9_image";
-				regulator-min-microvolt = <900000>;
-				regulator-max-microvolt = <900000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vdda_0v9: LDO_REG2 {
-				regulator-name = "vdda_0v9";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <900000>;
-				regulator-max-microvolt = <900000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vdda0v9_pmu: LDO_REG3 {
-				regulator-name = "vdda0v9_pmu";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <900000>;
-				regulator-max-microvolt = <900000>;
-
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <900000>;
-				};
-			};
-
-			vccio_acodec: LDO_REG4 {
-				regulator-name = "vccio_acodec";
-				regulator-always-on;
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vccio_sd: LDO_REG5 {
-				regulator-name = "vccio_sd";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <3300000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc3v3_pmu: LDO_REG6 {
-				regulator-name = "vcc3v3_pmu";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <3300000>;
-				};
-			};
-
-			vcca_1v8: LDO_REG7 {
-				regulator-name = "vcca_1v8";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcca1v8_pmu: LDO_REG8 {
-				regulator-name = "vcca1v8_pmu";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <1800000>;
-				};
-			};
-
-			vcca1v8_image: LDO_REG9 {
-				regulator-name = "vcca1v8_image";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc_3v3: SWITCH_REG1 {
-				regulator-name = "vcc_3v3";
-				regulator-always-on;
-				regulator-boot-on;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc3v3_sd: SWITCH_REG2 {
-				regulator-name = "vcc3v3_sd";
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-		};
-
-		codec {
-			mic-in-differential;
-		};
-	};
-};
-
-&i2c1 {
-	status = "okay";
-
-	touchscreen0: goodix@14 {
-		compatible = "goodix,gt1151";
-		reg = <0x14>;
-		interrupt-parent = <&gpio0>;
-		interrupts = <RK_PB5 IRQ_TYPE_EDGE_FALLING>;
-		AVDD28-supply = <&vcc3v3_lcd0_n>;
-		irq-gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&touch_int &touch_rst>;
-		reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
-		VDDIO-supply = <&vcc3v3_lcd0_n>;
-	};
-};
-
-&i2s0_8ch {
-	status = "okay";
-};
-
-&i2s1_8ch {
-	rockchip,trcm-sync-tx-only;
-	status = "okay";
-};
-
-&mdio0 {
-	rgmii_phy0: ethernet-phy@0 {
-		compatible = "ethernet-phy-ieee802.3-c22";
-		reg = <0x0>;
-		reset-assert-us = <20000>;
-		reset-deassert-us = <100000>;
-		reset-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
-	};
-};
-
-&mdio1 {
-	rgmii_phy1: ethernet-phy@0 {
-		compatible = "ethernet-phy-ieee802.3-c22";
-		reg = <0x0>;
-		reset-assert-us = <20000>;
-		reset-deassert-us = <100000>;
-		reset-gpios = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>;
-	};
-};
-
-&pinctrl {
-	display {
-		vcc3v3_lcd0_n_en: vcc3v3_lcd0_n_en {
-			rockchip,pins = <0 RK_PC7 0 &pcfg_pull_none>;
-		};
-		vcc3v3_lcd1_n_en: vcc3v3_lcd1_n_en {
-			rockchip,pins = <0 RK_PC5 0 &pcfg_pull_none>;
-		};
-	};
-
-	leds {
-		led_work_en: led_work_en {
-			rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	pmic {
-		pmic_int: pmic_int {
-			rockchip,pins =
-				<0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
-		};
-	};
-
-	touchscreen {
-		touch_int: touch_int {
-			rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>;
-		};
-		touch_rst: touch_rst {
-			rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	usb {
-		vcc5v0_usb_host_en: vcc5v0_usb_host_en {
-			rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-		vcc5v0_usb_otg_en: vcc5v0_usb_otg_en {
-			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-};
-
-&pmu_io_domains {
-	pmuio1-supply = <&vcc3v3_pmu>;
-	pmuio2-supply = <&vcc3v3_pmu>;
-	vccio1-supply = <&vccio_acodec>;
-	vccio2-supply = <&vcc_1v8>;
-	vccio3-supply = <&vccio_sd>;
-	vccio4-supply = <&vcc_1v8>;
-	vccio5-supply = <&vcc_3v3>;
-	vccio6-supply = <&vcc_1v8>;
-	vccio7-supply = <&vcc_3v3>;
-	status = "okay";
-};
-
-&saradc {
-	vref-supply = <&vcca_1v8>;
-	status = "okay";
-};
-
-&sdhci {
-	bus-width = <8>;
-	max-frequency = <200000000>;
-	non-removable;
-	pinctrl-names = "default";
-	pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
-	status = "okay";
-};
-
-&sdmmc0 {
-	bus-width = <4>;
-	cap-sd-highspeed;
-	cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
-	disable-wp;
-	pinctrl-names = "default";
-	pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
-	sd-uhs-sdr104;
-	vmmc-supply = <&vcc3v3_sd>;
-	vqmmc-supply = <&vccio_sd>;
-	status = "okay";
-};
-
-&tsadc {
-	rockchip,hw-tshut-mode = <1>;
-	rockchip,hw-tshut-polarity = <0>;
-	status = "okay";
-};
-
-&uart2 {
-	status = "okay";
-};
-
-&usb_host0_ehci {
-	status = "okay";
-};
-
-&usb_host0_ohci {
-	status = "okay";
-};
-
-&usb_host0_xhci {
-	extcon = <&usb2phy0>;
-	status = "okay";
-};
-
-&usb_host1_ehci {
-	status = "okay";
-};
-
-&usb_host1_ohci {
-	status = "okay";
-};
-
-&usb_host1_xhci {
-	status = "okay";
-};
-
-&usb2phy0 {
-	status = "okay";
-};
-
-&usb2phy0_host {
-	phy-supply = <&vcc5v0_usb_host>;
-	status = "okay";
-};
-
-&usb2phy0_otg {
-	phy-supply = <&vcc5v0_usb_otg>;
-	status = "okay";
-};
-
-&usb2phy1 {
-	status = "okay";
-};
-
-&usb2phy1_host {
-	phy-supply = <&vcc5v0_usb_host>;
-	status = "okay";
-};
-
-&usb2phy1_otg {
-	phy-supply = <&vcc5v0_usb_host>;
-	status = "okay";
-};
-
-&vop {
-	assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
-	assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
-	status = "okay";
-};
-
-&vop_mmu {
-	status = "okay";
-};
-
-&vp0 {
-	vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
-		reg = <ROCKCHIP_VOP2_EP_HDMI0>;
-		remote-endpoint = <&hdmi_in_vp0>;
-	};
-};
diff --git a/arch/arm/dts/rk3568-lubancat-2.dts b/arch/arm/dts/rk3568-lubancat-2.dts
deleted file mode 100644
index a8a4cc190eb3..000000000000
--- a/arch/arm/dts/rk3568-lubancat-2.dts
+++ /dev/null
@@ -1,730 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-
-/*
- * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
- * Copyright (c) 2022 EmbedFire <embedfire@embedfire.com>
- */
-
-/dts-v1/;
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-#include <dt-bindings/soc/rockchip,vop2.h>
-#include "rk3568.dtsi"
-
-/ {
-	model = "EmbedFire LubanCat 2";
-	compatible = "embedfire,lubancat-2", "rockchip,rk3568";
-
-	aliases {
-		ethernet0 = &gmac0;
-		ethernet1 = &gmac1;
-		mmc0 = &sdmmc0;
-		mmc1 = &sdhci;
-	};
-
-	chosen: chosen {
-		stdout-path = "serial2:1500000n8";
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		user_led: user-led {
-			label = "user_led";
-			linux,default-trigger = "heartbeat";
-			default-state = "on";
-			gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_LOW>;
-			pinctrl-names = "default";
-			pinctrl-0 = <&user_led_pin>;
-		};
-	};
-
-	hdmi-con {
-		compatible = "hdmi-connector";
-		type = "a";
-
-		port {
-			hdmi_con_in: endpoint {
-				remote-endpoint = <&hdmi_out_con>;
-			};
-		};
-	};
-
-	dc_5v: dc-5v-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "dc_5v";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-	};
-
-	vcc3v3_sys: vcc3v3-sys-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc3v3_sys";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		vin-supply = <&vcc5v0_sys>;
-	};
-
-	vcc5v0_sys: vcc5v0-sys-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v0_sys";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		vin-supply = <&dc_5v>;
-	};
-
-	vcc3v3_m2_pcie: vcc3v3-m2-pcie-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "m2_pcie_3v3";
-		enable-active-high;
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
-		pinctrl-0 = <&vcc3v3_m2_pcie_en>;
-		pinctrl-names = "default";
-		startup-delay-us = <200000>;
-		vin-supply = <&vcc5v0_sys>;
-	};
-
-	vcc3v3_mini_pcie: vcc3v3-mini-pcie-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "minipcie_3v3";
-		enable-active-high;
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		gpio = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>;
-		pinctrl-0 = <&vcc3v3_mini_pcie_en>;
-		pinctrl-names = "default";
-		startup-delay-us = <5000>;
-		vin-supply = <&vcc5v0_sys>;
-	};
-
-	vcc5v0_usb20_host: vcc5v0-usb20-host-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v0_usb20_host";
-		enable-active-high;
-		gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
-		pinctrl-0 = <&vcc5v0_usb20_host_en>;
-		pinctrl-names = "default";
-	};
-
-	vcc5v0_usb30_host: vcc5v0-usb30-host-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v0_usb30_host";
-		enable-active-high;
-		gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>;
-		pinctrl-0 = <&vcc5v0_usb30_host_en>;
-		pinctrl-names = "default";
-	};
-
-	vcc5v0_otg_vbus: vcc5v0-otg-vbus-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v0_otg_vbus";
-		enable-active-high;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		gpio = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
-		pinctrl-0 = <&vcc5v0_otg_vbus_en>;
-		pinctrl-names = "default";
-	};
-};
-
-&combphy0 {
-	status = "okay";
-};
-
-&combphy1 {
-	status = "okay";
-};
-
-&combphy2 {
-	status = "okay";
-};
-
-&cpu0 {
-	cpu-supply = <&vdd_cpu>;
-};
-
-&cpu1 {
-	cpu-supply = <&vdd_cpu>;
-};
-
-&cpu2 {
-	cpu-supply = <&vdd_cpu>;
-};
-
-&cpu3 {
-	cpu-supply = <&vdd_cpu>;
-};
-
-&gpu {
-	mali-supply = <&vdd_gpu>;
-	status = "okay";
-};
-
-&hdmi {
-	avdd-0v9-supply = <&vdda0v9_image>;
-	avdd-1v8-supply = <&vcca1v8_image>;
-	status = "okay";
-};
-
-&hdmi_in {
-	hdmi_in_vp0: endpoint {
-		remote-endpoint = <&vp0_out_hdmi>;
-	};
-};
-
-&hdmi_out {
-	hdmi_out_con: endpoint {
-		remote-endpoint = <&hdmi_con_in>;
-	};
-};
-
-&hdmi_sound {
-	status = "okay";
-};
-
-&i2c0 {
-	status = "okay";
-
-	vdd_cpu: regulator@1c {
-		compatible = "tcs,tcs4525";
-		reg = <0x1c>;
-		fcs,suspend-voltage-selector = <1>;
-		regulator-name = "vdd_cpu";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <800000>;
-		regulator-max-microvolt = <1150000>;
-		regulator-ramp-delay = <2300>;
-		vin-supply = <&vcc5v0_sys>;
-
-		regulator-state-mem {
-			regulator-off-in-suspend;
-		};
-	};
-
-	rk809: pmic@20 {
-		compatible = "rockchip,rk809";
-		reg = <0x20>;
-		interrupt-parent = <&gpio0>;
-		interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
-		assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
-		assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
-		#clock-cells = <1>;
-		clock-names = "mclk";
-		clocks = <&cru I2S1_MCLKOUT_TX>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pmic_int>;
-		rockchip,system-power-controller;
-		#sound-dai-cells = <0>;
-		vcc1-supply = <&vcc3v3_sys>;
-		vcc2-supply = <&vcc3v3_sys>;
-		vcc3-supply = <&vcc3v3_sys>;
-		vcc4-supply = <&vcc3v3_sys>;
-		vcc5-supply = <&vcc3v3_sys>;
-		vcc6-supply = <&vcc3v3_sys>;
-		vcc7-supply = <&vcc3v3_sys>;
-		vcc8-supply = <&vcc3v3_sys>;
-		vcc9-supply = <&vcc3v3_sys>;
-		wakeup-source;
-
-		regulators {
-			vdd_logic: DCDC_REG1 {
-				regulator-name = "vdd_logic";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <1350000>;
-				regulator-ramp-delay = <6001>;
-				regulator-initial-mode = <0x2>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vdd_gpu: DCDC_REG2 {
-				regulator-name = "vdd_gpu";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <1350000>;
-				regulator-ramp-delay = <6001>;
-				regulator-initial-mode = <0x2>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc_ddr: DCDC_REG3 {
-				regulator-name = "vcc_ddr";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-initial-mode = <0x2>;
-
-				regulator-state-mem {
-					regulator-on-in-suspend;
-				};
-			};
-
-			vdd_npu: DCDC_REG4 {
-				regulator-name = "vdd_npu";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <1350000>;
-				regulator-ramp-delay = <6001>;
-				regulator-initial-mode = <0x2>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc_1v8: DCDC_REG5 {
-				regulator-name = "vcc_1v8";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vdda0v9_image: LDO_REG1 {
-				regulator-name = "vdda0v9_image";
-				regulator-boot-on;
-				regulator-always-on;
-				regulator-min-microvolt = <900000>;
-				regulator-max-microvolt = <900000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vdda_0v9: LDO_REG2 {
-				regulator-name = "vdda_0v9";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <900000>;
-				regulator-max-microvolt = <900000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vdda0v9_pmu: LDO_REG3 {
-				regulator-name = "vdda0v9_pmu";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <900000>;
-				regulator-max-microvolt = <900000>;
-
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <900000>;
-				};
-			};
-
-			vccio_acodec: LDO_REG4 {
-				regulator-name = "vccio_acodec";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vccio_sd: LDO_REG5 {
-				regulator-name = "vccio_sd";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <3300000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc3v3_pmu: LDO_REG6 {
-				regulator-name = "vcc3v3_pmu";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <3300000>;
-				};
-			};
-
-			vcca_1v8: LDO_REG7 {
-				regulator-name = "vcca_1v8";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcca1v8_pmu: LDO_REG8 {
-				regulator-name = "vcca1v8_pmu";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <1800000>;
-				};
-			};
-
-			vcca1v8_image: LDO_REG9 {
-				regulator-name = "vcca1v8_image";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc_3v3: SWITCH_REG1 {
-				regulator-name = "vcc_3v3";
-				regulator-always-on;
-				regulator-boot-on;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc3v3_sd: SWITCH_REG2 {
-				regulator-name = "vcc3v3_sd";
-				regulator-always-on;
-				regulator-boot-on;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-		};
-	};
-};
-
-&i2s1_8ch {
-	rockchip,trcm-sync-tx-only;
-	status = "okay";
-};
-
-&gmac0 {
-	phy-mode = "rgmii";
-	clock_in_out = "output";
-
-	snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
-	snps,reset-active-low;
-	/* Reset time is 20ms, 100ms for rtl8211f */
-	snps,reset-delays-us = <0 20000 100000>;
-
-	assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
-	assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>;
-
-	pinctrl-names = "default";
-	pinctrl-0 = <&gmac0_miim
-		     &gmac0_tx_bus2
-		     &gmac0_rx_bus2
-		     &gmac0_rgmii_clk
-		     &gmac0_rgmii_bus>;
-
-	tx_delay = <0x22>;
-	rx_delay = <0x0e>;
-
-	phy-handle = <&rgmii_phy0>;
-	status = "okay";
-};
-
-&mdio0 {
-	rgmii_phy0: phy@0 {
-		compatible = "ethernet-phy-ieee802.3-c22";
-		reg = <0x0>;
-	};
-};
-
-&gmac1 {
-	phy-mode = "rgmii";
-	clock_in_out = "output";
-
-	snps,reset-gpio = <&gpio3 RK_PA2 GPIO_ACTIVE_LOW>;
-	snps,reset-active-low;
-	/* Reset time is 20ms, 100ms for rtl8211f */
-	snps,reset-delays-us = <0 20000 100000>;
-
-	assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
-	assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
-
-	pinctrl-names = "default";
-	pinctrl-0 = <&gmac1m1_miim
-		     &gmac1m1_tx_bus2
-		     &gmac1m1_rx_bus2
-		     &gmac1m1_rgmii_clk
-		     &gmac1m1_rgmii_bus>;
-
-	tx_delay = <0x21>;
-	rx_delay = <0x0e>;
-
-	phy-handle = <&rgmii_phy1>;
-	status = "okay";
-};
-
-&mdio1 {
-	rgmii_phy1: phy@0 {
-		compatible = "ethernet-phy-ieee802.3-c22";
-		reg = <0x0>;
-	};
-};
-
-&gic {
-	mbi-ranges = <94 31>, <229 31>, <289 31>;
-};
-
-&pcie30phy {
-	status = "okay";
-};
-
-&pcie3x2 {
-	reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
-	vpcie3v3-supply = <&vcc3v3_m2_pcie>;
-	status = "okay";
-};
-
-&pcie2x1 {
-	reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
-	disable-gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>;
-	vpcie3v3-supply = <&vcc3v3_mini_pcie>;
-	status = "okay";
-};
-
-&pmu_io_domains {
-	pmuio2-supply = <&vcc3v3_pmu>;
-	vccio1-supply = <&vccio_acodec>;
-	vccio3-supply = <&vccio_sd>;
-	vccio4-supply = <&vcc_1v8>;
-	vccio5-supply = <&vcc_3v3>;
-	vccio6-supply = <&vcc_1v8>;
-	vccio7-supply = <&vcc_3v3>;
-	status = "okay";
-};
-
-&pwm8 {
-	status = "okay";
-};
-
-&pwm9 {
-	status = "disabled";
-};
-
-&pwm10 {
-	status = "disabled";
-};
-
-&pwm14 {
-	status = "disabled";
-};
-
-&spi3 {
-	pinctrl-0 = <&spi3m1_pins>;
-	status = "disabled";
-};
-
-&uart2 {
-	status = "okay";
-};
-
-&uart3 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&uart3m1_xfer>;
-	status = "disabled";
-};
-
-&saradc {
-	vref-supply = <&vcca_1v8>;
-	status = "okay";
-};
-
-&tsadc {
-	rockchip,hw-tshut-mode = <1>;
-	rockchip,hw-tshut-polarity = <0>;
-	status = "okay";
-};
-
-&sdhci {
-	assigned-clocks = <&cru BCLK_EMMC>, <&cru TCLK_EMMC>, <&cru CCLK_EMMC>;
-	assigned-clock-rates = <200000000>, <24000000>, <200000000>;
-	bus-width = <8>;
-	max-frequency = <200000000>;
-	mmc-hs200-1_8v;
-	non-removable;
-	pinctrl-names = "default";
-	pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd>;
-	supports-emmc;
-	status = "okay";
-};
-
-&sdmmc0 {
-	max-frequency = <150000000>;
-	no-sdio;
-	no-mmc;
-	bus-width = <4>;
-	cap-mmc-highspeed;
-	cap-sd-highspeed;
-	disable-wp;
-	sd-uhs-sdr104;
-	vmmc-supply = <&vcc3v3_sd>;
-	vqmmc-supply = <&vccio_sd>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
-	status = "okay";
-};
-
-/* USB OTG/USB Host_1 USB 2.0 Comb */
-&usb2phy0 {
-	status = "okay";
-};
-
-&usb2phy0_host {
-	phy-supply = <&vcc5v0_usb30_host>;
-	status = "okay";
-};
-
-&usb2phy0_otg {
-	phy-supply = <&vcc5v0_otg_vbus>;
-	status = "okay";
-};
-
-&usb_host0_ehci {
-	status = "okay";
-};
-
-&usb_host0_ohci {
-	status = "okay";
-};
-
-/* USB Host_2/USB Host_3 USB 2.0 Comb */
-&usb2phy1 {
-	status = "okay";
-};
-
-&usb2phy1_host {
-	status = "okay";
-};
-
-&usb2phy1_otg {
-	phy-supply = <&vcc5v0_usb20_host>;
-	status = "okay";
-};
-
-&usb_host1_ehci {
-	status = "okay";
-};
-
-&usb_host1_ohci {
-	status = "okay";
-};
-
-/* MULTI_PHY0 For SATA0, USB3.0 OTG Only USB2.0 */
-&usb_host0_xhci {
-	phys = <&usb2phy0_otg>;
-	phy-names = "usb2-phy";
-	extcon = <&usb2phy0>;
-	maximum-speed = "high-speed";
-	dr_mode = "host";
-	status = "okay";
-};
-
-&sata0 {
-	status = "okay";
-};
-
-/* USB3.0 Host */
-&usb_host1_xhci {
-	status = "okay";
-};
-
-&vop {
-	assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
-	assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
-	status = "okay";
-};
-
-&vop_mmu {
-	status = "okay";
-};
-
-&vp0 {
-	vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
-		reg = <ROCKCHIP_VOP2_EP_HDMI0>;
-		remote-endpoint = <&hdmi_in_vp0>;
-	};
-};
-
-&pinctrl {
-	leds {
-		user_led_pin: user-status-led-pin {
-			rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	usb {
-		vcc5v0_usb20_host_en: vcc5v0-usb20-host-en {
-			rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-
-		vcc5v0_usb30_host_en: vcc5v0-usb30-host-en {
-			rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-
-		vcc5v0_otg_vbus_en: vcc5v0-otg-vbus-en {
-			rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	pcie {
-		vcc3v3_m2_pcie_en: vcc3v3-m2-pcie-en {
-			rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-
-		vcc3v3_mini_pcie_en: vcc3v3-mini-pcie-en {
-			rockchip,pins = <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	pmic {
-		pmic_int: pmic-int {
-			rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
-		};
-	};
-};
diff --git a/arch/arm/dts/rk3568-nanopi-r5c.dts b/arch/arm/dts/rk3568-nanopi-r5c.dts
deleted file mode 100644
index c718b8dbb9c6..000000000000
--- a/arch/arm/dts/rk3568-nanopi-r5c.dts
+++ /dev/null
@@ -1,112 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/*
- * Copyright (c) 2022 FriendlyElec Computer Tech. Co., Ltd.
- * (http://www.friendlyelec.com)
- *
- * Copyright (c) 2023 Tianling Shen <cnsztl@gmail.com>
- */
-
-/dts-v1/;
-#include "rk3568-nanopi-r5s.dtsi"
-
-/ {
-	model = "FriendlyElec NanoPi R5C";
-	compatible = "friendlyarm,nanopi-r5c", "rockchip,rk3568";
-
-	gpio-keys {
-		compatible = "gpio-keys";
-		pinctrl-names = "default";
-		pinctrl-0 = <&reset_button_pin>;
-
-		button-reset {
-			debounce-interval = <50>;
-			gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>;
-			label = "reset";
-			linux,code = <KEY_RESTART>;
-		};
-	};
-
-	gpio-leds {
-		compatible = "gpio-leds";
-		pinctrl-names = "default";
-		pinctrl-0 = <&lan_led_pin>, <&power_led_pin>, <&wan_led_pin>, <&wlan_led_pin>;
-
-		led-lan {
-			color = <LED_COLOR_ID_GREEN>;
-			function = LED_FUNCTION_LAN;
-			gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>;
-		};
-
-		power_led: led-power {
-			color = <LED_COLOR_ID_RED>;
-			function = LED_FUNCTION_POWER;
-			linux,default-trigger = "heartbeat";
-			gpios = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>;
-		};
-
-		led-wan {
-			color = <LED_COLOR_ID_GREEN>;
-			function = LED_FUNCTION_WAN;
-			gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>;
-		};
-
-		led-wlan {
-			color = <LED_COLOR_ID_GREEN>;
-			function = LED_FUNCTION_WLAN;
-			gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>;
-		};
-	};
-};
-
-&pcie2x1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pcie20_reset_pin>;
-	reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
-	status = "okay";
-};
-
-&pcie3x1 {
-	num-lanes = <1>;
-	reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
-	vpcie3v3-supply = <&vcc3v3_pcie>;
-	status = "okay";
-};
-
-&pcie3x2 {
-	num-lanes = <1>;
-	reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
-	vpcie3v3-supply = <&vcc3v3_pcie>;
-	status = "okay";
-};
-
-&pinctrl {
-	gpio-leds {
-		lan_led_pin: lan-led-pin {
-			rockchip,pins = <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-
-		power_led_pin: power-led-pin {
-			rockchip,pins = <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-
-		wan_led_pin: wan-led-pin {
-			rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-
-		wlan_led_pin: wlan-led-pin {
-			rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	pcie {
-		pcie20_reset_pin: pcie20-reset-pin {
-			rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>;
-		};
-	};
-
-	rockchip-key {
-		reset_button_pin: reset-button-pin {
-			rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>;
-		};
-	};
-};
diff --git a/arch/arm/dts/rk3568-nanopi-r5s.dts b/arch/arm/dts/rk3568-nanopi-r5s.dts
deleted file mode 100644
index b6ad8328c7eb..000000000000
--- a/arch/arm/dts/rk3568-nanopi-r5s.dts
+++ /dev/null
@@ -1,136 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/*
- * Copyright (c) 2022 FriendlyElec Computer Tech. Co., Ltd.
- * (http://www.friendlyelec.com)
- *
- * Copyright (c) 2023 Tianling Shen <cnsztl@gmail.com>
- */
-
-/dts-v1/;
-#include "rk3568-nanopi-r5s.dtsi"
-
-/ {
-	model = "FriendlyElec NanoPi R5S";
-	compatible = "friendlyarm,nanopi-r5s", "rockchip,rk3568";
-
-	aliases {
-		ethernet0 = &gmac0;
-	};
-
-	gpio-leds {
-		compatible = "gpio-leds";
-		pinctrl-names = "default";
-		pinctrl-0 = <&lan1_led_pin>, <&lan2_led_pin>, <&power_led_pin>, <&wan_led_pin>;
-
-		led-lan1 {
-			color = <LED_COLOR_ID_GREEN>;
-			function = LED_FUNCTION_LAN;
-			function-enumerator = <1>;
-			gpios = <&gpio3 RK_PD6 GPIO_ACTIVE_HIGH>;
-		};
-
-		led-lan2 {
-			color = <LED_COLOR_ID_GREEN>;
-			function = LED_FUNCTION_LAN;
-			function-enumerator = <2>;
-			gpios = <&gpio3 RK_PD7 GPIO_ACTIVE_HIGH>;
-		};
-
-		power_led: led-power {
-			color = <LED_COLOR_ID_RED>;
-			function = LED_FUNCTION_POWER;
-			linux,default-trigger = "heartbeat";
-			gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
-		};
-
-		led-wan {
-			color = <LED_COLOR_ID_GREEN>;
-			function = LED_FUNCTION_WAN;
-			gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
-		};
-	};
-};
-
-&gmac0 {
-	assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
-	assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>;
-	assigned-clock-rates = <0>, <125000000>;
-	clock_in_out = "output";
-	phy-handle = <&rgmii_phy0>;
-	phy-mode = "rgmii";
-	pinctrl-names = "default";
-	pinctrl-0 = <&gmac0_miim
-		     &gmac0_tx_bus2
-		     &gmac0_rx_bus2
-		     &gmac0_rgmii_clk
-		     &gmac0_rgmii_bus>;
-	snps,reset-gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_LOW>;
-	snps,reset-active-low;
-	/* Reset time is 15ms, 50ms for rtl8211f */
-	snps,reset-delays-us = <0 15000 50000>;
-	tx_delay = <0x3c>;
-	rx_delay = <0x2f>;
-	status = "okay";
-};
-
-&mdio0 {
-	rgmii_phy0: ethernet-phy@1 {
-		compatible = "ethernet-phy-ieee802.3-c22";
-		reg = <1>;
-		pinctrl-0 = <&eth_phy0_reset_pin>;
-		pinctrl-names = "default";
-	};
-};
-
-&pcie2x1 {
-	num-lanes = <1>;
-	reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
-	status = "okay";
-};
-
-&pcie30phy {
-	data-lanes = <1 2>;
-	status = "okay";
-};
-
-&pcie3x1 {
-	num-lanes = <1>;
-	reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
-	vpcie3v3-supply = <&vcc3v3_pcie>;
-	status = "okay";
-};
-
-&pcie3x2 {
-	num-lanes = <1>;
-	num-ib-windows = <8>;
-	num-ob-windows = <8>;
-	reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
-	vpcie3v3-supply = <&vcc3v3_pcie>;
-	status = "okay";
-};
-
-&pinctrl {
-	gmac0 {
-		eth_phy0_reset_pin: eth-phy0-reset-pin {
-			rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>;
-		};
-	};
-
-	gpio-leds {
-		lan1_led_pin: lan1-led-pin {
-			rockchip,pins = <3 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-
-		lan2_led_pin: lan2-led-pin {
-			rockchip,pins = <3 RK_PD7 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-
-		power_led_pin: power-led-pin {
-			rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-
-		wan_led_pin: wan-led-pin {
-			rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-};
diff --git a/arch/arm/dts/rk3568-nanopi-r5s.dtsi b/arch/arm/dts/rk3568-nanopi-r5s.dtsi
deleted file mode 100644
index 93189f830640..000000000000
--- a/arch/arm/dts/rk3568-nanopi-r5s.dtsi
+++ /dev/null
@@ -1,587 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/*
- * Copyright (c) 2022 FriendlyElec Computer Tech. Co., Ltd.
- * (http://www.friendlyelec.com)
- *
- * Copyright (c) 2023 Tianling Shen <cnsztl@gmail.com>
- */
-
-/dts-v1/;
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-#include <dt-bindings/soc/rockchip,vop2.h>
-#include "rk3568.dtsi"
-
-/ {
-	aliases {
-		mmc0 = &sdmmc0;
-		mmc1 = &sdhci;
-	};
-
-	chosen: chosen {
-		stdout-path = "serial2:1500000n8";
-	};
-
-	hdmi-con {
-		compatible = "hdmi-connector";
-		type = "a";
-
-		port {
-			hdmi_con_in: endpoint {
-				remote-endpoint = <&hdmi_out_con>;
-			};
-		};
-	};
-
-	vdd_usbc: vdd-usbc-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vdd_usbc";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-	};
-
-	vcc3v3_sys: vcc3v3-sys-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc3v3_sys";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		vin-supply = <&vdd_usbc>;
-	};
-
-	vcc5v0_sys: vcc5v0-sys-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v0_sys";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		vin-supply = <&vdd_usbc>;
-	};
-
-	vcc3v3_pcie: vcc3v3-pcie-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc3v3_pcie";
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		enable-active-high;
-		gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
-		startup-delay-us = <200000>;
-		vin-supply = <&vcc5v0_sys>;
-	};
-
-	vcc5v0_usb: vcc5v0-usb-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v0_usb";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		vin-supply = <&vdd_usbc>;
-	};
-
-	vcc5v0_usb_host: vcc5v0-usb-host-regulator {
-		compatible = "regulator-fixed";
-		enable-active-high;
-		gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&vcc5v0_usb_host_en>;
-		regulator-name = "vcc5v0_usb_host";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		vin-supply = <&vcc5v0_usb>;
-	};
-
-	vcc5v0_usb_otg: vcc5v0-usb-otg-regulator {
-		compatible = "regulator-fixed";
-		enable-active-high;
-		gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&vcc5v0_usb_otg_en>;
-		regulator-name = "vcc5v0_usb_otg";
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		vin-supply = <&vcc5v0_usb>;
-	};
-
-	pcie30_avdd0v9: pcie30-avdd0v9-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "pcie30_avdd0v9";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <900000>;
-		regulator-max-microvolt = <900000>;
-		vin-supply = <&vcc3v3_sys>;
-	};
-
-	pcie30_avdd1v8: pcie30-avdd1v8-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "pcie30_avdd1v8";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <1800000>;
-		regulator-max-microvolt = <1800000>;
-		vin-supply = <&vcc3v3_sys>;
-	};
-};
-
-&combphy0 {
-	status = "okay";
-};
-
-&combphy1 {
-	status = "okay";
-};
-
-&combphy2 {
-	status = "okay";
-};
-
-&cpu0 {
-	cpu-supply = <&vdd_cpu>;
-};
-
-&cpu1 {
-	cpu-supply = <&vdd_cpu>;
-};
-
-&cpu2 {
-	cpu-supply = <&vdd_cpu>;
-};
-
-&cpu3 {
-	cpu-supply = <&vdd_cpu>;
-};
-
-&gpu {
-	mali-supply = <&vdd_gpu>;
-	status = "okay";
-};
-
-&hdmi {
-	avdd-0v9-supply = <&vdda0v9_image>;
-	avdd-1v8-supply = <&vcca1v8_image>;
-	status = "okay";
-};
-
-&hdmi_in {
-	hdmi_in_vp0: endpoint {
-		remote-endpoint = <&vp0_out_hdmi>;
-	};
-};
-
-&hdmi_out {
-	hdmi_out_con: endpoint {
-		remote-endpoint = <&hdmi_con_in>;
-	};
-};
-
-&hdmi_sound {
-	status = "okay";
-};
-
-&i2c0 {
-	status = "okay";
-
-	vdd_cpu: regulator@1c {
-		compatible = "tcs,tcs4525";
-		reg = <0x1c>;
-		fcs,suspend-voltage-selector = <1>;
-		regulator-name = "vdd_cpu";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <800000>;
-		regulator-max-microvolt = <1150000>;
-		regulator-ramp-delay = <2300>;
-		vin-supply = <&vcc5v0_sys>;
-
-		regulator-state-mem {
-			regulator-off-in-suspend;
-		};
-	};
-
-	rk809: pmic@20 {
-		compatible = "rockchip,rk809";
-		reg = <0x20>;
-		interrupt-parent = <&gpio0>;
-		interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
-		#clock-cells = <1>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pmic_int>;
-		rockchip,system-power-controller;
-		vcc1-supply = <&vcc3v3_sys>;
-		vcc2-supply = <&vcc3v3_sys>;
-		vcc3-supply = <&vcc3v3_sys>;
-		vcc4-supply = <&vcc3v3_sys>;
-		vcc5-supply = <&vcc3v3_sys>;
-		vcc6-supply = <&vcc3v3_sys>;
-		vcc7-supply = <&vcc3v3_sys>;
-		vcc8-supply = <&vcc3v3_sys>;
-		vcc9-supply = <&vcc3v3_sys>;
-		wakeup-source;
-
-		regulators {
-			vdd_logic: DCDC_REG1 {
-				regulator-name = "vdd_logic";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-initial-mode = <0x2>;
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <1350000>;
-				regulator-ramp-delay = <6001>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vdd_gpu: DCDC_REG2 {
-				regulator-name = "vdd_gpu";
-				regulator-always-on;
-				regulator-initial-mode = <0x2>;
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <1350000>;
-				regulator-ramp-delay = <6001>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc_ddr: DCDC_REG3 {
-				regulator-name = "vcc_ddr";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-initial-mode = <0x2>;
-
-				regulator-state-mem {
-					regulator-on-in-suspend;
-				};
-			};
-
-			vdd_npu: DCDC_REG4 {
-				regulator-name = "vdd_npu";
-				regulator-initial-mode = <0x2>;
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <1350000>;
-				regulator-ramp-delay = <6001>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc_1v8: DCDC_REG5 {
-				regulator-name = "vcc_1v8";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vdda0v9_image: LDO_REG1 {
-				regulator-name = "vdda0v9_image";
-				regulator-min-microvolt = <950000>;
-				regulator-max-microvolt = <950000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vdda_0v9: LDO_REG2 {
-				regulator-name = "vdda_0v9";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <900000>;
-				regulator-max-microvolt = <900000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vdda0v9_pmu: LDO_REG3 {
-				regulator-name = "vdda0v9_pmu";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <900000>;
-				regulator-max-microvolt = <900000>;
-
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <900000>;
-				};
-			};
-
-			vccio_acodec: LDO_REG4 {
-				regulator-name = "vccio_acodec";
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vccio_sd: LDO_REG5 {
-				regulator-name = "vccio_sd";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <3300000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc3v3_pmu: LDO_REG6 {
-				regulator-name = "vcc3v3_pmu";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <3300000>;
-				};
-			};
-
-			vcca_1v8: LDO_REG7 {
-				regulator-name = "vcca_1v8";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcca1v8_pmu: LDO_REG8 {
-				regulator-name = "vcca1v8_pmu";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <1800000>;
-				};
-			};
-
-			vcca1v8_image: LDO_REG9 {
-				regulator-name = "vcca1v8_image";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc_3v3: SWITCH_REG1 {
-				regulator-name = "vcc_3v3";
-				regulator-always-on;
-				regulator-boot-on;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc3v3_sd: SWITCH_REG2 {
-				regulator-name = "vcc3v3_sd";
-				regulator-always-on;
-				regulator-boot-on;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-		};
-
-	};
-};
-
-&i2c5 {
-	status = "okay";
-
-	hym8563: rtc@51 {
-		compatible = "haoyu,hym8563";
-		reg = <0x51>;
-		interrupt-parent = <&gpio0>;
-		interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>;
-		#clock-cells = <0>;
-		clock-output-names = "rtcic_32kout";
-		pinctrl-names = "default";
-		pinctrl-0 = <&hym8563_int>;
-		wakeup-source;
-	};
-};
-
-&i2s0_8ch {
-	status = "okay";
-};
-
-&pcie30phy {
-	data-lanes = <1 2>;
-	status = "okay";
-};
-
-&pinctrl {
-	hym8563 {
-		hym8563_int: hym8563-int {
-			rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
-		};
-	};
-
-	pmic {
-		pmic_int: pmic-int {
-			rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
-		};
-	};
-
-	usb {
-		vcc5v0_usb_host_en: vcc5v0-usb-host-en {
-			rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-
-		vcc5v0_usb_otg_en: vcc5v0-usb-otg-en {
-			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-};
-
-&pmu_io_domains {
-	pmuio1-supply = <&vcc3v3_pmu>;
-	pmuio2-supply = <&vcc3v3_pmu>;
-	vccio1-supply = <&vccio_acodec>;
-	vccio3-supply = <&vccio_sd>;
-	vccio4-supply = <&vcc_1v8>;
-	vccio5-supply = <&vcc_3v3>;
-	vccio6-supply = <&vcc_1v8>;
-	vccio7-supply = <&vcc_3v3>;
-	status = "okay";
-};
-
-&saradc {
-	vref-supply = <&vcca_1v8>;
-	status = "okay";
-};
-
-&sdhci {
-	bus-width = <8>;
-	max-frequency = <200000000>;
-	non-removable;
-	pinctrl-names = "default";
-	pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd>;
-	status = "okay";
-};
-
-&sdmmc0 {
-	max-frequency = <150000000>;
-	no-sdio;
-	no-mmc;
-	bus-width = <4>;
-	cap-mmc-highspeed;
-	cap-sd-highspeed;
-	disable-wp;
-	vmmc-supply = <&vcc3v3_sd>;
-	vqmmc-supply = <&vccio_sd>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
-	status = "okay";
-};
-
-&tsadc {
-	rockchip,hw-tshut-mode = <1>;
-	rockchip,hw-tshut-polarity = <0>;
-	status = "okay";
-};
-
-&uart2 {
-	status = "okay";
-};
-
-&usb_host0_ehci {
-	status = "okay";
-};
-
-&usb_host0_ohci {
-	status = "okay";
-};
-
-&usb_host0_xhci {
-	extcon = <&usb2phy0>;
-	dr_mode = "host";
-	status = "okay";
-};
-
-&usb_host1_ehci {
-	status = "okay";
-};
-
-&usb_host1_ohci {
-	status = "okay";
-};
-
-&usb_host1_xhci {
-	status = "okay";
-};
-
-&usb2phy0 {
-	status = "okay";
-};
-
-&usb2phy0_host {
-	phy-supply = <&vcc5v0_usb_host>;
-	status = "okay";
-};
-
-&usb2phy0_otg {
-	status = "okay";
-};
-
-&usb2phy1 {
-	status = "okay";
-};
-
-&usb2phy1_host {
-	phy-supply = <&vcc5v0_usb_otg>;
-	status = "okay";
-};
-
-&usb2phy1_otg {
-	status = "okay";
-};
-
-&vop {
-	assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
-	assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
-	status = "okay";
-};
-
-&vop_mmu {
-	status = "okay";
-};
-
-&vp0 {
-	vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
-		reg = <ROCKCHIP_VOP2_EP_HDMI0>;
-		remote-endpoint = <&hdmi_in_vp0>;
-	};
-};
diff --git a/arch/arm/dts/rk3568-odroid-m1.dts b/arch/arm/dts/rk3568-odroid-m1.dts
deleted file mode 100644
index a337f547caf5..000000000000
--- a/arch/arm/dts/rk3568-odroid-m1.dts
+++ /dev/null
@@ -1,741 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2022 Hardkernel Co., Ltd.
- *
- */
-
-/dts-v1/;
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-#include <dt-bindings/soc/rockchip,vop2.h>
-#include "rk3568.dtsi"
-
-/ {
-	model = "Hardkernel ODROID-M1";
-	compatible = "rockchip,rk3568-odroid-m1", "rockchip,rk3568";
-
-	aliases {
-		ethernet0 = &gmac0;
-		i2c0 = &i2c3;
-		i2c3 = &i2c0;
-		mmc0 = &sdhci;
-		mmc1 = &sdmmc0;
-		serial0 = &uart1;
-		serial1 = &uart0;
-	};
-
-	chosen {
-		stdout-path = "serial2:1500000n8";
-	};
-
-	dc_12v: dc-12v-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "dc_12v";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <12000000>;
-		regulator-max-microvolt = <12000000>;
-	};
-
-	hdmi-con {
-		compatible = "hdmi-connector";
-		type = "a";
-
-		port {
-			hdmi_con_in: endpoint {
-				remote-endpoint = <&hdmi_out_con>;
-			};
-		};
-	};
-
-	ir-receiver {
-		compatible = "gpio-ir-receiver";
-		gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&ir_receiver_pin>;
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		led_power: led-0 {
-			gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
-			function = LED_FUNCTION_POWER;
-			color = <LED_COLOR_ID_RED>;
-			default-state = "keep";
-			linux,default-trigger = "default-on";
-			pinctrl-names = "default";
-			pinctrl-0 = <&led_power_pin>;
-		};
-		led_work: led-1 {
-			gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
-			function = LED_FUNCTION_HEARTBEAT;
-			color = <LED_COLOR_ID_BLUE>;
-			linux,default-trigger = "heartbeat";
-			pinctrl-names = "default";
-			pinctrl-0 = <&led_work_pin>;
-		};
-	};
-
-	rk809-sound {
-		compatible = "simple-audio-card";
-		pinctrl-names = "default";
-		pinctrl-0 = <&hp_det_pin>;
-		simple-audio-card,name = "Analog RK817";
-		simple-audio-card,format = "i2s";
-		simple-audio-card,hp-det-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
-		simple-audio-card,mclk-fs = <256>;
-		simple-audio-card,widgets =
-			"Headphone", "Headphones",
-			"Speaker", "Speaker";
-		simple-audio-card,routing =
-			"Headphones", "HPOL",
-			"Headphones", "HPOR",
-			"Speaker", "SPKO";
-
-		simple-audio-card,cpu {
-			sound-dai = <&i2s1_8ch>;
-		};
-
-		simple-audio-card,codec {
-			sound-dai = <&rk809>;
-		};
-	};
-
-	vcc3v3_pcie: vcc3v3-pcie-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc3v3_pcie";
-		enable-active-high;
-		gpio = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&vcc3v3_pcie_en_pin>;
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		startup-delay-us = <5000>;
-		vin-supply = <&vcc3v3_sys>;
-	};
-
-	vcc3v3_sys: vcc3v3-sys-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc3v3_sys";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		vin-supply = <&dc_12v>;
-	};
-
-	vcc5v0_sys: vcc5v0-sys-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v0_sys";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		vin-supply = <&dc_12v>;
-	};
-
-	vcc5v0_usb_host: vcc5v0-usb-host-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v0_usb_host";
-		enable-active-high;
-		gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&vcc5v0_usb_host_en_pin>;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		vin-supply = <&vcc5v0_sys>;
-	};
-
-	vcc5v0_usb_otg: vcc5v0-usb-otg-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v0_usb_otg";
-		enable-active-high;
-		gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&vcc5v0_usb_otg_en_pin>;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		vin-supply = <&vcc5v0_sys>;
-	};
-};
-
-&combphy0 {
-	/* Used for USB3 */
-	phy-supply = <&vcc5v0_usb_host>;
-	status = "okay";
-};
-
-&combphy1 {
-	/* Used for USB3 */
-	phy-supply = <&vcc5v0_usb_otg>;
-	status = "okay";
-};
-
-&combphy2 {
-	/* used for SATA */
-	status = "okay";
-};
-
-&cpu0 {
-	cpu-supply = <&vdd_cpu>;
-};
-
-&cpu1 {
-	cpu-supply = <&vdd_cpu>;
-};
-
-&cpu2 {
-	cpu-supply = <&vdd_cpu>;
-};
-
-&cpu3 {
-	cpu-supply = <&vdd_cpu>;
-};
-
-&gmac0 {
-	assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
-	assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>;
-	assigned-clock-rates = <0>, <125000000>;
-	clock_in_out = "output";
-	phy-handle = <&rgmii_phy0>;
-	phy-mode = "rgmii";
-	phy-supply = <&vcc3v3_sys>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&gmac0_miim
-		     &gmac0_tx_bus2
-		     &gmac0_rx_bus2
-		     &gmac0_rgmii_clk
-		     &gmac0_rgmii_bus>;
-	status = "okay";
-
-	tx_delay = <0x4f>;
-	rx_delay = <0x2d>;
-};
-
-&gpu {
-	mali-supply = <&vdd_gpu>;
-	status = "okay";
-};
-
-&hdmi {
-	avdd-0v9-supply = <&vdda0v9_image>;
-	avdd-1v8-supply = <&vcca1v8_image>;
-	status = "okay";
-};
-
-&hdmi_in {
-	hdmi_in_vp0: endpoint {
-		remote-endpoint = <&vp0_out_hdmi>;
-	};
-};
-
-&hdmi_out {
-	hdmi_out_con: endpoint {
-		remote-endpoint = <&hdmi_con_in>;
-	};
-};
-
-&hdmi_sound {
-	status = "okay";
-};
-
-&i2c0 {
-	status = "okay";
-
-	vdd_cpu: regulator@1c {
-		compatible = "tcs,tcs4525";
-		reg = <0x1c>;
-		fcs,suspend-voltage-selector = <1>;
-		regulator-name = "vdd_cpu";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <800000>;
-		regulator-max-microvolt = <1150000>;
-		regulator-ramp-delay = <2300>;
-		vin-supply = <&vcc3v3_sys>;
-
-		regulator-state-mem {
-			regulator-off-in-suspend;
-		};
-	};
-
-	rk809: pmic@20 {
-		compatible = "rockchip,rk809";
-		reg = <0x20>;
-		interrupt-parent = <&gpio0>;
-		interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
-		assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
-		assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
-		#clock-cells = <1>;
-		clock-names = "mclk";
-		clocks = <&cru I2S1_MCLKOUT_TX>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pmic_int_l>, <&i2s1m0_mclk>;
-		rockchip,system-power-controller;
-		#sound-dai-cells = <0>;
-		vcc1-supply = <&vcc3v3_sys>;
-		vcc2-supply = <&vcc3v3_sys>;
-		vcc3-supply = <&vcc3v3_sys>;
-		vcc4-supply = <&vcc3v3_sys>;
-		vcc5-supply = <&vcc3v3_sys>;
-		vcc6-supply = <&vcc3v3_sys>;
-		vcc7-supply = <&vcc3v3_sys>;
-		vcc8-supply = <&vcc3v3_sys>;
-		vcc9-supply = <&vcc3v3_sys>;
-		wakeup-source;
-
-		regulators {
-			vdd_logic: DCDC_REG1 {
-				regulator-name = "vdd_logic";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-initial-mode = <0x2>;
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <1350000>;
-				regulator-ramp-delay = <6001>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vdd_gpu: DCDC_REG2 {
-				regulator-name = "vdd_gpu";
-				regulator-always-on;
-				regulator-initial-mode = <0x2>;
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <1350000>;
-				regulator-ramp-delay = <6001>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc_ddr: DCDC_REG3 {
-				regulator-name = "vcc_ddr";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-initial-mode = <0x2>;
-
-				regulator-state-mem {
-					regulator-on-in-suspend;
-				};
-			};
-
-			vdd_npu: DCDC_REG4 {
-				regulator-name = "vdd_npu";
-				regulator-initial-mode = <0x2>;
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <1350000>;
-				regulator-ramp-delay = <6001>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc_1v8: DCDC_REG5 {
-				regulator-name = "vcc_1v8";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vdda0v9_image: LDO_REG1 {
-				regulator-name = "vdda0v9_image";
-				regulator-always-on;
-				regulator-min-microvolt = <900000>;
-				regulator-max-microvolt = <900000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vdda_0v9: LDO_REG2 {
-				regulator-name = "vdda_0v9";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <900000>;
-				regulator-max-microvolt = <900000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vdda0v9_pmu: LDO_REG3 {
-				regulator-name = "vdda0v9_pmu";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <900000>;
-				regulator-max-microvolt = <900000>;
-
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <900000>;
-				};
-			};
-
-			vccio_acodec: LDO_REG4 {
-				regulator-name = "vccio_acodec";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vccio_sd: LDO_REG5 {
-				regulator-name = "vccio_sd";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <3300000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc3v3_pmu: LDO_REG6 {
-				regulator-name = "vcc3v3_pmu";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <3300000>;
-				};
-			};
-
-			vcca_1v8: LDO_REG7 {
-				regulator-name = "vcca_1v8";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcca1v8_pmu: LDO_REG8 {
-				regulator-name = "vcca1v8_pmu";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <1800000>;
-				};
-			};
-
-			vcca1v8_image: LDO_REG9 {
-				regulator-name = "vcca1v8_image";
-				regulator-always-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc_3v3: SWITCH_REG1 {
-				regulator-name = "vcc_3v3";
-				regulator-always-on;
-				regulator-boot-on;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc3v3_sd: SWITCH_REG2 {
-				regulator-name = "vcc3v3_sd";
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-		};
-	};
-};
-
-&i2s0_8ch {
-	status = "okay";
-};
-
-&i2s1_8ch {
-	rockchip,trcm-sync-tx-only;
-	status = "okay";
-};
-
-&mdio0 {
-	rgmii_phy0: ethernet-phy@0 {
-		compatible = "ethernet-phy-ieee802.3-c22";
-		reg = <0x0>;
-		reset-assert-us = <20000>;
-		reset-deassert-us = <100000>;
-		reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
-	};
-};
-
-&pcie30phy {
-	status = "okay";
-};
-
-&pcie3x2 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pcie_reset_pin>;
-	reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
-	vpcie3v3-supply = <&vcc3v3_pcie>;
-	status = "okay";
-};
-
-&pinctrl {
-	fspi {
-		fspi_dual_io_pins: fspi-dual-io-pins {
-			rockchip,pins =
-				/* fspi_clk */
-				<1 RK_PD0 1 &pcfg_pull_none>,
-				/* fspi_cs0n */
-				<1 RK_PD3 1 &pcfg_pull_none>,
-				/* fspi_d0 */
-				<1 RK_PD1 1 &pcfg_pull_none>,
-				/* fspi_d1 */
-				<1 RK_PD2 1 &pcfg_pull_none>;
-		};
-	};
-
-	ir-receiver {
-		ir_receiver_pin: ir-receiver-pin {
-			/* external pullup to VCC3V3_SYS */
-			rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	leds {
-		led_power_pin: led-power-pin {
-			rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-		led_work_pin: led-work-pin {
-			rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	pcie {
-		pcie_reset_pin: pcie-reset-pin {
-			rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-		vcc3v3_pcie_en_pin: vcc3v3-pcie-en-pin {
-			rockchip,pins = <4 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	pmic {
-		pmic_int_l: pmic-int-l {
-			rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
-		};
-	};
-
-	rk809 {
-		hp_det_pin: hp-det-pin {
-			rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	usb {
-		vcc5v0_usb_host_en_pin: vcc5v0-usb-host-en-pin {
-			rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-		vcc5v0_usb_otg_en_pin: vcc5v0-usb-dr-en-pin {
-			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-};
-
-&pmu_io_domains {
-	pmuio1-supply = <&vcc3v3_pmu>;
-	pmuio2-supply = <&vcc3v3_pmu>;
-	vccio1-supply = <&vccio_acodec>;
-	vccio2-supply = <&vcc_1v8>;
-	vccio3-supply = <&vccio_sd>;
-	vccio4-supply = <&vcc_1v8>;
-	vccio5-supply = <&vcc_3v3>;
-	vccio6-supply = <&vcc_3v3>;
-	vccio7-supply = <&vcc_3v3>;
-	status = "okay";
-};
-
-&saradc {
-	vref-supply = <&vcca_1v8>;
-	status = "okay";
-};
-
-&sata2 {
-	status = "okay";
-};
-
-&sdhci {
-	bus-width = <8>;
-	max-frequency = <200000000>;
-	non-removable;
-	pinctrl-names = "default";
-	pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe &emmc_rstnout>;
-	vmmc-supply = <&vcc_3v3>;
-	vqmmc-supply = <&vcc_1v8>;
-	status = "okay";
-};
-
-&sdmmc0 {
-	bus-width = <4>;
-	cap-sd-highspeed;
-	cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
-	disable-wp;
-	pinctrl-names = "default";
-	pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
-	sd-uhs-sdr50;
-	vmmc-supply = <&vcc3v3_sd>;
-	vqmmc-supply = <&vccio_sd>;
-	status = "okay";
-};
-
-&sfc {
-	/* Dual I/O mode as the D2 pin conflicts with the eMMC */
-	pinctrl-0 = <&fspi_dual_io_pins>;
-	pinctrl-names = "default";
-	#address-cells = <1>;
-	#size-cells = <0>;
-	status = "okay";
-
-	flash@0 {
-		compatible = "jedec,spi-nor";
-		reg = <0>;
-		spi-max-frequency = <100000000>;
-		spi-rx-bus-width = <2>;
-		spi-tx-bus-width = <1>;
-
-		partitions {
-			compatible = "fixed-partitions";
-			#address-cells = <1>;
-			#size-cells = <1>;
-
-			partition@0 {
-				label = "SPL";
-				reg = <0x0 0xe0000>;
-			};
-			partition@e0000 {
-				label = "U-Boot Env";
-				reg = <0xe0000 0x20000>;
-			};
-			partition@100000 {
-				label = "U-Boot";
-				reg = <0x100000 0x200000>;
-			};
-			partition@300000 {
-				label = "splash";
-				reg = <0x300000 0x100000>;
-			};
-			partition@400000 {
-				label = "Filesystem";
-				reg = <0x400000 0xc00000>;
-			};
-		};
-	};
-};
-
-&tsadc {
-	rockchip,hw-tshut-mode = <1>;
-	rockchip,hw-tshut-polarity = <0>;
-	status = "okay";
-};
-
-&uart2 {
-	status = "okay";
-};
-
-&usb_host0_ehci {
-	status = "okay";
-};
-
-&usb_host0_ohci {
-	status = "okay";
-};
-
-&usb_host0_xhci {
-	dr_mode = "host";
-	status = "okay";
-};
-
-&usb_host1_ehci {
-	status = "okay";
-};
-
-&usb_host1_ohci {
-	status = "okay";
-};
-
-&usb_host1_xhci {
-	status = "okay";
-};
-
-&usb2phy0 {
-	status = "okay";
-};
-
-&usb2phy0_host {
-	phy-supply = <&vcc5v0_usb_host>;
-	status = "okay";
-};
-
-&usb2phy0_otg {
-	phy-supply = <&vcc5v0_usb_otg>;
-	status = "okay";
-};
-
-&usb2phy1 {
-	status = "okay";
-};
-
-&usb2phy1_host {
-	phy-supply = <&vcc5v0_usb_host>;
-	status = "okay";
-};
-
-&usb2phy1_otg {
-	phy-supply = <&vcc5v0_usb_host>;
-	status = "okay";
-};
-
-&vop {
-	assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
-	assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
-	status = "okay";
-};
-
-&vop_mmu {
-	status = "okay";
-};
-
-&vp0 {
-	vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
-		reg = <ROCKCHIP_VOP2_EP_HDMI0>;
-		remote-endpoint = <&hdmi_in_vp0>;
-	};
-};
diff --git a/arch/arm/dts/rk3568-pinctrl.dtsi b/arch/arm/dts/rk3568-pinctrl.dtsi
deleted file mode 100644
index 0a979bfb63d9..000000000000
--- a/arch/arm/dts/rk3568-pinctrl.dtsi
+++ /dev/null
@@ -1,3214 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
- */
-
-#include <dt-bindings/pinctrl/rockchip.h>
-#include "rockchip-pinconf.dtsi"
-
-/*
- * This file is auto generated by pin2dts tool, please keep these code
- * by adding changes at end of this file.
- */
-&pinctrl {
-	acodec {
-		/omit-if-no-ref/
-		acodec_pins: acodec-pins {
-			rockchip,pins =
-				/* acodec_adc_sync */
-				<1 RK_PB1 5 &pcfg_pull_none>,
-				/* acodec_adcclk */
-				<1 RK_PA1 5 &pcfg_pull_none>,
-				/* acodec_adcdata */
-				<1 RK_PA0 5 &pcfg_pull_none>,
-				/* acodec_dac_datal */
-				<1 RK_PA7 5 &pcfg_pull_none>,
-				/* acodec_dac_datar */
-				<1 RK_PB0 5 &pcfg_pull_none>,
-				/* acodec_dacclk */
-				<1 RK_PA3 5 &pcfg_pull_none>,
-				/* acodec_dacsync */
-				<1 RK_PA5 5 &pcfg_pull_none>;
-		};
-	};
-
-	audiopwm {
-		/omit-if-no-ref/
-		audiopwm_lout: audiopwm-lout {
-			rockchip,pins =
-				/* audiopwm_lout */
-				<1 RK_PA0 4 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		audiopwm_loutn: audiopwm-loutn {
-			rockchip,pins =
-				/* audiopwm_loutn */
-				<1 RK_PA1 6 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		audiopwm_loutp: audiopwm-loutp {
-			rockchip,pins =
-				/* audiopwm_loutp */
-				<1 RK_PA0 6 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		audiopwm_rout: audiopwm-rout {
-			rockchip,pins =
-				/* audiopwm_rout */
-				<1 RK_PA1 4 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		audiopwm_routn: audiopwm-routn {
-			rockchip,pins =
-				/* audiopwm_routn */
-				<1 RK_PA7 4 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		audiopwm_routp: audiopwm-routp {
-			rockchip,pins =
-				/* audiopwm_routp */
-				<1 RK_PA6 4 &pcfg_pull_none>;
-		};
-	};
-
-	bt656 {
-		/omit-if-no-ref/
-		bt656m0_pins: bt656m0-pins {
-			rockchip,pins =
-				/* bt656_clkm0 */
-				<3 RK_PA0 2 &pcfg_pull_none>,
-				/* bt656_d0m0 */
-				<2 RK_PD0 2 &pcfg_pull_none>,
-				/* bt656_d1m0 */
-				<2 RK_PD1 2 &pcfg_pull_none>,
-				/* bt656_d2m0 */
-				<2 RK_PD2 2 &pcfg_pull_none>,
-				/* bt656_d3m0 */
-				<2 RK_PD3 2 &pcfg_pull_none>,
-				/* bt656_d4m0 */
-				<2 RK_PD4 2 &pcfg_pull_none>,
-				/* bt656_d5m0 */
-				<2 RK_PD5 2 &pcfg_pull_none>,
-				/* bt656_d6m0 */
-				<2 RK_PD6 2 &pcfg_pull_none>,
-				/* bt656_d7m0 */
-				<2 RK_PD7 2 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		bt656m1_pins: bt656m1-pins {
-			rockchip,pins =
-				/* bt656_clkm1 */
-				<4 RK_PB4 5 &pcfg_pull_none>,
-				/* bt656_d0m1 */
-				<3 RK_PC6 5 &pcfg_pull_none>,
-				/* bt656_d1m1 */
-				<3 RK_PC7 5 &pcfg_pull_none>,
-				/* bt656_d2m1 */
-				<3 RK_PD0 5 &pcfg_pull_none>,
-				/* bt656_d3m1 */
-				<3 RK_PD1 5 &pcfg_pull_none>,
-				/* bt656_d4m1 */
-				<3 RK_PD2 5 &pcfg_pull_none>,
-				/* bt656_d5m1 */
-				<3 RK_PD3 5 &pcfg_pull_none>,
-				/* bt656_d6m1 */
-				<3 RK_PD4 5 &pcfg_pull_none>,
-				/* bt656_d7m1 */
-				<3 RK_PD5 5 &pcfg_pull_none>;
-		};
-	};
-
-	bt1120 {
-		/omit-if-no-ref/
-		bt1120_pins: bt1120-pins {
-			rockchip,pins =
-				/* bt1120_clk */
-				<3 RK_PA6 2 &pcfg_pull_none>,
-				/* bt1120_d0 */
-				<3 RK_PA1 2 &pcfg_pull_none>,
-				/* bt1120_d1 */
-				<3 RK_PA2 2 &pcfg_pull_none>,
-				/* bt1120_d2 */
-				<3 RK_PA3 2 &pcfg_pull_none>,
-				/* bt1120_d3 */
-				<3 RK_PA4 2 &pcfg_pull_none>,
-				/* bt1120_d4 */
-				<3 RK_PA5 2 &pcfg_pull_none>,
-				/* bt1120_d5 */
-				<3 RK_PA7 2 &pcfg_pull_none>,
-				/* bt1120_d6 */
-				<3 RK_PB0 2 &pcfg_pull_none>,
-				/* bt1120_d7 */
-				<3 RK_PB1 2 &pcfg_pull_none>,
-				/* bt1120_d8 */
-				<3 RK_PB2 2 &pcfg_pull_none>,
-				/* bt1120_d9 */
-				<3 RK_PB3 2 &pcfg_pull_none>,
-				/* bt1120_d10 */
-				<3 RK_PB4 2 &pcfg_pull_none>,
-				/* bt1120_d11 */
-				<3 RK_PB5 2 &pcfg_pull_none>,
-				/* bt1120_d12 */
-				<3 RK_PB6 2 &pcfg_pull_none>,
-				/* bt1120_d13 */
-				<3 RK_PC1 2 &pcfg_pull_none>,
-				/* bt1120_d14 */
-				<3 RK_PC2 2 &pcfg_pull_none>,
-				/* bt1120_d15 */
-				<3 RK_PC3 2 &pcfg_pull_none>;
-		};
-	};
-
-	cam {
-		/omit-if-no-ref/
-		cam_clkout0: cam-clkout0 {
-			rockchip,pins =
-				/* cam_clkout0 */
-				<4 RK_PA7 1 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		cam_clkout1: cam-clkout1 {
-			rockchip,pins =
-				/* cam_clkout1 */
-				<4 RK_PB0 1 &pcfg_pull_none>;
-		};
-	};
-
-	can0 {
-		/omit-if-no-ref/
-		can0m0_pins: can0m0-pins {
-			rockchip,pins =
-				/* can0_rxm0 */
-				<0 RK_PB4 2 &pcfg_pull_none>,
-				/* can0_txm0 */
-				<0 RK_PB3 2 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		can0m1_pins: can0m1-pins {
-			rockchip,pins =
-				/* can0_rxm1 */
-				<2 RK_PA2 4 &pcfg_pull_none>,
-				/* can0_txm1 */
-				<2 RK_PA1 4 &pcfg_pull_none>;
-		};
-	};
-
-	can1 {
-		/omit-if-no-ref/
-		can1m0_pins: can1m0-pins {
-			rockchip,pins =
-				/* can1_rxm0 */
-				<1 RK_PA0 3 &pcfg_pull_none>,
-				/* can1_txm0 */
-				<1 RK_PA1 3 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		can1m1_pins: can1m1-pins {
-			rockchip,pins =
-				/* can1_rxm1 */
-				<4 RK_PC2 3 &pcfg_pull_none>,
-				/* can1_txm1 */
-				<4 RK_PC3 3 &pcfg_pull_none>;
-		};
-	};
-
-	can2 {
-		/omit-if-no-ref/
-		can2m0_pins: can2m0-pins {
-			rockchip,pins =
-				/* can2_rxm0 */
-				<4 RK_PB4 3 &pcfg_pull_none>,
-				/* can2_txm0 */
-				<4 RK_PB5 3 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		can2m1_pins: can2m1-pins {
-			rockchip,pins =
-				/* can2_rxm1 */
-				<2 RK_PB1 4 &pcfg_pull_none>,
-				/* can2_txm1 */
-				<2 RK_PB2 4 &pcfg_pull_none>;
-		};
-	};
-
-	cif {
-		/omit-if-no-ref/
-		cif_clk: cif-clk {
-			rockchip,pins =
-				/* cif_clkout */
-				<4 RK_PC0 1 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		cif_dvp_clk: cif-dvp-clk {
-			rockchip,pins =
-				/* cif_clkin */
-				<4 RK_PC1 1 &pcfg_pull_none>,
-				/* cif_href */
-				<4 RK_PB6 1 &pcfg_pull_none>,
-				/* cif_vsync */
-				<4 RK_PB7 1 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		cif_dvp_bus16: cif-dvp-bus16 {
-			rockchip,pins =
-				/* cif_d8 */
-				<3 RK_PD6 1 &pcfg_pull_none>,
-				/* cif_d9 */
-				<3 RK_PD7 1 &pcfg_pull_none>,
-				/* cif_d10 */
-				<4 RK_PA0 1 &pcfg_pull_none>,
-				/* cif_d11 */
-				<4 RK_PA1 1 &pcfg_pull_none>,
-				/* cif_d12 */
-				<4 RK_PA2 1 &pcfg_pull_none>,
-				/* cif_d13 */
-				<4 RK_PA3 1 &pcfg_pull_none>,
-				/* cif_d14 */
-				<4 RK_PA4 1 &pcfg_pull_none>,
-				/* cif_d15 */
-				<4 RK_PA5 1 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		cif_dvp_bus8: cif-dvp-bus8 {
-			rockchip,pins =
-				/* cif_d0 */
-				<3 RK_PC6 1 &pcfg_pull_none>,
-				/* cif_d1 */
-				<3 RK_PC7 1 &pcfg_pull_none>,
-				/* cif_d2 */
-				<3 RK_PD0 1 &pcfg_pull_none>,
-				/* cif_d3 */
-				<3 RK_PD1 1 &pcfg_pull_none>,
-				/* cif_d4 */
-				<3 RK_PD2 1 &pcfg_pull_none>,
-				/* cif_d5 */
-				<3 RK_PD3 1 &pcfg_pull_none>,
-				/* cif_d6 */
-				<3 RK_PD4 1 &pcfg_pull_none>,
-				/* cif_d7 */
-				<3 RK_PD5 1 &pcfg_pull_none>;
-		};
-	};
-
-	clk32k {
-		/omit-if-no-ref/
-		clk32k_in: clk32k-in {
-			rockchip,pins =
-				/* clk32k_in */
-				<0 RK_PB0 1 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		clk32k_out0: clk32k-out0 {
-			rockchip,pins =
-				/* clk32k_out0 */
-				<0 RK_PB0 2 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		clk32k_out1: clk32k-out1 {
-			rockchip,pins =
-				/* clk32k_out1 */
-				<2 RK_PC6 1 &pcfg_pull_none>;
-		};
-	};
-
-	cpu {
-		/omit-if-no-ref/
-		cpu_pins: cpu-pins {
-			rockchip,pins =
-				/* cpu_avs */
-				<0 RK_PB7 2 &pcfg_pull_none>;
-		};
-	};
-
-	ebc {
-		/omit-if-no-ref/
-		ebc_extern: ebc-extern {
-			rockchip,pins =
-				/* ebc_sdce1 */
-				<4 RK_PA7 2 &pcfg_pull_none>,
-				/* ebc_sdce2 */
-				<4 RK_PB0 2 &pcfg_pull_none>,
-				/* ebc_sdce3 */
-				<4 RK_PB1 2 &pcfg_pull_none>,
-				/* ebc_sdshr */
-				<4 RK_PB5 2 &pcfg_pull_none>,
-				/* ebc_vcom */
-				<4 RK_PB2 2 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		ebc_pins: ebc-pins {
-			rockchip,pins =
-				/* ebc_gdclk */
-				<4 RK_PC0 2 &pcfg_pull_none>,
-				/* ebc_gdoe */
-				<4 RK_PB3 2 &pcfg_pull_none>,
-				/* ebc_gdsp */
-				<4 RK_PB4 2 &pcfg_pull_none>,
-				/* ebc_sdce0 */
-				<4 RK_PA6 2 &pcfg_pull_none>,
-				/* ebc_sdclk */
-				<4 RK_PC1 2 &pcfg_pull_none>,
-				/* ebc_sddo0 */
-				<3 RK_PC6 2 &pcfg_pull_none>,
-				/* ebc_sddo1 */
-				<3 RK_PC7 2 &pcfg_pull_none>,
-				/* ebc_sddo2 */
-				<3 RK_PD0 2 &pcfg_pull_none>,
-				/* ebc_sddo3 */
-				<3 RK_PD1 2 &pcfg_pull_none>,
-				/* ebc_sddo4 */
-				<3 RK_PD2 2 &pcfg_pull_none>,
-				/* ebc_sddo5 */
-				<3 RK_PD3 2 &pcfg_pull_none>,
-				/* ebc_sddo6 */
-				<3 RK_PD4 2 &pcfg_pull_none>,
-				/* ebc_sddo7 */
-				<3 RK_PD5 2 &pcfg_pull_none>,
-				/* ebc_sddo8 */
-				<3 RK_PD6 2 &pcfg_pull_none>,
-				/* ebc_sddo9 */
-				<3 RK_PD7 2 &pcfg_pull_none>,
-				/* ebc_sddo10 */
-				<4 RK_PA0 2 &pcfg_pull_none>,
-				/* ebc_sddo11 */
-				<4 RK_PA1 2 &pcfg_pull_none>,
-				/* ebc_sddo12 */
-				<4 RK_PA2 2 &pcfg_pull_none>,
-				/* ebc_sddo13 */
-				<4 RK_PA3 2 &pcfg_pull_none>,
-				/* ebc_sddo14 */
-				<4 RK_PA4 2 &pcfg_pull_none>,
-				/* ebc_sddo15 */
-				<4 RK_PA5 2 &pcfg_pull_none>,
-				/* ebc_sdle */
-				<4 RK_PB6 2 &pcfg_pull_none>,
-				/* ebc_sdoe */
-				<4 RK_PB7 2 &pcfg_pull_none>;
-		};
-	};
-
-	edpdp {
-		/omit-if-no-ref/
-		edpdpm0_pins: edpdpm0-pins {
-			rockchip,pins =
-				/* edpdp_hpdinm0 */
-				<4 RK_PC4 1 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		edpdpm1_pins: edpdpm1-pins {
-			rockchip,pins =
-				/* edpdp_hpdinm1 */
-				<0 RK_PC2 2 &pcfg_pull_none>;
-		};
-	};
-
-	emmc {
-		/omit-if-no-ref/
-		emmc_rstnout: emmc-rstnout {
-			rockchip,pins =
-				/* emmc_rstn */
-				<1 RK_PC7 1 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		emmc_bus8: emmc-bus8 {
-			rockchip,pins =
-				/* emmc_d0 */
-				<1 RK_PB4 1 &pcfg_pull_up_drv_level_2>,
-				/* emmc_d1 */
-				<1 RK_PB5 1 &pcfg_pull_up_drv_level_2>,
-				/* emmc_d2 */
-				<1 RK_PB6 1 &pcfg_pull_up_drv_level_2>,
-				/* emmc_d3 */
-				<1 RK_PB7 1 &pcfg_pull_up_drv_level_2>,
-				/* emmc_d4 */
-				<1 RK_PC0 1 &pcfg_pull_up_drv_level_2>,
-				/* emmc_d5 */
-				<1 RK_PC1 1 &pcfg_pull_up_drv_level_2>,
-				/* emmc_d6 */
-				<1 RK_PC2 1 &pcfg_pull_up_drv_level_2>,
-				/* emmc_d7 */
-				<1 RK_PC3 1 &pcfg_pull_up_drv_level_2>;
-		};
-
-		/omit-if-no-ref/
-		emmc_clk: emmc-clk {
-			rockchip,pins =
-				/* emmc_clkout */
-				<1 RK_PC5 1 &pcfg_pull_up_drv_level_2>;
-		};
-
-		/omit-if-no-ref/
-		emmc_cmd: emmc-cmd {
-			rockchip,pins =
-				/* emmc_cmd */
-				<1 RK_PC4 1 &pcfg_pull_up_drv_level_2>;
-		};
-
-		/omit-if-no-ref/
-		emmc_datastrobe: emmc-datastrobe {
-			rockchip,pins =
-				/* emmc_datastrobe */
-				<1 RK_PC6 1 &pcfg_pull_none>;
-		};
-	};
-
-	eth0 {
-		/omit-if-no-ref/
-		eth0_pins: eth0-pins {
-			rockchip,pins =
-				/* eth0_refclko25m */
-				<2 RK_PC1 2 &pcfg_pull_none>;
-		};
-	};
-
-	eth1 {
-		/omit-if-no-ref/
-		eth1m0_pins: eth1m0-pins {
-			rockchip,pins =
-				/* eth1_refclko25mm0 */
-				<3 RK_PB0 3 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		eth1m1_pins: eth1m1-pins {
-			rockchip,pins =
-				/* eth1_refclko25mm1 */
-				<4 RK_PB3 3 &pcfg_pull_none>;
-		};
-	};
-
-	flash {
-		/omit-if-no-ref/
-		flash_pins: flash-pins {
-			rockchip,pins =
-				/* flash_ale */
-				<1 RK_PD0 2 &pcfg_pull_none>,
-				/* flash_cle */
-				<1 RK_PC6 3 &pcfg_pull_none>,
-				/* flash_cs0n */
-				<1 RK_PD3 2 &pcfg_pull_none>,
-				/* flash_cs1n */
-				<1 RK_PD4 2 &pcfg_pull_none>,
-				/* flash_d0 */
-				<1 RK_PB4 2 &pcfg_pull_none>,
-				/* flash_d1 */
-				<1 RK_PB5 2 &pcfg_pull_none>,
-				/* flash_d2 */
-				<1 RK_PB6 2 &pcfg_pull_none>,
-				/* flash_d3 */
-				<1 RK_PB7 2 &pcfg_pull_none>,
-				/* flash_d4 */
-				<1 RK_PC0 2 &pcfg_pull_none>,
-				/* flash_d5 */
-				<1 RK_PC1 2 &pcfg_pull_none>,
-				/* flash_d6 */
-				<1 RK_PC2 2 &pcfg_pull_none>,
-				/* flash_d7 */
-				<1 RK_PC3 2 &pcfg_pull_none>,
-				/* flash_dqs */
-				<1 RK_PC5 2 &pcfg_pull_none>,
-				/* flash_rdn */
-				<1 RK_PD2 2 &pcfg_pull_none>,
-				/* flash_rdy */
-				<1 RK_PD1 2 &pcfg_pull_none>,
-				/* flash_volsel */
-				<0 RK_PA7 1 &pcfg_pull_none>,
-				/* flash_wpn */
-				<1 RK_PC7 3 &pcfg_pull_none>,
-				/* flash_wrn */
-				<1 RK_PC4 2 &pcfg_pull_none>;
-		};
-	};
-
-	fspi {
-		/omit-if-no-ref/
-		fspi_pins: fspi-pins {
-			rockchip,pins =
-				/* fspi_clk */
-				<1 RK_PD0 1 &pcfg_pull_none>,
-				/* fspi_cs0n */
-				<1 RK_PD3 1 &pcfg_pull_none>,
-				/* fspi_d0 */
-				<1 RK_PD1 1 &pcfg_pull_none>,
-				/* fspi_d1 */
-				<1 RK_PD2 1 &pcfg_pull_none>,
-				/* fspi_d2 */
-				<1 RK_PC7 2 &pcfg_pull_none>,
-				/* fspi_d3 */
-				<1 RK_PD4 1 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		fspi_cs1: fspi-cs1 {
-			rockchip,pins =
-				/* fspi_cs1n */
-				<1 RK_PC6 2 &pcfg_pull_up>;
-		};
-	};
-
-	gmac0 {
-		/omit-if-no-ref/
-		gmac0_miim: gmac0-miim {
-			rockchip,pins =
-				/* gmac0_mdc */
-				<2 RK_PC3 2 &pcfg_pull_none>,
-				/* gmac0_mdio */
-				<2 RK_PC4 2 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		gmac0_clkinout: gmac0-clkinout {
-			rockchip,pins =
-				/* gmac0_mclkinout */
-				<2 RK_PC2 2 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		gmac0_rx_er: gmac0-rx-er {
-			rockchip,pins =
-				/* gmac0_rxer */
-				<2 RK_PC5 2 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		gmac0_rx_bus2: gmac0-rx-bus2 {
-			rockchip,pins =
-				/* gmac0_rxd0 */
-				<2 RK_PB6 1 &pcfg_pull_none>,
-				/* gmac0_rxd1 */
-				<2 RK_PB7 2 &pcfg_pull_none>,
-				/* gmac0_rxdvcrs */
-				<2 RK_PC0 2 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		gmac0_tx_bus2: gmac0-tx-bus2 {
-			rockchip,pins =
-				/* gmac0_txd0 */
-				<2 RK_PB3 1 &pcfg_pull_none_drv_level_2>,
-				/* gmac0_txd1 */
-				<2 RK_PB4 1 &pcfg_pull_none_drv_level_2>,
-				/* gmac0_txen */
-				<2 RK_PB5 1 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		gmac0_rgmii_clk: gmac0-rgmii-clk {
-			rockchip,pins =
-				/* gmac0_rxclk */
-				<2 RK_PA5 2 &pcfg_pull_none>,
-				/* gmac0_txclk */
-				<2 RK_PB0 2 &pcfg_pull_none_drv_level_1>;
-		};
-
-		/omit-if-no-ref/
-		gmac0_rgmii_bus: gmac0-rgmii-bus {
-			rockchip,pins =
-				/* gmac0_rxd2 */
-				<2 RK_PA3 2 &pcfg_pull_none>,
-				/* gmac0_rxd3 */
-				<2 RK_PA4 2 &pcfg_pull_none>,
-				/* gmac0_txd2 */
-				<2 RK_PA6 2 &pcfg_pull_none_drv_level_2>,
-				/* gmac0_txd3 */
-				<2 RK_PA7 2 &pcfg_pull_none_drv_level_2>;
-		};
-	};
-
-	gmac1 {
-		/omit-if-no-ref/
-		gmac1m0_miim: gmac1m0-miim {
-			rockchip,pins =
-				/* gmac1_mdcm0 */
-				<3 RK_PC4 3 &pcfg_pull_none>,
-				/* gmac1_mdiom0 */
-				<3 RK_PC5 3 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		gmac1m0_clkinout: gmac1m0-clkinout {
-			rockchip,pins =
-				/* gmac1_mclkinoutm0 */
-				<3 RK_PC0 3 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		gmac1m0_rx_er: gmac1m0-rx-er {
-			rockchip,pins =
-				/* gmac1_rxerm0 */
-				<3 RK_PB4 3 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		gmac1m0_rx_bus2: gmac1m0-rx-bus2 {
-			rockchip,pins =
-				/* gmac1_rxd0m0 */
-				<3 RK_PB1 3 &pcfg_pull_none>,
-				/* gmac1_rxd1m0 */
-				<3 RK_PB2 3 &pcfg_pull_none>,
-				/* gmac1_rxdvcrsm0 */
-				<3 RK_PB3 3 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		gmac1m0_tx_bus2: gmac1m0-tx-bus2 {
-			rockchip,pins =
-				/* gmac1_txd0m0 */
-				<3 RK_PB5 3 &pcfg_pull_none_drv_level_2>,
-				/* gmac1_txd1m0 */
-				<3 RK_PB6 3 &pcfg_pull_none_drv_level_2>,
-				/* gmac1_txenm0 */
-				<3 RK_PB7 3 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		gmac1m0_rgmii_clk: gmac1m0-rgmii-clk {
-			rockchip,pins =
-				/* gmac1_rxclkm0 */
-				<3 RK_PA7 3 &pcfg_pull_none>,
-				/* gmac1_txclkm0 */
-				<3 RK_PA6 3 &pcfg_pull_none_drv_level_1>;
-		};
-
-		/omit-if-no-ref/
-		gmac1m0_rgmii_bus: gmac1m0-rgmii-bus {
-			rockchip,pins =
-				/* gmac1_rxd2m0 */
-				<3 RK_PA4 3 &pcfg_pull_none>,
-				/* gmac1_rxd3m0 */
-				<3 RK_PA5 3 &pcfg_pull_none>,
-				/* gmac1_txd2m0 */
-				<3 RK_PA2 3 &pcfg_pull_none_drv_level_2>,
-				/* gmac1_txd3m0 */
-				<3 RK_PA3 3 &pcfg_pull_none_drv_level_2>;
-		};
-
-		/omit-if-no-ref/
-		gmac1m1_miim: gmac1m1-miim {
-			rockchip,pins =
-				/* gmac1_mdcm1 */
-				<4 RK_PB6 3 &pcfg_pull_none>,
-				/* gmac1_mdiom1 */
-				<4 RK_PB7 3 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		gmac1m1_clkinout: gmac1m1-clkinout {
-			rockchip,pins =
-				/* gmac1_mclkinoutm1 */
-				<4 RK_PC1 3 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		gmac1m1_rx_er: gmac1m1-rx-er {
-			rockchip,pins =
-				/* gmac1_rxerm1 */
-				<4 RK_PB2 3 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		gmac1m1_rx_bus2: gmac1m1-rx-bus2 {
-			rockchip,pins =
-				/* gmac1_rxd0m1 */
-				<4 RK_PA7 3 &pcfg_pull_none>,
-				/* gmac1_rxd1m1 */
-				<4 RK_PB0 3 &pcfg_pull_none>,
-				/* gmac1_rxdvcrsm1 */
-				<4 RK_PB1 3 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		gmac1m1_tx_bus2: gmac1m1-tx-bus2 {
-			rockchip,pins =
-				/* gmac1_txd0m1 */
-				<4 RK_PA4 3 &pcfg_pull_none_drv_level_2>,
-				/* gmac1_txd1m1 */
-				<4 RK_PA5 3 &pcfg_pull_none_drv_level_2>,
-				/* gmac1_txenm1 */
-				<4 RK_PA6 3 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		gmac1m1_rgmii_clk: gmac1m1-rgmii-clk {
-			rockchip,pins =
-				/* gmac1_rxclkm1 */
-				<4 RK_PA3 3 &pcfg_pull_none>,
-				/* gmac1_txclkm1 */
-				<4 RK_PA0 3 &pcfg_pull_none_drv_level_1>;
-		};
-
-		/omit-if-no-ref/
-		gmac1m1_rgmii_bus: gmac1m1-rgmii-bus {
-			rockchip,pins =
-				/* gmac1_rxd2m1 */
-				<4 RK_PA1 3 &pcfg_pull_none>,
-				/* gmac1_rxd3m1 */
-				<4 RK_PA2 3 &pcfg_pull_none>,
-				/* gmac1_txd2m1 */
-				<3 RK_PD6 3 &pcfg_pull_none_drv_level_2>,
-				/* gmac1_txd3m1 */
-				<3 RK_PD7 3 &pcfg_pull_none_drv_level_2>;
-		};
-	};
-
-	gpu {
-		/omit-if-no-ref/
-		gpu_pins: gpu-pins {
-			rockchip,pins =
-				/* gpu_avs */
-				<0 RK_PC0 2 &pcfg_pull_none>,
-				/* gpu_pwren */
-				<0 RK_PA6 4 &pcfg_pull_none>;
-		};
-	};
-
-	hdmitx {
-		/omit-if-no-ref/
-		hdmitxm0_cec: hdmitxm0-cec {
-			rockchip,pins =
-				/* hdmitxm0_cec */
-				<4 RK_PD1 1 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		hdmitxm1_cec: hdmitxm1-cec {
-			rockchip,pins =
-				/* hdmitxm1_cec */
-				<0 RK_PC7 1 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		hdmitx_scl: hdmitx-scl {
-			rockchip,pins =
-				/* hdmitx_scl */
-				<4 RK_PC7 1 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		hdmitx_sda: hdmitx-sda {
-			rockchip,pins =
-				/* hdmitx_sda */
-				<4 RK_PD0 1 &pcfg_pull_none>;
-		};
-	};
-
-	i2c0 {
-		/omit-if-no-ref/
-		i2c0_xfer: i2c0-xfer {
-			rockchip,pins =
-				/* i2c0_scl */
-				<0 RK_PB1 1 &pcfg_pull_none_smt>,
-				/* i2c0_sda */
-				<0 RK_PB2 1 &pcfg_pull_none_smt>;
-		};
-	};
-
-	i2c1 {
-		/omit-if-no-ref/
-		i2c1_xfer: i2c1-xfer {
-			rockchip,pins =
-				/* i2c1_scl */
-				<0 RK_PB3 1 &pcfg_pull_none_smt>,
-				/* i2c1_sda */
-				<0 RK_PB4 1 &pcfg_pull_none_smt>;
-		};
-	};
-
-	i2c2 {
-		/omit-if-no-ref/
-		i2c2m0_xfer: i2c2m0-xfer {
-			rockchip,pins =
-				/* i2c2_sclm0 */
-				<0 RK_PB5 1 &pcfg_pull_none_smt>,
-				/* i2c2_sdam0 */
-				<0 RK_PB6 1 &pcfg_pull_none_smt>;
-		};
-
-		/omit-if-no-ref/
-		i2c2m1_xfer: i2c2m1-xfer {
-			rockchip,pins =
-				/* i2c2_sclm1 */
-				<4 RK_PB5 1 &pcfg_pull_none_smt>,
-				/* i2c2_sdam1 */
-				<4 RK_PB4 1 &pcfg_pull_none_smt>;
-		};
-	};
-
-	i2c3 {
-		/omit-if-no-ref/
-		i2c3m0_xfer: i2c3m0-xfer {
-			rockchip,pins =
-				/* i2c3_sclm0 */
-				<1 RK_PA1 1 &pcfg_pull_none_smt>,
-				/* i2c3_sdam0 */
-				<1 RK_PA0 1 &pcfg_pull_none_smt>;
-		};
-
-		/omit-if-no-ref/
-		i2c3m1_xfer: i2c3m1-xfer {
-			rockchip,pins =
-				/* i2c3_sclm1 */
-				<3 RK_PB5 4 &pcfg_pull_none_smt>,
-				/* i2c3_sdam1 */
-				<3 RK_PB6 4 &pcfg_pull_none_smt>;
-		};
-	};
-
-	i2c4 {
-		/omit-if-no-ref/
-		i2c4m0_xfer: i2c4m0-xfer {
-			rockchip,pins =
-				/* i2c4_sclm0 */
-				<4 RK_PB3 1 &pcfg_pull_none_smt>,
-				/* i2c4_sdam0 */
-				<4 RK_PB2 1 &pcfg_pull_none_smt>;
-		};
-
-		/omit-if-no-ref/
-		i2c4m1_xfer: i2c4m1-xfer {
-			rockchip,pins =
-				/* i2c4_sclm1 */
-				<2 RK_PB2 2 &pcfg_pull_none_smt>,
-				/* i2c4_sdam1 */
-				<2 RK_PB1 2 &pcfg_pull_none_smt>;
-		};
-	};
-
-	i2c5 {
-		/omit-if-no-ref/
-		i2c5m0_xfer: i2c5m0-xfer {
-			rockchip,pins =
-				/* i2c5_sclm0 */
-				<3 RK_PB3 4 &pcfg_pull_none_smt>,
-				/* i2c5_sdam0 */
-				<3 RK_PB4 4 &pcfg_pull_none_smt>;
-		};
-
-		/omit-if-no-ref/
-		i2c5m1_xfer: i2c5m1-xfer {
-			rockchip,pins =
-				/* i2c5_sclm1 */
-				<4 RK_PC7 2 &pcfg_pull_none_smt>,
-				/* i2c5_sdam1 */
-				<4 RK_PD0 2 &pcfg_pull_none_smt>;
-		};
-	};
-
-	i2s1 {
-		/omit-if-no-ref/
-		i2s1m0_lrckrx: i2s1m0-lrckrx {
-			rockchip,pins =
-				/* i2s1m0_lrckrx */
-				<1 RK_PA6 1 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s1m0_lrcktx: i2s1m0-lrcktx {
-			rockchip,pins =
-				/* i2s1m0_lrcktx */
-				<1 RK_PA5 1 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s1m0_mclk: i2s1m0-mclk {
-			rockchip,pins =
-				/* i2s1m0_mclk */
-				<1 RK_PA2 1 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s1m0_sclkrx: i2s1m0-sclkrx {
-			rockchip,pins =
-				/* i2s1m0_sclkrx */
-				<1 RK_PA4 1 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s1m0_sclktx: i2s1m0-sclktx {
-			rockchip,pins =
-				/* i2s1m0_sclktx */
-				<1 RK_PA3 1 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s1m0_sdi0: i2s1m0-sdi0 {
-			rockchip,pins =
-				/* i2s1m0_sdi0 */
-				<1 RK_PB3 1 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s1m0_sdi1: i2s1m0-sdi1 {
-			rockchip,pins =
-				/* i2s1m0_sdi1 */
-				<1 RK_PB2 2 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s1m0_sdi2: i2s1m0-sdi2 {
-			rockchip,pins =
-				/* i2s1m0_sdi2 */
-				<1 RK_PB1 2 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s1m0_sdi3: i2s1m0-sdi3 {
-			rockchip,pins =
-				/* i2s1m0_sdi3 */
-				<1 RK_PB0 2 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s1m0_sdo0: i2s1m0-sdo0 {
-			rockchip,pins =
-				/* i2s1m0_sdo0 */
-				<1 RK_PA7 1 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s1m0_sdo1: i2s1m0-sdo1 {
-			rockchip,pins =
-				/* i2s1m0_sdo1 */
-				<1 RK_PB0 1 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s1m0_sdo2: i2s1m0-sdo2 {
-			rockchip,pins =
-				/* i2s1m0_sdo2 */
-				<1 RK_PB1 1 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s1m0_sdo3: i2s1m0-sdo3 {
-			rockchip,pins =
-				/* i2s1m0_sdo3 */
-				<1 RK_PB2 1 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s1m1_lrckrx: i2s1m1-lrckrx {
-			rockchip,pins =
-				/* i2s1m1_lrckrx */
-				<4 RK_PA7 5 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s1m1_lrcktx: i2s1m1-lrcktx {
-			rockchip,pins =
-				/* i2s1m1_lrcktx */
-				<3 RK_PD0 4 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s1m1_mclk: i2s1m1-mclk {
-			rockchip,pins =
-				/* i2s1m1_mclk */
-				<3 RK_PC6 4 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s1m1_sclkrx: i2s1m1-sclkrx {
-			rockchip,pins =
-				/* i2s1m1_sclkrx */
-				<4 RK_PA6 5 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s1m1_sclktx: i2s1m1-sclktx {
-			rockchip,pins =
-				/* i2s1m1_sclktx */
-				<3 RK_PC7 4 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s1m1_sdi0: i2s1m1-sdi0 {
-			rockchip,pins =
-				/* i2s1m1_sdi0 */
-				<3 RK_PD2 4 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s1m1_sdi1: i2s1m1-sdi1 {
-			rockchip,pins =
-				/* i2s1m1_sdi1 */
-				<3 RK_PD3 4 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s1m1_sdi2: i2s1m1-sdi2 {
-			rockchip,pins =
-				/* i2s1m1_sdi2 */
-				<3 RK_PD4 4 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s1m1_sdi3: i2s1m1-sdi3 {
-			rockchip,pins =
-				/* i2s1m1_sdi3 */
-				<3 RK_PD5 4 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s1m1_sdo0: i2s1m1-sdo0 {
-			rockchip,pins =
-				/* i2s1m1_sdo0 */
-				<3 RK_PD1 4 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s1m1_sdo1: i2s1m1-sdo1 {
-			rockchip,pins =
-				/* i2s1m1_sdo1 */
-				<4 RK_PB0 5 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s1m1_sdo2: i2s1m1-sdo2 {
-			rockchip,pins =
-				/* i2s1m1_sdo2 */
-				<4 RK_PB1 4 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s1m1_sdo3: i2s1m1-sdo3 {
-			rockchip,pins =
-				/* i2s1m1_sdo3 */
-				<4 RK_PB5 4 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s1m2_lrckrx: i2s1m2-lrckrx {
-			rockchip,pins =
-				/* i2s1m2_lrckrx */
-				<3 RK_PC5 5 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s1m2_lrcktx: i2s1m2-lrcktx {
-			rockchip,pins =
-				/* i2s1m2_lrcktx */
-				<2 RK_PD2 5 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s1m2_mclk: i2s1m2-mclk {
-			rockchip,pins =
-				/* i2s1m2_mclk */
-				<2 RK_PD0 5 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s1m2_sclkrx: i2s1m2-sclkrx {
-			rockchip,pins =
-				/* i2s1m2_sclkrx */
-				<3 RK_PC3 5 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s1m2_sclktx: i2s1m2-sclktx {
-			rockchip,pins =
-				/* i2s1m2_sclktx */
-				<2 RK_PD1 5 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s1m2_sdi0: i2s1m2-sdi0 {
-			rockchip,pins =
-				/* i2s1m2_sdi0 */
-				<2 RK_PD3 5 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s1m2_sdi1: i2s1m2-sdi1 {
-			rockchip,pins =
-				/* i2s1m2_sdi1 */
-				<2 RK_PD4 5 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s1m2_sdi2: i2s1m2-sdi2 {
-			rockchip,pins =
-				/* i2s1m2_sdi2 */
-				<2 RK_PD5 5 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s1m2_sdi3: i2s1m2-sdi3 {
-			rockchip,pins =
-				/* i2s1m2_sdi3 */
-				<2 RK_PD6 5 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s1m2_sdo0: i2s1m2-sdo0 {
-			rockchip,pins =
-				/* i2s1m2_sdo0 */
-				<2 RK_PD7 5 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s1m2_sdo1: i2s1m2-sdo1 {
-			rockchip,pins =
-				/* i2s1m2_sdo1 */
-				<3 RK_PA0 5 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s1m2_sdo2: i2s1m2-sdo2 {
-			rockchip,pins =
-				/* i2s1m2_sdo2 */
-				<3 RK_PC1 5 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s1m2_sdo3: i2s1m2-sdo3 {
-			rockchip,pins =
-				/* i2s1m2_sdo3 */
-				<3 RK_PC2 5 &pcfg_pull_none>;
-		};
-	};
-
-	i2s2 {
-		/omit-if-no-ref/
-		i2s2m0_lrckrx: i2s2m0-lrckrx {
-			rockchip,pins =
-				/* i2s2m0_lrckrx */
-				<2 RK_PC0 1 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s2m0_lrcktx: i2s2m0-lrcktx {
-			rockchip,pins =
-				/* i2s2m0_lrcktx */
-				<2 RK_PC3 1 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s2m0_mclk: i2s2m0-mclk {
-			rockchip,pins =
-				/* i2s2m0_mclk */
-				<2 RK_PC1 1 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s2m0_sclkrx: i2s2m0-sclkrx {
-			rockchip,pins =
-				/* i2s2m0_sclkrx */
-				<2 RK_PB7 1 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s2m0_sclktx: i2s2m0-sclktx {
-			rockchip,pins =
-				/* i2s2m0_sclktx */
-				<2 RK_PC2 1 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s2m0_sdi: i2s2m0-sdi {
-			rockchip,pins =
-				/* i2s2m0_sdi */
-				<2 RK_PC5 1 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s2m0_sdo: i2s2m0-sdo {
-			rockchip,pins =
-				/* i2s2m0_sdo */
-				<2 RK_PC4 1 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s2m1_lrckrx: i2s2m1-lrckrx {
-			rockchip,pins =
-				/* i2s2m1_lrckrx */
-				<4 RK_PA5 5 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s2m1_lrcktx: i2s2m1-lrcktx {
-			rockchip,pins =
-				/* i2s2m1_lrcktx */
-				<4 RK_PA4 5 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s2m1_mclk: i2s2m1-mclk {
-			rockchip,pins =
-				/* i2s2m1_mclk */
-				<4 RK_PB6 5 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s2m1_sclkrx: i2s2m1-sclkrx {
-			rockchip,pins =
-				/* i2s2m1_sclkrx */
-				<4 RK_PC1 5 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s2m1_sclktx: i2s2m1-sclktx {
-			rockchip,pins =
-				/* i2s2m1_sclktx */
-				<4 RK_PB7 4 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s2m1_sdi: i2s2m1-sdi {
-			rockchip,pins =
-				/* i2s2m1_sdi */
-				<4 RK_PB2 5 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s2m1_sdo: i2s2m1-sdo {
-			rockchip,pins =
-				/* i2s2m1_sdo */
-				<4 RK_PB3 5 &pcfg_pull_none>;
-		};
-	};
-
-	i2s3 {
-		/omit-if-no-ref/
-		i2s3m0_lrck: i2s3m0-lrck {
-			rockchip,pins =
-				/* i2s3m0_lrck */
-				<3 RK_PA4 4 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s3m0_mclk: i2s3m0-mclk {
-			rockchip,pins =
-				/* i2s3m0_mclk */
-				<3 RK_PA2 4 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s3m0_sclk: i2s3m0-sclk {
-			rockchip,pins =
-				/* i2s3m0_sclk */
-				<3 RK_PA3 4 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s3m0_sdi: i2s3m0-sdi {
-			rockchip,pins =
-				/* i2s3m0_sdi */
-				<3 RK_PA6 4 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s3m0_sdo: i2s3m0-sdo {
-			rockchip,pins =
-				/* i2s3m0_sdo */
-				<3 RK_PA5 4 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s3m1_lrck: i2s3m1-lrck {
-			rockchip,pins =
-				/* i2s3m1_lrck */
-				<4 RK_PC4 5 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s3m1_mclk: i2s3m1-mclk {
-			rockchip,pins =
-				/* i2s3m1_mclk */
-				<4 RK_PC2 5 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s3m1_sclk: i2s3m1-sclk {
-			rockchip,pins =
-				/* i2s3m1_sclk */
-				<4 RK_PC3 5 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s3m1_sdi: i2s3m1-sdi {
-			rockchip,pins =
-				/* i2s3m1_sdi */
-				<4 RK_PC6 5 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		i2s3m1_sdo: i2s3m1-sdo {
-			rockchip,pins =
-				/* i2s3m1_sdo */
-				<4 RK_PC5 5 &pcfg_pull_none>;
-		};
-	};
-
-	isp {
-		/omit-if-no-ref/
-		isp_pins: isp-pins {
-			rockchip,pins =
-				/* isp_flashtrigin */
-				<4 RK_PB4 4 &pcfg_pull_none>,
-				/* isp_flashtrigout */
-				<4 RK_PA6 1 &pcfg_pull_none>,
-				/* isp_prelighttrig */
-				<4 RK_PB1 1 &pcfg_pull_none>;
-		};
-	};
-
-	jtag {
-		/omit-if-no-ref/
-		jtag_pins: jtag-pins {
-			rockchip,pins =
-				/* jtag_tck */
-				<1 RK_PD7 2 &pcfg_pull_none>,
-				/* jtag_tms */
-				<2 RK_PA0 2 &pcfg_pull_none>;
-		};
-	};
-
-	lcdc {
-		/omit-if-no-ref/
-		lcdc_ctl: lcdc-ctl {
-			rockchip,pins =
-				/* lcdc_clk */
-				<3 RK_PA0 1 &pcfg_pull_none>,
-				/* lcdc_d0 */
-				<2 RK_PD0 1 &pcfg_pull_none>,
-				/* lcdc_d1 */
-				<2 RK_PD1 1 &pcfg_pull_none>,
-				/* lcdc_d2 */
-				<2 RK_PD2 1 &pcfg_pull_none>,
-				/* lcdc_d3 */
-				<2 RK_PD3 1 &pcfg_pull_none>,
-				/* lcdc_d4 */
-				<2 RK_PD4 1 &pcfg_pull_none>,
-				/* lcdc_d5 */
-				<2 RK_PD5 1 &pcfg_pull_none>,
-				/* lcdc_d6 */
-				<2 RK_PD6 1 &pcfg_pull_none>,
-				/* lcdc_d7 */
-				<2 RK_PD7 1 &pcfg_pull_none>,
-				/* lcdc_d8 */
-				<3 RK_PA1 1 &pcfg_pull_none>,
-				/* lcdc_d9 */
-				<3 RK_PA2 1 &pcfg_pull_none>,
-				/* lcdc_d10 */
-				<3 RK_PA3 1 &pcfg_pull_none>,
-				/* lcdc_d11 */
-				<3 RK_PA4 1 &pcfg_pull_none>,
-				/* lcdc_d12 */
-				<3 RK_PA5 1 &pcfg_pull_none>,
-				/* lcdc_d13 */
-				<3 RK_PA6 1 &pcfg_pull_none>,
-				/* lcdc_d14 */
-				<3 RK_PA7 1 &pcfg_pull_none>,
-				/* lcdc_d15 */
-				<3 RK_PB0 1 &pcfg_pull_none>,
-				/* lcdc_d16 */
-				<3 RK_PB1 1 &pcfg_pull_none>,
-				/* lcdc_d17 */
-				<3 RK_PB2 1 &pcfg_pull_none>,
-				/* lcdc_d18 */
-				<3 RK_PB3 1 &pcfg_pull_none>,
-				/* lcdc_d19 */
-				<3 RK_PB4 1 &pcfg_pull_none>,
-				/* lcdc_d20 */
-				<3 RK_PB5 1 &pcfg_pull_none>,
-				/* lcdc_d21 */
-				<3 RK_PB6 1 &pcfg_pull_none>,
-				/* lcdc_d22 */
-				<3 RK_PB7 1 &pcfg_pull_none>,
-				/* lcdc_d23 */
-				<3 RK_PC0 1 &pcfg_pull_none>,
-				/* lcdc_den */
-				<3 RK_PC3 1 &pcfg_pull_none>,
-				/* lcdc_hsync */
-				<3 RK_PC1 1 &pcfg_pull_none>,
-				/* lcdc_vsync */
-				<3 RK_PC2 1 &pcfg_pull_none>;
-		};
-	};
-
-	mcu {
-		/omit-if-no-ref/
-		mcu_pins: mcu-pins {
-			rockchip,pins =
-				/* mcu_jtagtck */
-				<0 RK_PB4 4 &pcfg_pull_none>,
-				/* mcu_jtagtdi */
-				<0 RK_PC1 4 &pcfg_pull_none>,
-				/* mcu_jtagtdo */
-				<0 RK_PB3 4 &pcfg_pull_none>,
-				/* mcu_jtagtms */
-				<0 RK_PC2 4 &pcfg_pull_none>,
-				/* mcu_jtagtrstn */
-				<0 RK_PC3 4 &pcfg_pull_none>;
-		};
-	};
-
-	npu {
-		/omit-if-no-ref/
-		npu_pins: npu-pins {
-			rockchip,pins =
-				/* npu_avs */
-				<0 RK_PC1 2 &pcfg_pull_none>;
-		};
-	};
-
-	pcie20 {
-		/omit-if-no-ref/
-		pcie20m0_pins: pcie20m0-pins {
-			rockchip,pins =
-				/* pcie20_clkreqnm0 */
-				<0 RK_PA5 3 &pcfg_pull_none>,
-				/* pcie20_perstnm0 */
-				<0 RK_PB6 3 &pcfg_pull_none>,
-				/* pcie20_wakenm0 */
-				<0 RK_PB5 3 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		pcie20m1_pins: pcie20m1-pins {
-			rockchip,pins =
-				/* pcie20_clkreqnm1 */
-				<2 RK_PD0 4 &pcfg_pull_none>,
-				/* pcie20_perstnm1 */
-				<3 RK_PC1 4 &pcfg_pull_none>,
-				/* pcie20_wakenm1 */
-				<2 RK_PD1 4 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		pcie20m2_pins: pcie20m2-pins {
-			rockchip,pins =
-				/* pcie20_clkreqnm2 */
-				<1 RK_PB0 4 &pcfg_pull_none>,
-				/* pcie20_perstnm2 */
-				<1 RK_PB2 4 &pcfg_pull_none>,
-				/* pcie20_wakenm2 */
-				<1 RK_PB1 4 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		pcie20_buttonrstn: pcie20-buttonrstn {
-			rockchip,pins =
-				/* pcie20_buttonrstn */
-				<0 RK_PB4 3 &pcfg_pull_none>;
-		};
-	};
-
-	pcie30x1 {
-		/omit-if-no-ref/
-		pcie30x1m0_pins: pcie30x1m0-pins {
-			rockchip,pins =
-				/* pcie30x1_clkreqnm0 */
-				<0 RK_PA4 3 &pcfg_pull_none>,
-				/* pcie30x1_perstnm0 */
-				<0 RK_PC3 3 &pcfg_pull_none>,
-				/* pcie30x1_wakenm0 */
-				<0 RK_PC2 3 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		pcie30x1m1_pins: pcie30x1m1-pins {
-			rockchip,pins =
-				/* pcie30x1_clkreqnm1 */
-				<2 RK_PD2 4 &pcfg_pull_none>,
-				/* pcie30x1_perstnm1 */
-				<3 RK_PA1 4 &pcfg_pull_none>,
-				/* pcie30x1_wakenm1 */
-				<2 RK_PD3 4 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		pcie30x1m2_pins: pcie30x1m2-pins {
-			rockchip,pins =
-				/* pcie30x1_clkreqnm2 */
-				<1 RK_PA5 4 &pcfg_pull_none>,
-				/* pcie30x1_perstnm2 */
-				<1 RK_PA2 4 &pcfg_pull_none>,
-				/* pcie30x1_wakenm2 */
-				<1 RK_PA3 4 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		pcie30x1_buttonrstn: pcie30x1-buttonrstn {
-			rockchip,pins =
-				/* pcie30x1_buttonrstn */
-				<0 RK_PB3 3 &pcfg_pull_none>;
-		};
-	};
-
-	pcie30x2 {
-		/omit-if-no-ref/
-		pcie30x2m0_pins: pcie30x2m0-pins {
-			rockchip,pins =
-				/* pcie30x2_clkreqnm0 */
-				<0 RK_PA6 2 &pcfg_pull_none>,
-				/* pcie30x2_perstnm0 */
-				<0 RK_PC6 3 &pcfg_pull_none>,
-				/* pcie30x2_wakenm0 */
-				<0 RK_PC5 3 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		pcie30x2m1_pins: pcie30x2m1-pins {
-			rockchip,pins =
-				/* pcie30x2_clkreqnm1 */
-				<2 RK_PD4 4 &pcfg_pull_none>,
-				/* pcie30x2_perstnm1 */
-				<2 RK_PD6 4 &pcfg_pull_none>,
-				/* pcie30x2_wakenm1 */
-				<2 RK_PD5 4 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		pcie30x2m2_pins: pcie30x2m2-pins {
-			rockchip,pins =
-				/* pcie30x2_clkreqnm2 */
-				<4 RK_PC2 4 &pcfg_pull_none>,
-				/* pcie30x2_perstnm2 */
-				<4 RK_PC4 4 &pcfg_pull_none>,
-				/* pcie30x2_wakenm2 */
-				<4 RK_PC3 4 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		pcie30x2_buttonrstn: pcie30x2-buttonrstn {
-			rockchip,pins =
-				/* pcie30x2_buttonrstn */
-				<0 RK_PB0 3 &pcfg_pull_none>;
-		};
-	};
-
-	pdm {
-		/omit-if-no-ref/
-		pdmm0_clk: pdmm0-clk {
-			rockchip,pins =
-				/* pdm_clk0m0 */
-				<1 RK_PA6 3 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		pdmm0_clk1: pdmm0-clk1 {
-			rockchip,pins =
-				/* pdmm0_clk1 */
-				<1 RK_PA4 3 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		pdmm0_sdi0: pdmm0-sdi0 {
-			rockchip,pins =
-				/* pdmm0_sdi0 */
-				<1 RK_PB3 2 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		pdmm0_sdi1: pdmm0-sdi1 {
-			rockchip,pins =
-				/* pdmm0_sdi1 */
-				<1 RK_PB2 3 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		pdmm0_sdi2: pdmm0-sdi2 {
-			rockchip,pins =
-				/* pdmm0_sdi2 */
-				<1 RK_PB1 3 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		pdmm0_sdi3: pdmm0-sdi3 {
-			rockchip,pins =
-				/* pdmm0_sdi3 */
-				<1 RK_PB0 3 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		pdmm1_clk: pdmm1-clk {
-			rockchip,pins =
-				/* pdm_clk0m1 */
-				<3 RK_PD6 5 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		pdmm1_clk1: pdmm1-clk1 {
-			rockchip,pins =
-				/* pdmm1_clk1 */
-				<4 RK_PA0 4 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		pdmm1_sdi0: pdmm1-sdi0 {
-			rockchip,pins =
-				/* pdmm1_sdi0 */
-				<3 RK_PD7 5 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		pdmm1_sdi1: pdmm1-sdi1 {
-			rockchip,pins =
-				/* pdmm1_sdi1 */
-				<4 RK_PA1 4 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		pdmm1_sdi2: pdmm1-sdi2 {
-			rockchip,pins =
-				/* pdmm1_sdi2 */
-				<4 RK_PA2 5 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		pdmm1_sdi3: pdmm1-sdi3 {
-			rockchip,pins =
-				/* pdmm1_sdi3 */
-				<4 RK_PA3 5 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		pdmm2_clk1: pdmm2-clk1 {
-			rockchip,pins =
-				/* pdmm2_clk1 */
-				<3 RK_PC4 5 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		pdmm2_sdi0: pdmm2-sdi0 {
-			rockchip,pins =
-				/* pdmm2_sdi0 */
-				<3 RK_PB3 5 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		pdmm2_sdi1: pdmm2-sdi1 {
-			rockchip,pins =
-				/* pdmm2_sdi1 */
-				<3 RK_PB4 5 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		pdmm2_sdi2: pdmm2-sdi2 {
-			rockchip,pins =
-				/* pdmm2_sdi2 */
-				<3 RK_PB7 5 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		pdmm2_sdi3: pdmm2-sdi3 {
-			rockchip,pins =
-				/* pdmm2_sdi3 */
-				<3 RK_PC0 5 &pcfg_pull_none>;
-		};
-	};
-
-	pmic {
-		/omit-if-no-ref/
-		pmic_pins: pmic-pins {
-			rockchip,pins =
-				/* pmic_sleep */
-				<0 RK_PA2 1 &pcfg_pull_none>;
-		};
-	};
-
-	pmu {
-		/omit-if-no-ref/
-		pmu_pins: pmu-pins {
-			rockchip,pins =
-				/* pmu_debug0 */
-				<0 RK_PA5 4 &pcfg_pull_none>,
-				/* pmu_debug1 */
-				<0 RK_PA6 3 &pcfg_pull_none>,
-				/* pmu_debug2 */
-				<0 RK_PC4 4 &pcfg_pull_none>,
-				/* pmu_debug3 */
-				<0 RK_PC5 4 &pcfg_pull_none>,
-				/* pmu_debug4 */
-				<0 RK_PC6 4 &pcfg_pull_none>,
-				/* pmu_debug5 */
-				<0 RK_PC7 4 &pcfg_pull_none>;
-		};
-	};
-
-	pwm0 {
-		/omit-if-no-ref/
-		pwm0m0_pins: pwm0m0-pins {
-			rockchip,pins =
-				/* pwm0_m0 */
-				<0 RK_PB7 1 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		pwm0m1_pins: pwm0m1-pins {
-			rockchip,pins =
-				/* pwm0_m1 */
-				<0 RK_PC7 2 &pcfg_pull_none>;
-		};
-	};
-
-	pwm1 {
-		/omit-if-no-ref/
-		pwm1m0_pins: pwm1m0-pins {
-			rockchip,pins =
-				/* pwm1_m0 */
-				<0 RK_PC0 1 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		pwm1m1_pins: pwm1m1-pins {
-			rockchip,pins =
-				/* pwm1_m1 */
-				<0 RK_PB5 4 &pcfg_pull_none>;
-		};
-	};
-
-	pwm2 {
-		/omit-if-no-ref/
-		pwm2m0_pins: pwm2m0-pins {
-			rockchip,pins =
-				/* pwm2_m0 */
-				<0 RK_PC1 1 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		pwm2m1_pins: pwm2m1-pins {
-			rockchip,pins =
-				/* pwm2_m1 */
-				<0 RK_PB6 4 &pcfg_pull_none>;
-		};
-	};
-
-	pwm3 {
-		/omit-if-no-ref/
-		pwm3_pins: pwm3-pins {
-			rockchip,pins =
-				/* pwm3_ir */
-				<0 RK_PC2 1 &pcfg_pull_none>;
-		};
-	};
-
-	pwm4 {
-		/omit-if-no-ref/
-		pwm4_pins: pwm4-pins {
-			rockchip,pins =
-				/* pwm4 */
-				<0 RK_PC3 1 &pcfg_pull_none>;
-		};
-	};
-
-	pwm5 {
-		/omit-if-no-ref/
-		pwm5_pins: pwm5-pins {
-			rockchip,pins =
-				/* pwm5 */
-				<0 RK_PC4 1 &pcfg_pull_none>;
-		};
-	};
-
-	pwm6 {
-		/omit-if-no-ref/
-		pwm6_pins: pwm6-pins {
-			rockchip,pins =
-				/* pwm6 */
-				<0 RK_PC5 1 &pcfg_pull_none>;
-		};
-	};
-
-	pwm7 {
-		/omit-if-no-ref/
-		pwm7_pins: pwm7-pins {
-			rockchip,pins =
-				/* pwm7_ir */
-				<0 RK_PC6 1 &pcfg_pull_none>;
-		};
-	};
-
-	pwm8 {
-		/omit-if-no-ref/
-		pwm8m0_pins: pwm8m0-pins {
-			rockchip,pins =
-				/* pwm8_m0 */
-				<3 RK_PB1 5 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		pwm8m1_pins: pwm8m1-pins {
-			rockchip,pins =
-				/* pwm8_m1 */
-				<1 RK_PD5 4 &pcfg_pull_none>;
-		};
-	};
-
-	pwm9 {
-		/omit-if-no-ref/
-		pwm9m0_pins: pwm9m0-pins {
-			rockchip,pins =
-				/* pwm9_m0 */
-				<3 RK_PB2 5 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		pwm9m1_pins: pwm9m1-pins {
-			rockchip,pins =
-				/* pwm9_m1 */
-				<1 RK_PD6 4 &pcfg_pull_none>;
-		};
-	};
-
-	pwm10 {
-		/omit-if-no-ref/
-		pwm10m0_pins: pwm10m0-pins {
-			rockchip,pins =
-				/* pwm10_m0 */
-				<3 RK_PB5 5 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		pwm10m1_pins: pwm10m1-pins {
-			rockchip,pins =
-				/* pwm10_m1 */
-				<2 RK_PA1 2 &pcfg_pull_none>;
-		};
-	};
-
-	pwm11 {
-		/omit-if-no-ref/
-		pwm11m0_pins: pwm11m0-pins {
-			rockchip,pins =
-				/* pwm11_irm0 */
-				<3 RK_PB6 5 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		pwm11m1_pins: pwm11m1-pins {
-			rockchip,pins =
-				/* pwm11_irm1 */
-				<4 RK_PC0 3 &pcfg_pull_none>;
-		};
-	};
-
-	pwm12 {
-		/omit-if-no-ref/
-		pwm12m0_pins: pwm12m0-pins {
-			rockchip,pins =
-				/* pwm12_m0 */
-				<3 RK_PB7 2 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		pwm12m1_pins: pwm12m1-pins {
-			rockchip,pins =
-				/* pwm12_m1 */
-				<4 RK_PC5 1 &pcfg_pull_none>;
-		};
-	};
-
-	pwm13 {
-		/omit-if-no-ref/
-		pwm13m0_pins: pwm13m0-pins {
-			rockchip,pins =
-				/* pwm13_m0 */
-				<3 RK_PC0 2 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		pwm13m1_pins: pwm13m1-pins {
-			rockchip,pins =
-				/* pwm13_m1 */
-				<4 RK_PC6 1 &pcfg_pull_none>;
-		};
-	};
-
-	pwm14 {
-		/omit-if-no-ref/
-		pwm14m0_pins: pwm14m0-pins {
-			rockchip,pins =
-				/* pwm14_m0 */
-				<3 RK_PC4 1 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		pwm14m1_pins: pwm14m1-pins {
-			rockchip,pins =
-				/* pwm14_m1 */
-				<4 RK_PC2 1 &pcfg_pull_none>;
-		};
-	};
-
-	pwm15 {
-		/omit-if-no-ref/
-		pwm15m0_pins: pwm15m0-pins {
-			rockchip,pins =
-				/* pwm15_irm0 */
-				<3 RK_PC5 1 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		pwm15m1_pins: pwm15m1-pins {
-			rockchip,pins =
-				/* pwm15_irm1 */
-				<4 RK_PC3 1 &pcfg_pull_none>;
-		};
-	};
-
-	refclk {
-		/omit-if-no-ref/
-		refclk_pins: refclk-pins {
-			rockchip,pins =
-				/* refclk_ou */
-				<0 RK_PA0 1 &pcfg_pull_none>;
-		};
-	};
-
-	sata {
-		/omit-if-no-ref/
-		sata_pins: sata-pins {
-			rockchip,pins =
-				/* sata_cpdet */
-				<0 RK_PA4 2 &pcfg_pull_none>,
-				/* sata_cppod */
-				<0 RK_PA6 1 &pcfg_pull_none>,
-				/* sata_mpswitch */
-				<0 RK_PA5 2 &pcfg_pull_none>;
-		};
-	};
-
-	sata0 {
-		/omit-if-no-ref/
-		sata0_pins: sata0-pins {
-			rockchip,pins =
-				/* sata0_actled */
-				<4 RK_PC6 3 &pcfg_pull_none>;
-		};
-	};
-
-	sata1 {
-		/omit-if-no-ref/
-		sata1_pins: sata1-pins {
-			rockchip,pins =
-				/* sata1_actled */
-				<4 RK_PC5 3 &pcfg_pull_none>;
-		};
-	};
-
-	sata2 {
-		/omit-if-no-ref/
-		sata2_pins: sata2-pins {
-			rockchip,pins =
-				/* sata2_actled */
-				<4 RK_PC4 3 &pcfg_pull_none>;
-		};
-	};
-
-	scr {
-		/omit-if-no-ref/
-		scr_pins: scr-pins {
-			rockchip,pins =
-				/* scr_clk */
-				<1 RK_PA2 3 &pcfg_pull_none>,
-				/* scr_det */
-				<1 RK_PA7 3 &pcfg_pull_up>,
-				/* scr_io */
-				<1 RK_PA3 3 &pcfg_pull_up>,
-				/* scr_rst */
-				<1 RK_PA5 3 &pcfg_pull_none>;
-		};
-	};
-
-	sdmmc0 {
-		/omit-if-no-ref/
-		sdmmc0_bus4: sdmmc0-bus4 {
-			rockchip,pins =
-				/* sdmmc0_d0 */
-				<1 RK_PD5 1 &pcfg_pull_up_drv_level_2>,
-				/* sdmmc0_d1 */
-				<1 RK_PD6 1 &pcfg_pull_up_drv_level_2>,
-				/* sdmmc0_d2 */
-				<1 RK_PD7 1 &pcfg_pull_up_drv_level_2>,
-				/* sdmmc0_d3 */
-				<2 RK_PA0 1 &pcfg_pull_up_drv_level_2>;
-		};
-
-		/omit-if-no-ref/
-		sdmmc0_clk: sdmmc0-clk {
-			rockchip,pins =
-				/* sdmmc0_clk */
-				<2 RK_PA2 1 &pcfg_pull_up_drv_level_2>;
-		};
-
-		/omit-if-no-ref/
-		sdmmc0_cmd: sdmmc0-cmd {
-			rockchip,pins =
-				/* sdmmc0_cmd */
-				<2 RK_PA1 1 &pcfg_pull_up_drv_level_2>;
-		};
-
-		/omit-if-no-ref/
-		sdmmc0_det: sdmmc0-det {
-			rockchip,pins =
-				/* sdmmc0_det */
-				<0 RK_PA4 1 &pcfg_pull_up>;
-		};
-
-		/omit-if-no-ref/
-		sdmmc0_pwren: sdmmc0-pwren {
-			rockchip,pins =
-				/* sdmmc0_pwren */
-				<0 RK_PA5 1 &pcfg_pull_none>;
-		};
-	};
-
-	sdmmc1 {
-		/omit-if-no-ref/
-		sdmmc1_bus4: sdmmc1-bus4 {
-			rockchip,pins =
-				/* sdmmc1_d0 */
-				<2 RK_PA3 1 &pcfg_pull_up_drv_level_2>,
-				/* sdmmc1_d1 */
-				<2 RK_PA4 1 &pcfg_pull_up_drv_level_2>,
-				/* sdmmc1_d2 */
-				<2 RK_PA5 1 &pcfg_pull_up_drv_level_2>,
-				/* sdmmc1_d3 */
-				<2 RK_PA6 1 &pcfg_pull_up_drv_level_2>;
-		};
-
-		/omit-if-no-ref/
-		sdmmc1_clk: sdmmc1-clk {
-			rockchip,pins =
-				/* sdmmc1_clk */
-				<2 RK_PB0 1 &pcfg_pull_up_drv_level_2>;
-		};
-
-		/omit-if-no-ref/
-		sdmmc1_cmd: sdmmc1-cmd {
-			rockchip,pins =
-				/* sdmmc1_cmd */
-				<2 RK_PA7 1 &pcfg_pull_up_drv_level_2>;
-		};
-
-		/omit-if-no-ref/
-		sdmmc1_det: sdmmc1-det {
-			rockchip,pins =
-				/* sdmmc1_det */
-				<2 RK_PB2 1 &pcfg_pull_up>;
-		};
-
-		/omit-if-no-ref/
-		sdmmc1_pwren: sdmmc1-pwren {
-			rockchip,pins =
-				/* sdmmc1_pwren */
-				<2 RK_PB1 1 &pcfg_pull_none>;
-		};
-	};
-
-	sdmmc2 {
-		/omit-if-no-ref/
-		sdmmc2m0_bus4: sdmmc2m0-bus4 {
-			rockchip,pins =
-				/* sdmmc2_d0m0 */
-				<3 RK_PC6 3 &pcfg_pull_up_drv_level_2>,
-				/* sdmmc2_d1m0 */
-				<3 RK_PC7 3 &pcfg_pull_up_drv_level_2>,
-				/* sdmmc2_d2m0 */
-				<3 RK_PD0 3 &pcfg_pull_up_drv_level_2>,
-				/* sdmmc2_d3m0 */
-				<3 RK_PD1 3 &pcfg_pull_up_drv_level_2>;
-		};
-
-		/omit-if-no-ref/
-		sdmmc2m0_clk: sdmmc2m0-clk {
-			rockchip,pins =
-				/* sdmmc2_clkm0 */
-				<3 RK_PD3 3 &pcfg_pull_up_drv_level_2>;
-		};
-
-		/omit-if-no-ref/
-		sdmmc2m0_cmd: sdmmc2m0-cmd {
-			rockchip,pins =
-				/* sdmmc2_cmdm0 */
-				<3 RK_PD2 3 &pcfg_pull_up_drv_level_2>;
-		};
-
-		/omit-if-no-ref/
-		sdmmc2m0_det: sdmmc2m0-det {
-			rockchip,pins =
-				/* sdmmc2_detm0 */
-				<3 RK_PD4 3 &pcfg_pull_up>;
-		};
-
-		/omit-if-no-ref/
-		sdmmc2m0_pwren: sdmmc2m0-pwren {
-			rockchip,pins =
-				/* sdmmc2m0_pwren */
-				<3 RK_PD5 3 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		sdmmc2m1_bus4: sdmmc2m1-bus4 {
-			rockchip,pins =
-				/* sdmmc2_d0m1 */
-				<3 RK_PA1 5 &pcfg_pull_up_drv_level_2>,
-				/* sdmmc2_d1m1 */
-				<3 RK_PA2 5 &pcfg_pull_up_drv_level_2>,
-				/* sdmmc2_d2m1 */
-				<3 RK_PA3 5 &pcfg_pull_up_drv_level_2>,
-				/* sdmmc2_d3m1 */
-				<3 RK_PA4 5 &pcfg_pull_up_drv_level_2>;
-		};
-
-		/omit-if-no-ref/
-		sdmmc2m1_clk: sdmmc2m1-clk {
-			rockchip,pins =
-				/* sdmmc2_clkm1 */
-				<3 RK_PA6 5 &pcfg_pull_up_drv_level_2>;
-		};
-
-		/omit-if-no-ref/
-		sdmmc2m1_cmd: sdmmc2m1-cmd {
-			rockchip,pins =
-				/* sdmmc2_cmdm1 */
-				<3 RK_PA5 5 &pcfg_pull_up_drv_level_2>;
-		};
-
-		/omit-if-no-ref/
-		sdmmc2m1_det: sdmmc2m1-det {
-			rockchip,pins =
-				/* sdmmc2_detm1 */
-				<3 RK_PA7 4 &pcfg_pull_up>;
-		};
-
-		/omit-if-no-ref/
-		sdmmc2m1_pwren: sdmmc2m1-pwren {
-			rockchip,pins =
-				/* sdmmc2m1_pwren */
-				<3 RK_PB0 4 &pcfg_pull_none>;
-		};
-	};
-
-	spdif {
-		/omit-if-no-ref/
-		spdifm0_tx: spdifm0-tx {
-			rockchip,pins =
-				/* spdifm0_tx */
-				<1 RK_PA4 4 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		spdifm1_tx: spdifm1-tx {
-			rockchip,pins =
-				/* spdifm1_tx */
-				<3 RK_PC5 2 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		spdifm2_tx: spdifm2-tx {
-			rockchip,pins =
-				/* spdifm2_tx */
-				<4 RK_PC4 2 &pcfg_pull_none>;
-		};
-	};
-
-	spi0 {
-		/omit-if-no-ref/
-		spi0m0_pins: spi0m0-pins {
-			rockchip,pins =
-				/* spi0_clkm0 */
-				<0 RK_PB5 2 &pcfg_pull_none>,
-				/* spi0_misom0 */
-				<0 RK_PC5 2 &pcfg_pull_none>,
-				/* spi0_mosim0 */
-				<0 RK_PB6 2 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		spi0m0_cs0: spi0m0-cs0 {
-			rockchip,pins =
-				/* spi0_cs0m0 */
-				<0 RK_PC6 2 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		spi0m0_cs1: spi0m0-cs1 {
-			rockchip,pins =
-				/* spi0_cs1m0 */
-				<0 RK_PC4 2 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		spi0m1_pins: spi0m1-pins {
-			rockchip,pins =
-				/* spi0_clkm1 */
-				<2 RK_PD3 3 &pcfg_pull_none>,
-				/* spi0_misom1 */
-				<2 RK_PD0 3 &pcfg_pull_none>,
-				/* spi0_mosim1 */
-				<2 RK_PD1 3 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		spi0m1_cs0: spi0m1-cs0 {
-			rockchip,pins =
-				/* spi0_cs0m1 */
-				<2 RK_PD2 3 &pcfg_pull_none>;
-		};
-	};
-
-	spi1 {
-		/omit-if-no-ref/
-		spi1m0_pins: spi1m0-pins {
-			rockchip,pins =
-				/* spi1_clkm0 */
-				<2 RK_PB5 3 &pcfg_pull_none>,
-				/* spi1_misom0 */
-				<2 RK_PB6 3 &pcfg_pull_none>,
-				/* spi1_mosim0 */
-				<2 RK_PB7 4 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		spi1m0_cs0: spi1m0-cs0 {
-			rockchip,pins =
-				/* spi1_cs0m0 */
-				<2 RK_PC0 4 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		spi1m0_cs1: spi1m0-cs1 {
-			rockchip,pins =
-				/* spi1_cs1m0 */
-				<2 RK_PC6 3 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		spi1m1_pins: spi1m1-pins {
-			rockchip,pins =
-				/* spi1_clkm1 */
-				<3 RK_PC3 3 &pcfg_pull_none>,
-				/* spi1_misom1 */
-				<3 RK_PC2 3 &pcfg_pull_none>,
-				/* spi1_mosim1 */
-				<3 RK_PC1 3 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		spi1m1_cs0: spi1m1-cs0 {
-			rockchip,pins =
-				/* spi1_cs0m1 */
-				<3 RK_PA1 3 &pcfg_pull_none>;
-		};
-	};
-
-	spi2 {
-		/omit-if-no-ref/
-		spi2m0_pins: spi2m0-pins {
-			rockchip,pins =
-				/* spi2_clkm0 */
-				<2 RK_PC1 4 &pcfg_pull_none>,
-				/* spi2_misom0 */
-				<2 RK_PC2 4 &pcfg_pull_none>,
-				/* spi2_mosim0 */
-				<2 RK_PC3 4 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		spi2m0_cs0: spi2m0-cs0 {
-			rockchip,pins =
-				/* spi2_cs0m0 */
-				<2 RK_PC4 4 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		spi2m0_cs1: spi2m0-cs1 {
-			rockchip,pins =
-				/* spi2_cs1m0 */
-				<2 RK_PC5 4 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		spi2m1_pins: spi2m1-pins {
-			rockchip,pins =
-				/* spi2_clkm1 */
-				<3 RK_PA0 3 &pcfg_pull_none>,
-				/* spi2_misom1 */
-				<2 RK_PD7 3 &pcfg_pull_none>,
-				/* spi2_mosim1 */
-				<2 RK_PD6 3 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		spi2m1_cs0: spi2m1-cs0 {
-			rockchip,pins =
-				/* spi2_cs0m1 */
-				<2 RK_PD5 3 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		spi2m1_cs1: spi2m1-cs1 {
-			rockchip,pins =
-				/* spi2_cs1m1 */
-				<2 RK_PD4 3 &pcfg_pull_none>;
-		};
-	};
-
-	spi3 {
-		/omit-if-no-ref/
-		spi3m0_pins: spi3m0-pins {
-			rockchip,pins =
-				/* spi3_clkm0 */
-				<4 RK_PB3 4 &pcfg_pull_none>,
-				/* spi3_misom0 */
-				<4 RK_PB0 4 &pcfg_pull_none>,
-				/* spi3_mosim0 */
-				<4 RK_PB2 4 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		spi3m0_cs0: spi3m0-cs0 {
-			rockchip,pins =
-				/* spi3_cs0m0 */
-				<4 RK_PA6 4 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		spi3m0_cs1: spi3m0-cs1 {
-			rockchip,pins =
-				/* spi3_cs1m0 */
-				<4 RK_PA7 4 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		spi3m1_pins: spi3m1-pins {
-			rockchip,pins =
-				/* spi3_clkm1 */
-				<4 RK_PC2 2 &pcfg_pull_none>,
-				/* spi3_misom1 */
-				<4 RK_PC5 2 &pcfg_pull_none>,
-				/* spi3_mosim1 */
-				<4 RK_PC3 2 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		spi3m1_cs0: spi3m1-cs0 {
-			rockchip,pins =
-				/* spi3_cs0m1 */
-				<4 RK_PC6 2 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		spi3m1_cs1: spi3m1-cs1 {
-			rockchip,pins =
-				/* spi3_cs1m1 */
-				<4 RK_PD1 2 &pcfg_pull_none>;
-		};
-	};
-
-	tsadc {
-		/omit-if-no-ref/
-		tsadcm0_shut: tsadcm0-shut {
-			rockchip,pins =
-				/* tsadcm0_shut */
-				<0 RK_PA1 1 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		tsadcm1_shut: tsadcm1-shut {
-			rockchip,pins =
-				/* tsadcm1_shut */
-				<0 RK_PA2 2 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		tsadc_shutorg: tsadc-shutorg {
-			rockchip,pins =
-				/* tsadc_shutorg */
-				<0 RK_PA1 2 &pcfg_pull_none>;
-		};
-	};
-
-	uart0 {
-		/omit-if-no-ref/
-		uart0_xfer: uart0-xfer {
-			rockchip,pins =
-				/* uart0_rx */
-				<0 RK_PC0 3 &pcfg_pull_up>,
-				/* uart0_tx */
-				<0 RK_PC1 3 &pcfg_pull_up>;
-		};
-
-		/omit-if-no-ref/
-		uart0_ctsn: uart0-ctsn {
-			rockchip,pins =
-				/* uart0_ctsn */
-				<0 RK_PC7 3 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		uart0_rtsn: uart0-rtsn {
-			rockchip,pins =
-				/* uart0_rtsn */
-				<0 RK_PC4 3 &pcfg_pull_none>;
-		};
-	};
-
-	uart1 {
-		/omit-if-no-ref/
-		uart1m0_xfer: uart1m0-xfer {
-			rockchip,pins =
-				/* uart1_rxm0 */
-				<2 RK_PB3 2 &pcfg_pull_up>,
-				/* uart1_txm0 */
-				<2 RK_PB4 2 &pcfg_pull_up>;
-		};
-
-		/omit-if-no-ref/
-		uart1m0_ctsn: uart1m0-ctsn {
-			rockchip,pins =
-				/* uart1m0_ctsn */
-				<2 RK_PB6 2 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		uart1m0_rtsn: uart1m0-rtsn {
-			rockchip,pins =
-				/* uart1m0_rtsn */
-				<2 RK_PB5 2 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		uart1m1_xfer: uart1m1-xfer {
-			rockchip,pins =
-				/* uart1_rxm1 */
-				<3 RK_PD7 4 &pcfg_pull_up>,
-				/* uart1_txm1 */
-				<3 RK_PD6 4 &pcfg_pull_up>;
-		};
-
-		/omit-if-no-ref/
-		uart1m1_ctsn: uart1m1-ctsn {
-			rockchip,pins =
-				/* uart1m1_ctsn */
-				<4 RK_PC1 4 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		uart1m1_rtsn: uart1m1-rtsn {
-			rockchip,pins =
-				/* uart1m1_rtsn */
-				<4 RK_PB6 4 &pcfg_pull_none>;
-		};
-	};
-
-	uart2 {
-		/omit-if-no-ref/
-		uart2m0_xfer: uart2m0-xfer {
-			rockchip,pins =
-				/* uart2_rxm0 */
-				<0 RK_PD0 1 &pcfg_pull_up>,
-				/* uart2_txm0 */
-				<0 RK_PD1 1 &pcfg_pull_up>;
-		};
-
-		/omit-if-no-ref/
-		uart2m1_xfer: uart2m1-xfer {
-			rockchip,pins =
-				/* uart2_rxm1 */
-				<1 RK_PD6 2 &pcfg_pull_up>,
-				/* uart2_txm1 */
-				<1 RK_PD5 2 &pcfg_pull_up>;
-		};
-	};
-
-	uart3 {
-		/omit-if-no-ref/
-		uart3m0_xfer: uart3m0-xfer {
-			rockchip,pins =
-				/* uart3_rxm0 */
-				<1 RK_PA0 2 &pcfg_pull_up>,
-				/* uart3_txm0 */
-				<1 RK_PA1 2 &pcfg_pull_up>;
-		};
-
-		/omit-if-no-ref/
-		uart3m0_ctsn: uart3m0-ctsn {
-			rockchip,pins =
-				/* uart3m0_ctsn */
-				<1 RK_PA3 2 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		uart3m0_rtsn: uart3m0-rtsn {
-			rockchip,pins =
-				/* uart3m0_rtsn */
-				<1 RK_PA2 2 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		uart3m1_xfer: uart3m1-xfer {
-			rockchip,pins =
-				/* uart3_rxm1 */
-				<3 RK_PC0 4 &pcfg_pull_up>,
-				/* uart3_txm1 */
-				<3 RK_PB7 4 &pcfg_pull_up>;
-		};
-	};
-
-	uart4 {
-		/omit-if-no-ref/
-		uart4m0_xfer: uart4m0-xfer {
-			rockchip,pins =
-				/* uart4_rxm0 */
-				<1 RK_PA4 2 &pcfg_pull_up>,
-				/* uart4_txm0 */
-				<1 RK_PA6 2 &pcfg_pull_up>;
-		};
-
-		/omit-if-no-ref/
-		uart4m0_ctsn: uart4m0-ctsn {
-			rockchip,pins =
-				/* uart4m0_ctsn */
-				<1 RK_PA7 2 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		uart4m0_rtsn: uart4m0-rtsn {
-			rockchip,pins =
-				/* uart4m0_rtsn */
-				<1 RK_PA5 2 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		uart4m1_xfer: uart4m1-xfer {
-			rockchip,pins =
-				/* uart4_rxm1 */
-				<3 RK_PB1 4 &pcfg_pull_up>,
-				/* uart4_txm1 */
-				<3 RK_PB2 4 &pcfg_pull_up>;
-		};
-	};
-
-	uart5 {
-		/omit-if-no-ref/
-		uart5m0_xfer: uart5m0-xfer {
-			rockchip,pins =
-				/* uart5_rxm0 */
-				<2 RK_PA1 3 &pcfg_pull_up>,
-				/* uart5_txm0 */
-				<2 RK_PA2 3 &pcfg_pull_up>;
-		};
-
-		/omit-if-no-ref/
-		uart5m0_ctsn: uart5m0-ctsn {
-			rockchip,pins =
-				/* uart5m0_ctsn */
-				<1 RK_PD7 3 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		uart5m0_rtsn: uart5m0-rtsn {
-			rockchip,pins =
-				/* uart5m0_rtsn */
-				<2 RK_PA0 3 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		uart5m1_xfer: uart5m1-xfer {
-			rockchip,pins =
-				/* uart5_rxm1 */
-				<3 RK_PC3 4 &pcfg_pull_up>,
-				/* uart5_txm1 */
-				<3 RK_PC2 4 &pcfg_pull_up>;
-		};
-	};
-
-	uart6 {
-		/omit-if-no-ref/
-		uart6m0_xfer: uart6m0-xfer {
-			rockchip,pins =
-				/* uart6_rxm0 */
-				<2 RK_PA3 3 &pcfg_pull_up>,
-				/* uart6_txm0 */
-				<2 RK_PA4 3 &pcfg_pull_up>;
-		};
-
-		/omit-if-no-ref/
-		uart6m0_ctsn: uart6m0-ctsn {
-			rockchip,pins =
-				/* uart6m0_ctsn */
-				<2 RK_PC0 3 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		uart6m0_rtsn: uart6m0-rtsn {
-			rockchip,pins =
-				/* uart6m0_rtsn */
-				<2 RK_PB7 3 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		uart6m1_xfer: uart6m1-xfer {
-			rockchip,pins =
-				/* uart6_rxm1 */
-				<1 RK_PD6 3 &pcfg_pull_up>,
-				/* uart6_txm1 */
-				<1 RK_PD5 3 &pcfg_pull_up>;
-		};
-	};
-
-	uart7 {
-		/omit-if-no-ref/
-		uart7m0_xfer: uart7m0-xfer {
-			rockchip,pins =
-				/* uart7_rxm0 */
-				<2 RK_PA5 3 &pcfg_pull_up>,
-				/* uart7_txm0 */
-				<2 RK_PA6 3 &pcfg_pull_up>;
-		};
-
-		/omit-if-no-ref/
-		uart7m0_ctsn: uart7m0-ctsn {
-			rockchip,pins =
-				/* uart7m0_ctsn */
-				<2 RK_PC2 3 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		uart7m0_rtsn: uart7m0-rtsn {
-			rockchip,pins =
-				/* uart7m0_rtsn */
-				<2 RK_PC1 3 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		uart7m1_xfer: uart7m1-xfer {
-			rockchip,pins =
-				/* uart7_rxm1 */
-				<3 RK_PC5 4 &pcfg_pull_up>,
-				/* uart7_txm1 */
-				<3 RK_PC4 4 &pcfg_pull_up>;
-		};
-
-		/omit-if-no-ref/
-		uart7m2_xfer: uart7m2-xfer {
-			rockchip,pins =
-				/* uart7_rxm2 */
-				<4 RK_PA3 4 &pcfg_pull_up>,
-				/* uart7_txm2 */
-				<4 RK_PA2 4 &pcfg_pull_up>;
-		};
-	};
-
-	uart8 {
-		/omit-if-no-ref/
-		uart8m0_xfer: uart8m0-xfer {
-			rockchip,pins =
-				/* uart8_rxm0 */
-				<2 RK_PC6 2 &pcfg_pull_up>,
-				/* uart8_txm0 */
-				<2 RK_PC5 3 &pcfg_pull_up>;
-		};
-
-		/omit-if-no-ref/
-		uart8m0_ctsn: uart8m0-ctsn {
-			rockchip,pins =
-				/* uart8m0_ctsn */
-				<2 RK_PB2 3 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		uart8m0_rtsn: uart8m0-rtsn {
-			rockchip,pins =
-				/* uart8m0_rtsn */
-				<2 RK_PB1 3 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		uart8m1_xfer: uart8m1-xfer {
-			rockchip,pins =
-				/* uart8_rxm1 */
-				<3 RK_PA0 4 &pcfg_pull_up>,
-				/* uart8_txm1 */
-				<2 RK_PD7 4 &pcfg_pull_up>;
-		};
-	};
-
-	uart9 {
-		/omit-if-no-ref/
-		uart9m0_xfer: uart9m0-xfer {
-			rockchip,pins =
-				/* uart9_rxm0 */
-				<2 RK_PA7 3 &pcfg_pull_up>,
-				/* uart9_txm0 */
-				<2 RK_PB0 3 &pcfg_pull_up>;
-		};
-
-		/omit-if-no-ref/
-		uart9m0_ctsn: uart9m0-ctsn {
-			rockchip,pins =
-				/* uart9m0_ctsn */
-				<2 RK_PC4 3 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		uart9m0_rtsn: uart9m0-rtsn {
-			rockchip,pins =
-				/* uart9m0_rtsn */
-				<2 RK_PC3 3 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		uart9m1_xfer: uart9m1-xfer {
-			rockchip,pins =
-				/* uart9_rxm1 */
-				<4 RK_PC6 4 &pcfg_pull_up>,
-				/* uart9_txm1 */
-				<4 RK_PC5 4 &pcfg_pull_up>;
-		};
-
-		/omit-if-no-ref/
-		uart9m2_xfer: uart9m2-xfer {
-			rockchip,pins =
-				/* uart9_rxm2 */
-				<4 RK_PA5 4 &pcfg_pull_up>,
-				/* uart9_txm2 */
-				<4 RK_PA4 4 &pcfg_pull_up>;
-		};
-	};
-
-	vop {
-		/omit-if-no-ref/
-		vopm0_pins: vopm0-pins {
-			rockchip,pins =
-				/* vop_pwmm0 */
-				<0 RK_PC3 2 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		vopm1_pins: vopm1-pins {
-			rockchip,pins =
-				/* vop_pwmm1 */
-				<3 RK_PC4 2 &pcfg_pull_none>;
-		};
-	};
-};
-
-/*
- * This part is edited handly.
- */
-&pinctrl {
-	spi0-hs {
-		/omit-if-no-ref/
-		spi0m0_pins_hs: spi0m0-pins {
-			rockchip,pins =
-				/* spi0_clkm0 */
-				<0 RK_PB5 2 &pcfg_pull_up_drv_level_1>,
-				/* spi0_misom0 */
-				<0 RK_PC5 2 &pcfg_pull_up_drv_level_1>,
-				/* spi0_mosim0 */
-				<0 RK_PB6 2 &pcfg_pull_up_drv_level_1>;
-		};
-
-		/omit-if-no-ref/
-		spi0m0_cs0_hs: spi0m0-cs0 {
-			rockchip,pins =
-				/* spi0_cs0m0 */
-				<0 RK_PC6 2 &pcfg_pull_up_drv_level_1>;
-		};
-
-		/omit-if-no-ref/
-		spi0m0_cs1_hs: spi0m0-cs1 {
-			rockchip,pins =
-				/* spi0_cs1m0 */
-				<0 RK_PC4 2 &pcfg_pull_up_drv_level_1>;
-		};
-
-		/omit-if-no-ref/
-		spi0m1_pins_hs: spi0m1-pins {
-			rockchip,pins =
-				/* spi0_clkm1 */
-				<2 RK_PD3 3 &pcfg_pull_up_drv_level_1>,
-				/* spi0_misom1 */
-				<2 RK_PD0 3 &pcfg_pull_up_drv_level_1>,
-				/* spi0_mosim1 */
-				<2 RK_PD1 3 &pcfg_pull_up_drv_level_1>;
-		};
-
-		/omit-if-no-ref/
-		spi0m1_cs0_hs: spi0m1-cs0 {
-			rockchip,pins =
-				/* spi0_cs0m1 */
-				<2 RK_PD2 3 &pcfg_pull_up_drv_level_1>;
-		};
-	};
-
-	spi1-hs {
-		/omit-if-no-ref/
-		spi1m0_pins_hs: spi1m0-pins {
-			rockchip,pins =
-				/* spi1_clkm0 */
-				<2 RK_PB5 3 &pcfg_pull_up_drv_level_1>,
-				/* spi1_misom0 */
-				<2 RK_PB6 3 &pcfg_pull_up_drv_level_1>,
-				/* spi1_mosim0 */
-				<2 RK_PB7 4 &pcfg_pull_up_drv_level_1>;
-		};
-
-		/omit-if-no-ref/
-		spi1m0_cs0_hs: spi1m0-cs0 {
-			rockchip,pins =
-				/* spi1_cs0m0 */
-				<2 RK_PC0 4 &pcfg_pull_up_drv_level_1>;
-		};
-
-		/omit-if-no-ref/
-		spi1m0_cs1_hs: spi1m0-cs1 {
-			rockchip,pins =
-				/* spi1_cs1m0 */
-				<2 RK_PC6 3 &pcfg_pull_up_drv_level_1>;
-		};
-
-		/omit-if-no-ref/
-		spi1m1_pins_hs: spi1m1-pins {
-			rockchip,pins =
-				/* spi1_clkm1 */
-				<3 RK_PC3 3 &pcfg_pull_up_drv_level_1>,
-				/* spi1_misom1 */
-				<3 RK_PC2 3 &pcfg_pull_up_drv_level_1>,
-				/* spi1_mosim1 */
-				<3 RK_PC1 3 &pcfg_pull_up_drv_level_1>;
-		};
-
-		/omit-if-no-ref/
-		spi1m1_cs0_hs: spi1m1-cs0 {
-			rockchip,pins =
-				/* spi1_cs0m1 */
-				<3 RK_PA1 3 &pcfg_pull_up_drv_level_1>;
-		};
-	};
-
-	spi2-hs {
-		/omit-if-no-ref/
-		spi2m0_pins_hs: spi2m0-pins {
-			rockchip,pins =
-				/* spi2_clkm0 */
-				<2 RK_PC1 4 &pcfg_pull_up_drv_level_1>,
-				/* spi2_misom0 */
-				<2 RK_PC2 4 &pcfg_pull_up_drv_level_1>,
-				/* spi2_mosim0 */
-				<2 RK_PC3 4 &pcfg_pull_up_drv_level_1>;
-		};
-
-		/omit-if-no-ref/
-		spi2m0_cs0_hs: spi2m0-cs0 {
-			rockchip,pins =
-				/* spi2_cs0m0 */
-				<2 RK_PC4 4 &pcfg_pull_up_drv_level_1>;
-		};
-
-		/omit-if-no-ref/
-		spi2m0_cs1_hs: spi2m0-cs1 {
-			rockchip,pins =
-				/* spi2_cs1m0 */
-				<2 RK_PC5 4 &pcfg_pull_up_drv_level_1>;
-		};
-
-		/omit-if-no-ref/
-		spi2m1_pins_hs: spi2m1-pins {
-			rockchip,pins =
-				/* spi2_clkm1 */
-				<3 RK_PA0 3 &pcfg_pull_up_drv_level_1>,
-				/* spi2_misom1 */
-				<2 RK_PD7 3 &pcfg_pull_up_drv_level_1>,
-				/* spi2_mosim1 */
-				<2 RK_PD6 3 &pcfg_pull_up_drv_level_1>;
-		};
-
-		/omit-if-no-ref/
-		spi2m1_cs0_hs: spi2m1-cs0 {
-			rockchip,pins =
-				/* spi2_cs0m1 */
-				<2 RK_PD5 3 &pcfg_pull_up_drv_level_1>;
-		};
-
-		/omit-if-no-ref/
-		spi2m1_cs1_hs: spi2m1-cs1 {
-			rockchip,pins =
-				/* spi2_cs1m1 */
-				<2 RK_PD4 3 &pcfg_pull_up_drv_level_1>;
-		};
-	};
-
-	spi3-hs {
-		/omit-if-no-ref/
-		spi3m0_pins_hs: spi3m0-pins {
-			rockchip,pins =
-				/* spi3_clkm0 */
-				<4 RK_PB3 4 &pcfg_pull_up_drv_level_1>,
-				/* spi3_misom0 */
-				<4 RK_PB0 4 &pcfg_pull_up_drv_level_1>,
-				/* spi3_mosim0 */
-				<4 RK_PB2 4 &pcfg_pull_up_drv_level_1>;
-		};
-
-		/omit-if-no-ref/
-		spi3m0_cs0_hs: spi3m0-cs0 {
-			rockchip,pins =
-				/* spi3_cs0m0 */
-				<4 RK_PA6 4 &pcfg_pull_up_drv_level_1>;
-		};
-
-		/omit-if-no-ref/
-		spi3m0_cs1_hs: spi3m0-cs1 {
-			rockchip,pins =
-				/* spi3_cs1m0 */
-				<4 RK_PA7 4 &pcfg_pull_up_drv_level_1>;
-		};
-
-		/omit-if-no-ref/
-		spi3m1_pins_hs: spi3m1-pins {
-			rockchip,pins =
-				/* spi3_clkm1 */
-				<4 RK_PC2 2 &pcfg_pull_up_drv_level_1>,
-				/* spi3_misom1 */
-				<4 RK_PC5 2 &pcfg_pull_up_drv_level_1>,
-				/* spi3_mosim1 */
-				<4 RK_PC3 2 &pcfg_pull_up_drv_level_1>;
-		};
-
-		/omit-if-no-ref/
-		spi3m1_cs0_hs: spi3m1-cs0 {
-			rockchip,pins =
-				/* spi3_cs0m1 */
-				<4 RK_PC6 2 &pcfg_pull_up_drv_level_1>;
-		};
-
-		/omit-if-no-ref/
-		spi3m1_cs1_hs: spi3m1-cs1 {
-			rockchip,pins =
-				/* spi3_cs1m1 */
-				<4 RK_PD1 2 &pcfg_pull_up_drv_level_1>;
-		};
-	};
-
-	gmac-txd-level3 {
-		/omit-if-no-ref/
-		gmac0_tx_bus2_level3: gmac0-tx-bus2-level3 {
-			rockchip,pins =
-				/* gmac0_txd0 */
-				<2 RK_PB3 1 &pcfg_pull_none_drv_level_3>,
-				/* gmac0_txd1 */
-				<2 RK_PB4 1 &pcfg_pull_none_drv_level_3>,
-				/* gmac0_txen */
-				<2 RK_PB5 1 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		gmac0_rgmii_bus_level3: gmac0-rgmii-bus-level3 {
-			rockchip,pins =
-				/* gmac0_rxd2 */
-				<2 RK_PA3 2 &pcfg_pull_none>,
-				/* gmac0_rxd3 */
-				<2 RK_PA4 2 &pcfg_pull_none>,
-				/* gmac0_txd2 */
-				<2 RK_PA6 2 &pcfg_pull_none_drv_level_3>,
-				/* gmac0_txd3 */
-				<2 RK_PA7 2 &pcfg_pull_none_drv_level_3>;
-		};
-
-		/omit-if-no-ref/
-		gmac1m0_tx_bus2_level3: gmac1m0-tx-bus2-level3 {
-			rockchip,pins =
-				/* gmac1_txd0m0 */
-				<3 RK_PB5 3 &pcfg_pull_none_drv_level_3>,
-				/* gmac1_txd1m0 */
-				<3 RK_PB6 3 &pcfg_pull_none_drv_level_3>,
-				/* gmac1_txenm0 */
-				<3 RK_PB7 3 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		gmac1m0_rgmii_bus_level3: gmac1m0-rgmii-bus-level3 {
-			rockchip,pins =
-				/* gmac1_rxd2m0 */
-				<3 RK_PA4 3 &pcfg_pull_none>,
-				/* gmac1_rxd3m0 */
-				<3 RK_PA5 3 &pcfg_pull_none>,
-				/* gmac1_txd2m0 */
-				<3 RK_PA2 3 &pcfg_pull_none_drv_level_3>,
-				/* gmac1_txd3m0 */
-				<3 RK_PA3 3 &pcfg_pull_none_drv_level_3>;
-		};
-
-		/omit-if-no-ref/
-		gmac1m1_tx_bus2_level3: gmac1m1-tx-bus2-level3 {
-			rockchip,pins =
-				/* gmac1_txd0m1 */
-				<4 RK_PA4 3 &pcfg_pull_none_drv_level_3>,
-				/* gmac1_txd1m1 */
-				<4 RK_PA5 3 &pcfg_pull_none_drv_level_3>,
-				/* gmac1_txenm1 */
-				<4 RK_PA6 3 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		gmac1m1_rgmii_bus_level3: gmac1m1-rgmii-bus-level3 {
-			rockchip,pins =
-				/* gmac1_rxd2m1 */
-				<4 RK_PA1 3 &pcfg_pull_none>,
-				/* gmac1_rxd3m1 */
-				<4 RK_PA2 3 &pcfg_pull_none>,
-				/* gmac1_txd2m1 */
-				<3 RK_PD6 3 &pcfg_pull_none_drv_level_3>,
-				/* gmac1_txd3m1 */
-				<3 RK_PD7 3 &pcfg_pull_none_drv_level_3>;
-		};
-	};
-
-	gmac-txc-level2 {
-		/omit-if-no-ref/
-		gmac0_rgmii_clk_level2: gmac0-rgmii-clk-level2 {
-			rockchip,pins =
-				/* gmac0_rxclk */
-				<2 RK_PA5 2 &pcfg_pull_none>,
-				/* gmac0_txclk */
-				<2 RK_PB0 2 &pcfg_pull_none_drv_level_2>;
-		};
-
-		/omit-if-no-ref/
-		gmac1m0_rgmii_clk_level2: gmac1m0-rgmii-clk-level2 {
-			rockchip,pins =
-				/* gmac1_rxclkm0 */
-				<3 RK_PA7 3 &pcfg_pull_none>,
-				/* gmac1_txclkm0 */
-				<3 RK_PA6 3 &pcfg_pull_none_drv_level_2>;
-		};
-
-		/omit-if-no-ref/
-		gmac1m1_rgmii_clk_level2: gmac1m1-rgmii-clk-level2 {
-			rockchip,pins =
-				/* gmac1_rxclkm1 */
-				<4 RK_PA3 3 &pcfg_pull_none>,
-				/* gmac1_txclkm1 */
-				<4 RK_PA0 3 &pcfg_pull_none_drv_level_2>;
-		};
-	};
-
-	tsadc {
-		/omit-if-no-ref/
-		tsadc_pin: tsadc-pin {
-			rockchip,pins =
-				/* tsadc_pin */
-				<0 RK_PA1 0 &pcfg_pull_none>;
-		};
-	};
-
-	lcdc {
-		/omit-if-no-ref/
-		lcdc_clock: lcdc-clock {
-			rockchip,pins =
-				/* lcdc_clk */
-				<3 RK_PA0 1 &pcfg_pull_none>,
-				/* lcdc_den */
-				<3 RK_PC3 1 &pcfg_pull_none>,
-				/* lcdc_hsync */
-				<3 RK_PC1 1 &pcfg_pull_none>,
-				/* lcdc_vsync */
-				<3 RK_PC2 1 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		lcdc_data16: lcdc-data16 {
-			rockchip,pins =
-				/* lcdc_d3 */
-				<2 RK_PD3 1 &pcfg_pull_none>,
-				/* lcdc_d4 */
-				<2 RK_PD4 1 &pcfg_pull_none>,
-				/* lcdc_d5 */
-				<2 RK_PD5 1 &pcfg_pull_none>,
-				/* lcdc_d6 */
-				<2 RK_PD6 1 &pcfg_pull_none>,
-				/* lcdc_d7 */
-				<2 RK_PD7 1 &pcfg_pull_none>,
-				/* lcdc_d10 */
-				<3 RK_PA3 1 &pcfg_pull_none>,
-				/* lcdc_d11 */
-				<3 RK_PA4 1 &pcfg_pull_none>,
-				/* lcdc_d12 */
-				<3 RK_PA5 1 &pcfg_pull_none>,
-				/* lcdc_d13 */
-				<3 RK_PA6 1 &pcfg_pull_none>,
-				/* lcdc_d14 */
-				<3 RK_PA7 1 &pcfg_pull_none>,
-				/* lcdc_d15 */
-				<3 RK_PB0 1 &pcfg_pull_none>,
-				/* lcdc_d19 */
-				<3 RK_PB4 1 &pcfg_pull_none>,
-				/* lcdc_d20 */
-				<3 RK_PB5 1 &pcfg_pull_none>,
-				/* lcdc_d21 */
-				<3 RK_PB6 1 &pcfg_pull_none>,
-				/* lcdc_d22 */
-				<3 RK_PB7 1 &pcfg_pull_none>,
-				/* lcdc_d23 */
-				<3 RK_PC0 1 &pcfg_pull_none>;
-		};
-
-		/omit-if-no-ref/
-		lcdc_data18: lcdc-data18 {
-			rockchip,pins =
-				/* lcdc_d2 */
-				<2 RK_PD2 1 &pcfg_pull_none>,
-				/* lcdc_d3 */
-				<2 RK_PD3 1 &pcfg_pull_none>,
-				/* lcdc_d4 */
-				<2 RK_PD4 1 &pcfg_pull_none>,
-				/* lcdc_d5 */
-				<2 RK_PD5 1 &pcfg_pull_none>,
-				/* lcdc_d6 */
-				<2 RK_PD6 1 &pcfg_pull_none>,
-				/* lcdc_d7 */
-				<2 RK_PD7 1 &pcfg_pull_none>,
-				/* lcdc_d10 */
-				<3 RK_PA3 1 &pcfg_pull_none>,
-				/* lcdc_d11 */
-				<3 RK_PA4 1 &pcfg_pull_none>,
-				/* lcdc_d12 */
-				<3 RK_PA5 1 &pcfg_pull_none>,
-				/* lcdc_d13 */
-				<3 RK_PA6 1 &pcfg_pull_none>,
-				/* lcdc_d14 */
-				<3 RK_PA7 1 &pcfg_pull_none>,
-				/* lcdc_d15 */
-				<3 RK_PB0 1 &pcfg_pull_none>,
-				/* lcdc_d18 */
-				<3 RK_PB3 1 &pcfg_pull_none>,
-				/* lcdc_d19 */
-				<3 RK_PB4 1 &pcfg_pull_none>,
-				/* lcdc_d20 */
-				<3 RK_PB5 1 &pcfg_pull_none>,
-				/* lcdc_d21 */
-				<3 RK_PB6 1 &pcfg_pull_none>,
-				/* lcdc_d22 */
-				<3 RK_PB7 1 &pcfg_pull_none>,
-				/* lcdc_d23 */
-				<3 RK_PC0 1 &pcfg_pull_none>;
-		};
-	};
-
-};
diff --git a/arch/arm/dts/rk3568-radxa-cm3i.dtsi b/arch/arm/dts/rk3568-radxa-cm3i.dtsi
deleted file mode 100644
index 45b03dcbbad4..000000000000
--- a/arch/arm/dts/rk3568-radxa-cm3i.dtsi
+++ /dev/null
@@ -1,412 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-#include "rk3568.dtsi"
-
-/ {
-	compatible = "radxa,cm3i", "rockchip,rk3568";
-
-	aliases {
-		mmc0 = &sdhci;
-	};
-
-	chosen {
-		stdout-path = "serial2:115200n8";
-	};
-
-	gpio-leds {
-		compatible = "gpio-leds";
-
-		led_user: led-0 {
-			gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
-			function = LED_FUNCTION_HEARTBEAT;
-			color = <LED_COLOR_ID_GREEN>;
-			linux,default-trigger = "heartbeat";
-			pinctrl-names = "default";
-			pinctrl-0 = <&led_user_en>;
-		};
-	};
-
-	pcie30_avdd0v9: pcie30-avdd0v9-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "pcie30_avdd0v9";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <900000>;
-		regulator-max-microvolt = <900000>;
-		vin-supply = <&vcc3v3_sys>;
-	};
-
-	pcie30_avdd1v8: pcie30-avdd1v8-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "pcie30_avdd1v8";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <1800000>;
-		regulator-max-microvolt = <1800000>;
-		vin-supply = <&vcc3v3_sys>;
-	};
-
-	vcc3v3_sys: vcc3v3-sys-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc3v3_sys";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		vin-supply = <&vcc5v_input>;
-	};
-
-	vcc5v0_sys: vcc5v0-sys-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v0_sys";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		vin-supply = <&vcc5v_input>;
-	};
-
-	/* labeled +5v_input in schematic */
-	vcc5v_input: vcc5v-input-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v_input";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-	};
-};
-
-&combphy0 {
-	status = "okay";
-};
-
-&combphy1 {
-	status = "okay";
-};
-
-&combphy2 {
-	status = "okay";
-};
-
-&cpu0 {
-	cpu-supply = <&vdd_cpu>;
-};
-
-&cpu1 {
-	cpu-supply = <&vdd_cpu>;
-};
-
-&cpu2 {
-	cpu-supply = <&vdd_cpu>;
-};
-
-&cpu3 {
-	cpu-supply = <&vdd_cpu>;
-};
-
-&display_subsystem {
-	status = "disabled";
-};
-
-&gpu {
-	mali-supply = <&vdd_gpu>;
-	status = "okay";
-};
-
-&i2c0 {
-	status = "okay";
-
-	vdd_cpu: regulator@1c {
-		compatible = "tcs,tcs4525";
-		reg = <0x1c>;
-		fcs,suspend-voltage-selector = <1>;
-		regulator-name = "vdd_cpu";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <800000>;
-		regulator-max-microvolt = <1150000>;
-		regulator-ramp-delay = <2300>;
-		vin-supply = <&vcc5v_input>;
-
-		regulator-state-mem {
-			regulator-off-in-suspend;
-		};
-	};
-
-	rk809: pmic@20 {
-		compatible = "rockchip,rk809";
-		reg = <0x20>;
-		interrupt-parent = <&gpio0>;
-		interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
-		#clock-cells = <1>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pmic_int>;
-		rockchip,system-power-controller;
-		wakeup-source;
-
-		vcc1-supply = <&vcc3v3_sys>;
-		vcc2-supply = <&vcc3v3_sys>;
-		vcc3-supply = <&vcc3v3_sys>;
-		vcc4-supply = <&vcc3v3_sys>;
-		vcc5-supply = <&vcc3v3_sys>;
-		vcc6-supply = <&vcc3v3_sys>;
-		vcc7-supply = <&vcc3v3_sys>;
-		vcc8-supply = <&vcc3v3_sys>;
-		vcc9-supply = <&vcc3v3_sys>;
-
-		regulators {
-			vdd_logic: DCDC_REG1 {
-				regulator-name = "vdd_logic";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-initial-mode = <0x2>;
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <1350000>;
-				regulator-ramp-delay = <6001>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vdd_gpu: DCDC_REG2 {
-				regulator-name = "vdd_gpu";
-				regulator-always-on;
-				regulator-initial-mode = <0x2>;
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <1350000>;
-				regulator-ramp-delay = <6001>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc_ddr: DCDC_REG3 {
-				regulator-name = "vcc_ddr";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-initial-mode = <0x2>;
-
-				regulator-state-mem {
-					regulator-on-in-suspend;
-				};
-			};
-
-			vdd_npu: DCDC_REG4 {
-				regulator-name = "vdd_npu";
-				regulator-initial-mode = <0x2>;
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <1350000>;
-				regulator-ramp-delay = <6001>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc_1v8: DCDC_REG5 {
-				regulator-name = "vcc_1v8";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vdda0v9_image: LDO_REG1 {
-				regulator-name = "vdda0v9_image";
-				regulator-min-microvolt = <900000>;
-				regulator-max-microvolt = <900000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vdda_0v9: LDO_REG2 {
-				regulator-name = "vdda_0v9";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <900000>;
-				regulator-max-microvolt = <900000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vdda0v9_pmu: LDO_REG3 {
-				regulator-name = "vdda0v9_pmu";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <900000>;
-				regulator-max-microvolt = <900000>;
-
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <900000>;
-				};
-			};
-
-			vccio_acodec: LDO_REG4 {
-				regulator-name = "vccio_acodec";
-				regulator-always-on;
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vccio_sd: LDO_REG5 {
-				regulator-name = "vccio_sd";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <3300000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc3v3_pmu: LDO_REG6 {
-				regulator-name = "vcc3v3_pmu";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <3300000>;
-				};
-			};
-
-			vcca_1v8: LDO_REG7 {
-				regulator-name = "vcca_1v8";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcca1v8_pmu: LDO_REG8 {
-				regulator-name = "vcca1v8_pmu";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <1800000>;
-				};
-			};
-
-			vcca1v8_image: LDO_REG9 {
-				regulator-name = "vcca1v8_image";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc_3v3: SWITCH_REG1 {
-				regulator-name = "vcc_3v3";
-				regulator-always-on;
-				regulator-boot-on;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc3v3_sd: SWITCH_REG2 {
-				regulator-name = "vcc3v3_sd";
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-		};
-	};
-};
-
-&pinctrl {
-	leds {
-		led_user_en: led_user_en {
-			rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	pmic {
-		pmic_int: pmic_int {
-			rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
-		};
-	};
-};
-
-&pmu_io_domains {
-	pmuio1-supply = <&vcc3v3_pmu>;
-	pmuio2-supply = <&vcc3v3_pmu>;
-	vccio1-supply = <&vccio_acodec>;
-	vccio2-supply = <&vcc_1v8>;
-	vccio3-supply = <&vccio_sd>;
-	vccio4-supply = <&vcc_1v8>;
-	vccio5-supply = <&vcc_3v3>;
-	vccio6-supply = <&vcc_1v8>;
-	vccio7-supply = <&vcc_3v3>;
-	status = "okay";
-};
-
-&saradc {
-	vref-supply = <&vcca_1v8>;
-	status = "okay";
-};
-
-&sdhci {
-	bus-width = <8>;
-	max-frequency = <200000000>;
-	non-removable;
-	pinctrl-names = "default";
-	pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
-	vmmc-supply = <&vcc_3v3>;
-	vqmmc-supply = <&vcc_1v8>;
-	status = "okay";
-};
-
-&tsadc {
-	rockchip,hw-tshut-mode = <1>;
-	rockchip,hw-tshut-polarity = <0>;
-	status = "okay";
-};
-
-&uart2 {
-	status = "okay";
-};
-
-&usb2phy0 {
-	status = "okay";
-};
-
-&usb2phy1 {
-	status = "okay";
-};
-
-&usb_host0_xhci {
-	extcon = <&usb2phy0>;
-};
diff --git a/arch/arm/dts/rk3568-radxa-e25.dts b/arch/arm/dts/rk3568-radxa-e25.dts
deleted file mode 100644
index 72ad74c38a2b..000000000000
--- a/arch/arm/dts/rk3568-radxa-e25.dts
+++ /dev/null
@@ -1,236 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-
-/dts-v1/;
-#include "rk3568-radxa-cm3i.dtsi"
-
-/ {
-	model = "Radxa E25 Carrier Board";
-	compatible = "radxa,e25", "radxa,cm3i", "rockchip,rk3568";
-
-	aliases {
-		mmc1 = &sdmmc0;
-	};
-
-	pwm-leds {
-		compatible = "pwm-leds-multicolor";
-
-		multi-led {
-			color = <LED_COLOR_ID_RGB>;
-			max-brightness = <255>;
-
-			led-red {
-				color = <LED_COLOR_ID_RED>;
-				pwms = <&pwm1 0 1000000 0>;
-			};
-
-			led-green {
-				color = <LED_COLOR_ID_GREEN>;
-				pwms = <&pwm2 0 1000000 0>;
-			};
-
-			led-blue {
-				color = <LED_COLOR_ID_BLUE>;
-				pwms = <&pwm12 0 1000000 0>;
-			};
-		};
-	};
-
-	vbus_typec: vbus-typec-regulator {
-		compatible = "regulator-fixed";
-		enable-active-high;
-		gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&vbus_typec_en>;
-		regulator-name = "vbus_typec";
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		vin-supply = <&vcc5v0_sys>;
-	};
-
-	/* actually fed by vcc5v0_sys, dependent
-	 * on pi6c clock generator
-	 */
-	vcc3v3_minipcie: vcc3v3-minipcie-regulator {
-		compatible = "regulator-fixed";
-		enable-active-high;
-		gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&minipcie_enable_h>;
-		regulator-name = "vcc3v3_minipcie";
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		vin-supply = <&vcc3v3_pi6c_05>;
-	};
-
-	vcc3v3_ngff: vcc3v3-ngff-regulator {
-		compatible = "regulator-fixed";
-		enable-active-high;
-		gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&ngffpcie_enable_h>;
-		regulator-name = "vcc3v3_ngff";
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		vin-supply = <&vcc5v0_sys>;
-	};
-
-	vcc3v3_pcie30x1: vcc3v3-pcie30x1-regulator {
-		compatible = "regulator-fixed";
-		enable-active-high;
-		gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pcie30x1_enable_h>;
-		regulator-name = "vcc3v3_pcie30x1";
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		vin-supply = <&vcc5v0_sys>;
-	};
-
-	vcc3v3_pi6c_05: vcc3v3-pi6c-05-regulator {
-		compatible = "regulator-fixed";
-		enable-active-high;
-		gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pcie_enable_h>;
-		regulator-name = "vcc3v3_pcie";
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		vin-supply = <&vcc5v0_sys>;
-	};
-};
-
-&combphy1 {
-	phy-supply = <&vcc3v3_pcie30x1>;
-};
-
-&pcie2x1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pcie20_reset_h>;
-	reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
-	vpcie3v3-supply = <&vcc3v3_pi6c_05>;
-	status = "okay";
-};
-
-&pcie30phy {
-	data-lanes = <1 2>;
-	status = "okay";
-};
-
-&pcie3x1 {
-	num-lanes = <1>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&pcie30x1m0_pins>;
-	reset-gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>;
-	vpcie3v3-supply = <&vcc3v3_minipcie>;
-	status = "okay";
-};
-
-&pcie3x2 {
-	num-lanes = <1>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&pcie30x2_reset_h>;
-	reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
-	vpcie3v3-supply = <&vcc3v3_pi6c_05>;
-	status = "okay";
-};
-
-&pinctrl {
-	pcie {
-		pcie20_reset_h: pcie20-reset-h {
-			rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-
-		pcie30x1_enable_h: pcie30x1-enable-h {
-			rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-
-		pcie30x2_reset_h: pcie30x2-reset-h {
-			rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-
-		pcie_enable_h: pcie-enable-h {
-			rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	usb {
-		minipcie_enable_h: minipcie-enable-h {
-			rockchip,pins = <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-
-		ngffpcie_enable_h: ngffpcie-enable-h {
-			rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-
-		vbus_typec_en: vbus_typec_en {
-			rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-};
-
-&pwm1 {
-	status = "okay";
-};
-
-&pwm2 {
-	status = "okay";
-};
-
-&pwm12 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pwm12m1_pins>;
-	status = "okay";
-};
-
-&sata1 {
-	status = "okay";
-};
-
-&sdmmc0 {
-	bus-width = <4>;
-	cap-sd-highspeed;
-	cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
-	/* Also used in pcie30x1_clkreqnm0 */
-	disable-wp;
-	pinctrl-names = "default";
-	pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd>;
-	sd-uhs-sdr104;
-	vmmc-supply = <&vcc3v3_sd>;
-	vqmmc-supply = <&vccio_sd>;
-	status = "okay";
-};
-
-&usb_host0_ehci {
-	status = "okay";
-};
-
-&usb_host0_ohci {
-	status = "okay";
-};
-
-&usb_host0_xhci {
-	status = "okay";
-};
-
-&usb_host1_ehci {
-	status = "okay";
-};
-
-&usb_host1_ohci {
-	status = "okay";
-};
-
-&usb2phy0_otg {
-	phy-supply = <&vbus_typec>;
-	status = "okay";
-};
-
-&usb2phy1_host {
-	phy-supply = <&vcc3v3_minipcie>;
-	status = "okay";
-};
-
-&usb2phy1_otg {
-	phy-supply = <&vcc3v3_ngff>;
-	status = "okay";
-};
diff --git a/arch/arm/dts/rk3568-rock-3a.dts b/arch/arm/dts/rk3568-rock-3a.dts
deleted file mode 100644
index a5e974ea659e..000000000000
--- a/arch/arm/dts/rk3568-rock-3a.dts
+++ /dev/null
@@ -1,859 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-
-/dts-v1/;
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-#include <dt-bindings/soc/rockchip,vop2.h>
-#include "rk3568.dtsi"
-
-/ {
-	model = "Radxa ROCK3 Model A";
-	compatible = "radxa,rock3a", "rockchip,rk3568";
-
-	aliases {
-		ethernet0 = &gmac1;
-		mmc0 = &sdhci;
-		mmc1 = &sdmmc0;
-		mmc2 = &sdmmc2;
-	};
-
-	chosen: chosen {
-		stdout-path = "serial2:1500000n8";
-	};
-
-	hdmi-con {
-		compatible = "hdmi-connector";
-		type = "a";
-
-		port {
-			hdmi_con_in: endpoint {
-				remote-endpoint = <&hdmi_out_con>;
-			};
-		};
-	};
-
-	gmac1_clkin: external-gmac1-clock {
-		compatible = "fixed-clock";
-		clock-frequency = <125000000>;
-		clock-output-names = "gmac1_clkin";
-		#clock-cells = <0>;
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		led_user: led-0 {
-			gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
-			function = LED_FUNCTION_HEARTBEAT;
-			color = <LED_COLOR_ID_BLUE>;
-			linux,default-trigger = "heartbeat";
-			pinctrl-names = "default";
-			pinctrl-0 = <&led_user_en>;
-		};
-	};
-
-	rk809-sound {
-		compatible = "simple-audio-card";
-		simple-audio-card,format = "i2s";
-		simple-audio-card,name = "Analog RK809";
-		simple-audio-card,mclk-fs = <256>;
-
-		simple-audio-card,cpu {
-			sound-dai = <&i2s1_8ch>;
-		};
-
-		simple-audio-card,codec {
-			sound-dai = <&rk809>;
-		};
-	};
-
-	sdio_pwrseq: sdio-pwrseq {
-		compatible = "mmc-pwrseq-simple";
-		clocks = <&rk809 1>;
-		clock-names = "ext_clock";
-		pinctrl-names = "default";
-		pinctrl-0 = <&wifi_enable>;
-		post-power-on-delay-ms = <100>;
-		power-off-delay-us = <5000000>;
-		reset-gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_LOW>;
-	};
-
-	vcc12v_dcin: vcc12v-dcin-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc12v_dcin";
-		regulator-always-on;
-		regulator-boot-on;
-	};
-
-	pcie30_avdd0v9: pcie30-avdd0v9-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "pcie30_avdd0v9";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <900000>;
-		regulator-max-microvolt = <900000>;
-		vin-supply = <&vcc3v3_sys>;
-	};
-
-	pcie30_avdd1v8: pcie30-avdd1v8-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "pcie30_avdd1v8";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <1800000>;
-		regulator-max-microvolt = <1800000>;
-		vin-supply = <&vcc3v3_sys>;
-	};
-
-	/* pi6c pcie clock generator */
-	vcc3v3_pi6c_03: vcc3v3-pi6c-03-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc3v3_pi6c_03";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		vin-supply = <&vcc5v0_sys>;
-	};
-
-	vcc3v3_pcie: vcc3v3-pcie-regulator {
-		compatible = "regulator-fixed";
-		enable-active-high;
-		gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pcie_enable_h>;
-		regulator-name = "vcc3v3_pcie";
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		vin-supply = <&vcc5v0_sys>;
-	};
-
-	vcc3v3_sys: vcc3v3-sys-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc3v3_sys";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		vin-supply = <&vcc12v_dcin>;
-	};
-
-	vcc5v0_sys: vcc5v0-sys-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v0_sys";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		vin-supply = <&vcc12v_dcin>;
-	};
-
-	vcc5v0_usb: vcc5v0-usb-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v0_usb";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		vin-supply = <&vcc12v_dcin>;
-	};
-
-	vcc5v0_usb_host: vcc5v0-usb-host-regulator {
-		compatible = "regulator-fixed";
-		enable-active-high;
-		gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&vcc5v0_usb_host_en>;
-		regulator-name = "vcc5v0_usb_host";
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		vin-supply = <&vcc5v0_usb>;
-	};
-
-	vcc5v0_usb_hub: vcc5v0-usb-hub-regulator {
-		compatible = "regulator-fixed";
-		enable-active-high;
-		gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&vcc5v0_usb_hub_en>;
-		regulator-name = "vcc5v0_usb_hub";
-		regulator-always-on;
-		vin-supply = <&vcc5v0_usb>;
-	};
-
-	vcc5v0_usb_otg: vcc5v0-usb-otg-regulator {
-		compatible = "regulator-fixed";
-		enable-active-high;
-		gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&vcc5v0_usb_otg_en>;
-		regulator-name = "vcc5v0_usb_otg";
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		vin-supply = <&vcc5v0_usb>;
-	};
-
-	vcc_cam: vcc-cam-regulator {
-		compatible = "regulator-fixed";
-		enable-active-high;
-		gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&vcc_cam_en>;
-		regulator-name = "vcc_cam";
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		vin-supply = <&vcc3v3_sys>;
-
-		regulator-state-mem {
-			regulator-off-in-suspend;
-		};
-	};
-
-	vcc_mipi: vcc-mipi-regulator {
-		compatible = "regulator-fixed";
-		enable-active-high;
-		gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&vcc_mipi_en>;
-		regulator-name = "vcc_mipi";
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		vin-supply = <&vcc3v3_sys>;
-
-		regulator-state-mem {
-			regulator-off-in-suspend;
-		};
-	};
-};
-
-&combphy0 {
-	status = "okay";
-};
-
-&combphy1 {
-	status = "okay";
-};
-
-&combphy2 {
-	status = "okay";
-};
-
-&cpu0 {
-	cpu-supply = <&vdd_cpu>;
-};
-
-&cpu1 {
-	cpu-supply = <&vdd_cpu>;
-};
-
-&cpu2 {
-	cpu-supply = <&vdd_cpu>;
-};
-
-&cpu3 {
-	cpu-supply = <&vdd_cpu>;
-};
-
-&gmac1 {
-	assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
-	assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&gmac1_clkin>;
-	clock_in_out = "input";
-	phy-handle = <&rgmii_phy1>;
-	phy-mode = "rgmii-id";
-	phy-supply = <&vcc_3v3>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&gmac1m1_miim
-		     &gmac1m1_tx_bus2
-		     &gmac1m1_rx_bus2
-		     &gmac1m1_rgmii_clk
-		     &gmac1m1_clkinout
-		     &gmac1m1_rgmii_bus>;
-	status = "okay";
-};
-
-&gpu {
-	mali-supply = <&vdd_gpu>;
-	status = "okay";
-};
-
-&hdmi {
-	avdd-0v9-supply = <&vdda0v9_image>;
-	avdd-1v8-supply = <&vcca1v8_image>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&hdmitx_scl &hdmitx_sda &hdmitxm1_cec>;
-	status = "okay";
-};
-
-&hdmi_in {
-	hdmi_in_vp0: endpoint {
-		remote-endpoint = <&vp0_out_hdmi>;
-	};
-};
-
-&hdmi_out {
-	hdmi_out_con: endpoint {
-		remote-endpoint = <&hdmi_con_in>;
-	};
-};
-
-&hdmi_sound {
-	status = "okay";
-};
-
-&i2c0 {
-	status = "okay";
-
-	vdd_cpu: regulator@1c {
-		compatible = "tcs,tcs4525";
-		reg = <0x1c>;
-		fcs,suspend-voltage-selector = <1>;
-		regulator-name = "vdd_cpu";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <800000>;
-		regulator-max-microvolt = <1150000>;
-		regulator-ramp-delay = <2300>;
-		vin-supply = <&vcc5v0_sys>;
-
-		regulator-state-mem {
-			regulator-off-in-suspend;
-		};
-	};
-
-	rk809: pmic@20 {
-		compatible = "rockchip,rk809";
-		reg = <0x20>;
-		interrupt-parent = <&gpio0>;
-		interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
-		assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
-		assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
-		#clock-cells = <1>;
-		clock-names = "mclk";
-		clocks = <&cru I2S1_MCLKOUT_TX>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pmic_int>, <&i2s1m0_mclk>;
-		rockchip,system-power-controller;
-		#sound-dai-cells = <0>;
-		vcc1-supply = <&vcc3v3_sys>;
-		vcc2-supply = <&vcc3v3_sys>;
-		vcc3-supply = <&vcc3v3_sys>;
-		vcc4-supply = <&vcc3v3_sys>;
-		vcc5-supply = <&vcc3v3_sys>;
-		vcc6-supply = <&vcc3v3_sys>;
-		vcc7-supply = <&vcc3v3_sys>;
-		vcc8-supply = <&vcc3v3_sys>;
-		vcc9-supply = <&vcc3v3_sys>;
-		wakeup-source;
-
-		regulators {
-			vdd_logic: DCDC_REG1 {
-				regulator-name = "vdd_logic";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-initial-mode = <0x2>;
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <1350000>;
-				regulator-ramp-delay = <6001>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vdd_gpu: DCDC_REG2 {
-				regulator-name = "vdd_gpu";
-				regulator-always-on;
-				regulator-initial-mode = <0x2>;
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <1350000>;
-				regulator-ramp-delay = <6001>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc_ddr: DCDC_REG3 {
-				regulator-name = "vcc_ddr";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-initial-mode = <0x2>;
-
-				regulator-state-mem {
-					regulator-on-in-suspend;
-				};
-			};
-
-			vdd_npu: DCDC_REG4 {
-				regulator-name = "vdd_npu";
-				regulator-initial-mode = <0x2>;
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <1350000>;
-				regulator-ramp-delay = <6001>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc_1v8: DCDC_REG5 {
-				regulator-name = "vcc_1v8";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vdda0v9_image: LDO_REG1 {
-				regulator-name = "vdda0v9_image";
-				regulator-min-microvolt = <900000>;
-				regulator-max-microvolt = <900000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vdda_0v9: LDO_REG2 {
-				regulator-name = "vdda_0v9";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <900000>;
-				regulator-max-microvolt = <900000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vdda0v9_pmu: LDO_REG3 {
-				regulator-name = "vdda0v9_pmu";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <900000>;
-				regulator-max-microvolt = <900000>;
-
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <900000>;
-				};
-			};
-
-			vccio_acodec: LDO_REG4 {
-				regulator-name = "vccio_acodec";
-				regulator-always-on;
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vccio_sd: LDO_REG5 {
-				regulator-name = "vccio_sd";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <3300000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc3v3_pmu: LDO_REG6 {
-				regulator-name = "vcc3v3_pmu";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <3300000>;
-				};
-			};
-
-			vcca_1v8: LDO_REG7 {
-				regulator-name = "vcca_1v8";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcca1v8_pmu: LDO_REG8 {
-				regulator-name = "vcca1v8_pmu";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <1800000>;
-				};
-			};
-
-			vcca1v8_image: LDO_REG9 {
-				regulator-name = "vcca1v8_image";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc_3v3: SWITCH_REG1 {
-				regulator-name = "vcc_3v3";
-				regulator-always-on;
-				regulator-boot-on;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc3v3_sd: SWITCH_REG2 {
-				regulator-name = "vcc3v3_sd";
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-		};
-
-		codec {
-			mic-in-differential;
-		};
-	};
-};
-
-&i2c3 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c3m1_xfer>;
-	status = "disabled";
-};
-
-&i2c4 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c4m1_xfer>;
-	status = "disabled";
-};
-
-&i2c5 {
-	status = "okay";
-
-	hym8563: rtc@51 {
-		compatible = "haoyu,hym8563";
-		reg = <0x51>;
-		interrupt-parent = <&gpio0>;
-		interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>;
-		#clock-cells = <0>;
-		clock-output-names = "rtcic_32kout";
-		pinctrl-names = "default";
-		pinctrl-0 = <&hym8563_int>;
-		wakeup-source;
-	};
-};
-
-&i2s0_8ch {
-	status = "okay";
-};
-
-&i2s1_8ch {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2s1m0_sclktx &i2s1m0_lrcktx &i2s1m0_sdi0 &i2s1m0_sdo0>;
-	rockchip,trcm-sync-tx-only;
-	status = "okay";
-};
-
-&i2s2_2ch {
-	rockchip,trcm-sync-tx-only;
-	status = "okay";
-};
-
-&mdio1 {
-	rgmii_phy1: ethernet-phy@0 {
-		compatible = "ethernet-phy-ieee802.3-c22";
-		reg = <0x0>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&eth_phy_rst>;
-		reset-assert-us = <20000>;
-		reset-deassert-us = <100000>;
-		reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
-	};
-};
-
-&pcie2x1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pcie_reset_h>;
-	reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
-	vpcie3v3-supply = <&vcc3v3_pcie>;
-	status = "okay";
-};
-
-&pcie30phy {
-	phy-supply = <&vcc3v3_pi6c_03>;
-	status = "okay";
-};
-
-&pcie3x2 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pcie30x2m1_pins>;
-	reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
-	vpcie3v3-supply = <&vcc3v3_pcie>;
-	status = "okay";
-};
-
-&pinctrl {
-	cam {
-		vcc_cam_en: vcc_cam_en {
-			rockchip,pins = <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	display {
-		vcc_mipi_en: vcc_mipi_en {
-			rockchip,pins = <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	ethernet {
-		eth_phy_rst: eth_phy_rst {
-			rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	hym8563 {
-		hym8563_int: hym8563-int {
-			rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
-		};
-	};
-
-	leds {
-		led_user_en: led_user_en {
-			rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	pcie {
-		pcie_enable_h: pcie-enable-h {
-			rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-
-		pcie_reset_h: pcie-reset-h {
-			rockchip,pins = <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	pmic {
-		pmic_int: pmic_int {
-			rockchip,pins =
-				<0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
-		};
-	};
-
-	usb {
-		vcc5v0_usb_host_en: vcc5v0_usb_host_en {
-			rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-		vcc5v0_usb_hub_en: vcc5v0_usb_hub_en {
-			rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-		vcc5v0_usb_otg_en: vcc5v0_usb_otg_en {
-			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	bt {
-		bt_enable: bt-enable {
-			rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-
-		bt_host_wake: bt-host-wake {
-			rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
-		};
-
-		bt_wake: bt-wake {
-			rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	sdio-pwrseq {
-		wifi_enable: wifi-enable {
-			rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-};
-
-&pmu_io_domains {
-	pmuio1-supply = <&vcc3v3_pmu>;
-	pmuio2-supply = <&vcc3v3_pmu>;
-	vccio1-supply = <&vccio_acodec>;
-	vccio2-supply = <&vcc_1v8>;
-	vccio3-supply = <&vccio_sd>;
-	vccio4-supply = <&vcc_1v8>;
-	vccio5-supply = <&vcc_3v3>;
-	vccio6-supply = <&vcc_1v8>;
-	vccio7-supply = <&vcc_3v3>;
-	status = "okay";
-};
-
-&saradc {
-	vref-supply = <&vcca_1v8>;
-	status = "okay";
-};
-
-&sdhci {
-	bus-width = <8>;
-	max-frequency = <200000000>;
-	non-removable;
-	pinctrl-names = "default";
-	pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
-	vmmc-supply = <&vcc_3v3>;
-	vqmmc-supply = <&vcc_1v8>;
-	status = "okay";
-};
-
-&sdmmc0 {
-	bus-width = <4>;
-	cap-sd-highspeed;
-	cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
-	disable-wp;
-	pinctrl-names = "default";
-	pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
-	sd-uhs-sdr50;
-	vmmc-supply = <&vcc3v3_sd>;
-	vqmmc-supply = <&vccio_sd>;
-	status = "okay";
-};
-
-&sdmmc2 {
-	bus-width = <4>;
-	disable-wp;
-	cap-sd-highspeed;
-	cap-sdio-irq;
-	keep-power-in-suspend;
-	mmc-pwrseq = <&sdio_pwrseq>;
-	non-removable;
-	pinctrl-names = "default";
-	pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>;
-	sd-uhs-sdr12;
-	sd-uhs-sdr25;
-	sd-uhs-sdr50;
-	sd-uhs-sdr104;
-	vmmc-supply = <&vcc3v3_sys>;
-	vqmmc-supply = <&vcc_1v8>;
-	status = "okay";
-};
-
-&tsadc {
-	rockchip,hw-tshut-mode = <1>;
-	rockchip,hw-tshut-polarity = <0>;
-	status = "okay";
-};
-
-&uart1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>;
-	uart-has-rtscts;
-	status = "okay";
-
-	bluetooth {
-		compatible = "brcm,bcm43438-bt";
-		clocks = <&rk809 1>;
-		clock-names = "lpo";
-		device-wakeup-gpios = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
-		host-wakeup-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
-		shutdown-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&bt_host_wake &bt_wake &bt_enable>;
-		vbat-supply = <&vcc3v3_sys>;
-		vddio-supply = <&vcc_1v8>;
-		/* vddio comes from regulator on module, use IO bank voltage instead */
-	};
-};
-
-&uart2 {
-	status = "okay";
-};
-
-&usb_host0_ehci {
-	status = "okay";
-};
-
-&usb_host0_ohci {
-	status = "okay";
-};
-
-&usb_host0_xhci {
-	extcon = <&usb2phy0>;
-	status = "okay";
-};
-
-&usb_host1_ehci {
-	status = "okay";
-};
-
-&usb_host1_ohci {
-	status = "okay";
-};
-
-&usb_host1_xhci {
-	status = "okay";
-};
-
-&usb2phy0 {
-	status = "okay";
-};
-
-&usb2phy0_host {
-	phy-supply = <&vcc5v0_usb_host>;
-	status = "okay";
-};
-
-&usb2phy0_otg {
-	phy-supply = <&vcc5v0_usb_otg>;
-	status = "okay";
-};
-
-&usb2phy1 {
-	status = "okay";
-};
-
-&usb2phy1_host {
-	phy-supply = <&vcc5v0_usb_host>;
-	status = "okay";
-};
-
-&usb2phy1_otg {
-	phy-supply = <&vcc5v0_usb_host>;
-	status = "okay";
-};
-
-&vop {
-	assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
-	assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
-	status = "okay";
-};
-
-&vop_mmu {
-	status = "okay";
-};
-
-&vp0 {
-	vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
-		reg = <ROCKCHIP_VOP2_EP_HDMI0>;
-		remote-endpoint = <&hdmi_in_vp0>;
-	};
-};
diff --git a/arch/arm/dts/rk3568.dtsi b/arch/arm/dts/rk3568.dtsi
deleted file mode 100644
index f1be76a54ceb..000000000000
--- a/arch/arm/dts/rk3568.dtsi
+++ /dev/null
@@ -1,267 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
- */
-
-#include "rk356x.dtsi"
-
-/ {
-	compatible = "rockchip,rk3568";
-
-	sata0: sata@fc000000 {
-		compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci";
-		reg = <0 0xfc000000 0 0x1000>;
-		clocks = <&cru ACLK_SATA0>, <&cru CLK_SATA0_PMALIVE>,
-			 <&cru CLK_SATA0_RXOOB>;
-		clock-names = "sata", "pmalive", "rxoob";
-		interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
-		phys = <&combphy0 PHY_TYPE_SATA>;
-		phy-names = "sata-phy";
-		ports-implemented = <0x1>;
-		power-domains = <&power RK3568_PD_PIPE>;
-		status = "disabled";
-	};
-
-	pipe_phy_grf0: syscon@fdc70000 {
-		compatible = "rockchip,rk3568-pipe-phy-grf", "syscon";
-		reg = <0x0 0xfdc70000 0x0 0x1000>;
-	};
-
-	qos_pcie3x1: qos@fe190080 {
-		compatible = "rockchip,rk3568-qos", "syscon";
-		reg = <0x0 0xfe190080 0x0 0x20>;
-	};
-
-	qos_pcie3x2: qos@fe190100 {
-		compatible = "rockchip,rk3568-qos", "syscon";
-		reg = <0x0 0xfe190100 0x0 0x20>;
-	};
-
-	qos_sata0: qos@fe190200 {
-		compatible = "rockchip,rk3568-qos", "syscon";
-		reg = <0x0 0xfe190200 0x0 0x20>;
-	};
-
-	pcie30_phy_grf: syscon@fdcb8000 {
-		compatible = "rockchip,rk3568-pcie3-phy-grf", "syscon";
-		reg = <0x0 0xfdcb8000 0x0 0x10000>;
-	};
-
-	pcie30phy: phy@fe8c0000 {
-		compatible = "rockchip,rk3568-pcie3-phy";
-		reg = <0x0 0xfe8c0000 0x0 0x20000>;
-		#phy-cells = <0>;
-		clocks = <&pmucru CLK_PCIE30PHY_REF_M>, <&pmucru CLK_PCIE30PHY_REF_N>,
-			 <&cru PCLK_PCIE30PHY>;
-		clock-names = "refclk_m", "refclk_n", "pclk";
-		resets = <&cru SRST_PCIE30PHY>;
-		reset-names = "phy";
-		rockchip,phy-grf = <&pcie30_phy_grf>;
-		status = "disabled";
-	};
-
-	pcie3x1: pcie@fe270000 {
-		compatible = "rockchip,rk3568-pcie";
-		#address-cells = <3>;
-		#size-cells = <2>;
-		bus-range = <0x0 0xf>;
-		clocks = <&cru ACLK_PCIE30X1_MST>, <&cru ACLK_PCIE30X1_SLV>,
-			 <&cru ACLK_PCIE30X1_DBI>, <&cru PCLK_PCIE30X1>,
-			 <&cru CLK_PCIE30X1_AUX_NDFT>;
-		clock-names = "aclk_mst", "aclk_slv",
-			      "aclk_dbi", "pclk", "aux";
-		device_type = "pci";
-		interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
-		interrupt-names = "sys", "pmc", "msg", "legacy", "err";
-		#interrupt-cells = <1>;
-		interrupt-map-mask = <0 0 0 7>;
-		interrupt-map = <0 0 0 1 &pcie3x1_intc 0>,
-				<0 0 0 2 &pcie3x1_intc 1>,
-				<0 0 0 3 &pcie3x1_intc 2>,
-				<0 0 0 4 &pcie3x1_intc 3>;
-		linux,pci-domain = <1>;
-		num-ib-windows = <6>;
-		num-ob-windows = <2>;
-		max-link-speed = <3>;
-		msi-map = <0x0 &gic 0x1000 0x1000>;
-		num-lanes = <1>;
-		phys = <&pcie30phy>;
-		phy-names = "pcie-phy";
-		power-domains = <&power RK3568_PD_PIPE>;
-		reg = <0x3 0xc0400000 0x0 0x00400000>,
-		      <0x0 0xfe270000 0x0 0x00010000>,
-		      <0x0 0xf2000000 0x0 0x00100000>;
-		ranges = <0x01000000 0x0 0xf2100000 0x0 0xf2100000 0x0 0x00100000>,
-			 <0x02000000 0x0 0xf2200000 0x0 0xf2200000 0x0 0x01e00000>,
-			 <0x03000000 0x0 0x40000000 0x3 0x40000000 0x0 0x40000000>;
-		reg-names = "dbi", "apb", "config";
-		resets = <&cru SRST_PCIE30X1_POWERUP>;
-		reset-names = "pipe";
-		/* bifurcation; lane1 when using 1+1 */
-		status = "disabled";
-
-		pcie3x1_intc: legacy-interrupt-controller {
-			interrupt-controller;
-			#address-cells = <0>;
-			#interrupt-cells = <1>;
-			interrupt-parent = <&gic>;
-			interrupts = <GIC_SPI 157 IRQ_TYPE_EDGE_RISING>;
-		};
-	};
-
-	pcie3x2: pcie@fe280000 {
-		compatible = "rockchip,rk3568-pcie";
-		#address-cells = <3>;
-		#size-cells = <2>;
-		bus-range = <0x0 0xf>;
-		clocks = <&cru ACLK_PCIE30X2_MST>, <&cru ACLK_PCIE30X2_SLV>,
-			 <&cru ACLK_PCIE30X2_DBI>, <&cru PCLK_PCIE30X2>,
-			 <&cru CLK_PCIE30X2_AUX_NDFT>;
-		clock-names = "aclk_mst", "aclk_slv",
-			      "aclk_dbi", "pclk", "aux";
-		device_type = "pci";
-		interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
-		interrupt-names = "sys", "pmc", "msg", "legacy", "err";
-		#interrupt-cells = <1>;
-		interrupt-map-mask = <0 0 0 7>;
-		interrupt-map = <0 0 0 1 &pcie3x2_intc 0>,
-				<0 0 0 2 &pcie3x2_intc 1>,
-				<0 0 0 3 &pcie3x2_intc 2>,
-				<0 0 0 4 &pcie3x2_intc 3>;
-		linux,pci-domain = <2>;
-		num-ib-windows = <6>;
-		num-ob-windows = <2>;
-		max-link-speed = <3>;
-		msi-map = <0x0 &gic 0x2000 0x1000>;
-		num-lanes = <2>;
-		phys = <&pcie30phy>;
-		phy-names = "pcie-phy";
-		power-domains = <&power RK3568_PD_PIPE>;
-		reg = <0x3 0xc0800000 0x0 0x00400000>,
-		      <0x0 0xfe280000 0x0 0x00010000>,
-		      <0x0 0xf0000000 0x0 0x00100000>;
-		ranges = <0x01000000 0x0 0xf0100000 0x0 0xf0100000 0x0 0x00100000>,
-			 <0x02000000 0x0 0xf0200000 0x0 0xf0200000 0x0 0x01e00000>,
-			 <0x03000000 0x0 0x40000000 0x3 0x80000000 0x0 0x40000000>;
-		reg-names = "dbi", "apb", "config";
-		resets = <&cru SRST_PCIE30X2_POWERUP>;
-		reset-names = "pipe";
-		/* bifurcation; lane0 when using 1+1 */
-		status = "disabled";
-
-		pcie3x2_intc: legacy-interrupt-controller {
-			interrupt-controller;
-			#address-cells = <0>;
-			#interrupt-cells = <1>;
-			interrupt-parent = <&gic>;
-			interrupts = <GIC_SPI 162 IRQ_TYPE_EDGE_RISING>;
-		};
-	};
-
-	gmac0: ethernet@fe2a0000 {
-		compatible = "rockchip,rk3568-gmac", "snps,dwmac-4.20a";
-		reg = <0x0 0xfe2a0000 0x0 0x10000>;
-		interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
-		interrupt-names = "macirq", "eth_wake_irq";
-		clocks = <&cru SCLK_GMAC0>, <&cru SCLK_GMAC0_RX_TX>,
-			 <&cru SCLK_GMAC0_RX_TX>, <&cru CLK_MAC0_REFOUT>,
-			 <&cru ACLK_GMAC0>, <&cru PCLK_GMAC0>,
-			 <&cru SCLK_GMAC0_RX_TX>, <&cru CLK_GMAC0_PTP_REF>;
-		clock-names = "stmmaceth", "mac_clk_rx",
-			      "mac_clk_tx", "clk_mac_refout",
-			      "aclk_mac", "pclk_mac",
-			      "clk_mac_speed", "ptp_ref";
-		resets = <&cru SRST_A_GMAC0>;
-		reset-names = "stmmaceth";
-		rockchip,grf = <&grf>;
-		snps,axi-config = <&gmac0_stmmac_axi_setup>;
-		snps,mixed-burst;
-		snps,mtl-rx-config = <&gmac0_mtl_rx_setup>;
-		snps,mtl-tx-config = <&gmac0_mtl_tx_setup>;
-		snps,tso;
-		status = "disabled";
-
-		mdio0: mdio {
-			compatible = "snps,dwmac-mdio";
-			#address-cells = <0x1>;
-			#size-cells = <0x0>;
-		};
-
-		gmac0_stmmac_axi_setup: stmmac-axi-config {
-			snps,blen = <0 0 0 0 16 8 4>;
-			snps,rd_osr_lmt = <8>;
-			snps,wr_osr_lmt = <4>;
-		};
-
-		gmac0_mtl_rx_setup: rx-queues-config {
-			snps,rx-queues-to-use = <1>;
-			queue0 {};
-		};
-
-		gmac0_mtl_tx_setup: tx-queues-config {
-			snps,tx-queues-to-use = <1>;
-			queue0 {};
-		};
-	};
-
-	combphy0: phy@fe820000 {
-		compatible = "rockchip,rk3568-naneng-combphy";
-		reg = <0x0 0xfe820000 0x0 0x100>;
-		clocks = <&pmucru CLK_PCIEPHY0_REF>,
-			 <&cru PCLK_PIPEPHY0>,
-			 <&cru PCLK_PIPE>;
-		clock-names = "ref", "apb", "pipe";
-		assigned-clocks = <&pmucru CLK_PCIEPHY0_REF>;
-		assigned-clock-rates = <100000000>;
-		resets = <&cru SRST_PIPEPHY0>;
-		rockchip,pipe-grf = <&pipegrf>;
-		rockchip,pipe-phy-grf = <&pipe_phy_grf0>;
-		#phy-cells = <1>;
-		status = "disabled";
-	};
-};
-
-&cpu0_opp_table {
-	opp-1992000000 {
-		opp-hz = /bits/ 64 <1992000000>;
-		opp-microvolt = <1150000 1150000 1150000>;
-	};
-};
-
-&pipegrf {
-	compatible = "rockchip,rk3568-pipe-grf", "syscon";
-};
-
-&power {
-	power-domain@RK3568_PD_PIPE {
-		reg = <RK3568_PD_PIPE>;
-		clocks = <&cru PCLK_PIPE>;
-		pm_qos = <&qos_pcie2x1>,
-			 <&qos_pcie3x1>,
-			 <&qos_pcie3x2>,
-			 <&qos_sata0>,
-			 <&qos_sata1>,
-			 <&qos_sata2>,
-			 <&qos_usb3_0>,
-			 <&qos_usb3_1>;
-		#power-domain-cells = <0>;
-	};
-};
-
-&usb_host0_xhci {
-	phys = <&usb2phy0_otg>, <&combphy0 PHY_TYPE_USB3>;
-	phy-names = "usb2-phy", "usb3-phy";
-};
-
-&vop {
-	compatible = "rockchip,rk3568-vop";
-};
diff --git a/arch/arm/dts/rk356x.dtsi b/arch/arm/dts/rk356x.dtsi
deleted file mode 100644
index c19c0f1b3778..000000000000
--- a/arch/arm/dts/rk356x.dtsi
+++ /dev/null
@@ -1,1886 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
- */
-
-#include <dt-bindings/clock/rk3568-cru.h>
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/phy/phy.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-#include <dt-bindings/power/rk3568-power.h>
-#include <dt-bindings/soc/rockchip,boot-mode.h>
-#include <dt-bindings/thermal/thermal.h>
-
-/ {
-	interrupt-parent = <&gic>;
-	#address-cells = <2>;
-	#size-cells = <2>;
-
-	aliases {
-		gpio0 = &gpio0;
-		gpio1 = &gpio1;
-		gpio2 = &gpio2;
-		gpio3 = &gpio3;
-		gpio4 = &gpio4;
-		i2c0 = &i2c0;
-		i2c1 = &i2c1;
-		i2c2 = &i2c2;
-		i2c3 = &i2c3;
-		i2c4 = &i2c4;
-		i2c5 = &i2c5;
-		serial0 = &uart0;
-		serial1 = &uart1;
-		serial2 = &uart2;
-		serial3 = &uart3;
-		serial4 = &uart4;
-		serial5 = &uart5;
-		serial6 = &uart6;
-		serial7 = &uart7;
-		serial8 = &uart8;
-		serial9 = &uart9;
-		spi0 = &spi0;
-		spi1 = &spi1;
-		spi2 = &spi2;
-		spi3 = &spi3;
-	};
-
-	cpus {
-		#address-cells = <2>;
-		#size-cells = <0>;
-
-		cpu0: cpu@0 {
-			device_type = "cpu";
-			compatible = "arm,cortex-a55";
-			reg = <0x0 0x0>;
-			clocks = <&scmi_clk 0>;
-			#cooling-cells = <2>;
-			enable-method = "psci";
-			operating-points-v2 = <&cpu0_opp_table>;
-		};
-
-		cpu1: cpu@100 {
-			device_type = "cpu";
-			compatible = "arm,cortex-a55";
-			reg = <0x0 0x100>;
-			#cooling-cells = <2>;
-			enable-method = "psci";
-			operating-points-v2 = <&cpu0_opp_table>;
-		};
-
-		cpu2: cpu@200 {
-			device_type = "cpu";
-			compatible = "arm,cortex-a55";
-			reg = <0x0 0x200>;
-			#cooling-cells = <2>;
-			enable-method = "psci";
-			operating-points-v2 = <&cpu0_opp_table>;
-		};
-
-		cpu3: cpu@300 {
-			device_type = "cpu";
-			compatible = "arm,cortex-a55";
-			reg = <0x0 0x300>;
-			#cooling-cells = <2>;
-			enable-method = "psci";
-			operating-points-v2 = <&cpu0_opp_table>;
-		};
-	};
-
-	cpu0_opp_table: opp-table-0 {
-		compatible = "operating-points-v2";
-		opp-shared;
-
-		opp-408000000 {
-			opp-hz = /bits/ 64 <408000000>;
-			opp-microvolt = <900000 900000 1150000>;
-			clock-latency-ns = <40000>;
-		};
-
-		opp-600000000 {
-			opp-hz = /bits/ 64 <600000000>;
-			opp-microvolt = <900000 900000 1150000>;
-		};
-
-		opp-816000000 {
-			opp-hz = /bits/ 64 <816000000>;
-			opp-microvolt = <900000 900000 1150000>;
-			opp-suspend;
-		};
-
-		opp-1104000000 {
-			opp-hz = /bits/ 64 <1104000000>;
-			opp-microvolt = <900000 900000 1150000>;
-		};
-
-		opp-1416000000 {
-			opp-hz = /bits/ 64 <1416000000>;
-			opp-microvolt = <900000 900000 1150000>;
-		};
-
-		opp-1608000000 {
-			opp-hz = /bits/ 64 <1608000000>;
-			opp-microvolt = <975000 975000 1150000>;
-		};
-
-		opp-1800000000 {
-			opp-hz = /bits/ 64 <1800000000>;
-			opp-microvolt = <1050000 1050000 1150000>;
-		};
-	};
-
-	display_subsystem: display-subsystem {
-		compatible = "rockchip,display-subsystem";
-		ports = <&vop_out>;
-	};
-
-	firmware {
-		scmi: scmi {
-			compatible = "arm,scmi-smc";
-			arm,smc-id = <0x82000010>;
-			shmem = <&scmi_shmem>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-
-			scmi_clk: protocol@14 {
-				reg = <0x14>;
-				#clock-cells = <1>;
-			};
-		};
-	};
-
-	gpu_opp_table: opp-table-1 {
-		compatible = "operating-points-v2";
-
-		opp-200000000 {
-			opp-hz = /bits/ 64 <200000000>;
-			opp-microvolt = <825000>;
-		};
-
-		opp-300000000 {
-			opp-hz = /bits/ 64 <300000000>;
-			opp-microvolt = <825000>;
-		};
-
-		opp-400000000 {
-			opp-hz = /bits/ 64 <400000000>;
-			opp-microvolt = <825000>;
-		};
-
-		opp-600000000 {
-			opp-hz = /bits/ 64 <600000000>;
-			opp-microvolt = <825000>;
-		};
-
-		opp-700000000 {
-			opp-hz = /bits/ 64 <700000000>;
-			opp-microvolt = <900000>;
-		};
-
-		opp-800000000 {
-			opp-hz = /bits/ 64 <800000000>;
-			opp-microvolt = <1000000>;
-		};
-	};
-
-	hdmi_sound: hdmi-sound {
-		compatible = "simple-audio-card";
-		simple-audio-card,name = "HDMI";
-		simple-audio-card,format = "i2s";
-		simple-audio-card,mclk-fs = <256>;
-		status = "disabled";
-
-		simple-audio-card,codec {
-			sound-dai = <&hdmi>;
-		};
-
-		simple-audio-card,cpu {
-			sound-dai = <&i2s0_8ch>;
-		};
-	};
-
-	pmu {
-		compatible = "arm,cortex-a55-pmu";
-		interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>;
-		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
-	};
-
-	psci {
-		compatible = "arm,psci-1.0";
-		method = "smc";
-	};
-
-	timer {
-		compatible = "arm,armv8-timer";
-		interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>;
-		arm,no-tick-in-suspend;
-	};
-
-	xin24m: xin24m {
-		compatible = "fixed-clock";
-		clock-frequency = <24000000>;
-		clock-output-names = "xin24m";
-		#clock-cells = <0>;
-	};
-
-	xin32k: xin32k {
-		compatible = "fixed-clock";
-		clock-frequency = <32768>;
-		clock-output-names = "xin32k";
-		pinctrl-0 = <&clk32k_out0>;
-		pinctrl-names = "default";
-		#clock-cells = <0>;
-	};
-
-	sram@10f000 {
-		compatible = "mmio-sram";
-		reg = <0x0 0x0010f000 0x0 0x100>;
-		#address-cells = <1>;
-		#size-cells = <1>;
-		ranges = <0 0x0 0x0010f000 0x100>;
-
-		scmi_shmem: sram@0 {
-			compatible = "arm,scmi-shmem";
-			reg = <0x0 0x100>;
-		};
-	};
-
-	sata1: sata@fc400000 {
-		compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci";
-		reg = <0 0xfc400000 0 0x1000>;
-		clocks = <&cru ACLK_SATA1>, <&cru CLK_SATA1_PMALIVE>,
-			 <&cru CLK_SATA1_RXOOB>;
-		clock-names = "sata", "pmalive", "rxoob";
-		interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
-		phys = <&combphy1 PHY_TYPE_SATA>;
-		phy-names = "sata-phy";
-		ports-implemented = <0x1>;
-		power-domains = <&power RK3568_PD_PIPE>;
-		status = "disabled";
-	};
-
-	sata2: sata@fc800000 {
-		compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci";
-		reg = <0 0xfc800000 0 0x1000>;
-		clocks = <&cru ACLK_SATA2>, <&cru CLK_SATA2_PMALIVE>,
-			 <&cru CLK_SATA2_RXOOB>;
-		clock-names = "sata", "pmalive", "rxoob";
-		interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
-		phys = <&combphy2 PHY_TYPE_SATA>;
-		phy-names = "sata-phy";
-		ports-implemented = <0x1>;
-		power-domains = <&power RK3568_PD_PIPE>;
-		status = "disabled";
-	};
-
-	usb_host0_xhci: usb@fcc00000 {
-		compatible = "rockchip,rk3568-dwc3", "snps,dwc3";
-		reg = <0x0 0xfcc00000 0x0 0x400000>;
-		interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru CLK_USB3OTG0_REF>, <&cru CLK_USB3OTG0_SUSPEND>,
-			 <&cru ACLK_USB3OTG0>;
-		clock-names = "ref_clk", "suspend_clk",
-			      "bus_clk";
-		dr_mode = "otg";
-		phy_type = "utmi_wide";
-		power-domains = <&power RK3568_PD_PIPE>;
-		resets = <&cru SRST_USB3OTG0>;
-		snps,dis_u2_susphy_quirk;
-		status = "disabled";
-	};
-
-	usb_host1_xhci: usb@fd000000 {
-		compatible = "rockchip,rk3568-dwc3", "snps,dwc3";
-		reg = <0x0 0xfd000000 0x0 0x400000>;
-		interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru CLK_USB3OTG1_REF>, <&cru CLK_USB3OTG1_SUSPEND>,
-			 <&cru ACLK_USB3OTG1>;
-		clock-names = "ref_clk", "suspend_clk",
-			      "bus_clk";
-		dr_mode = "host";
-		phys = <&usb2phy0_host>, <&combphy1 PHY_TYPE_USB3>;
-		phy-names = "usb2-phy", "usb3-phy";
-		phy_type = "utmi_wide";
-		power-domains = <&power RK3568_PD_PIPE>;
-		resets = <&cru SRST_USB3OTG1>;
-		snps,dis_u2_susphy_quirk;
-		status = "disabled";
-	};
-
-	gic: interrupt-controller@fd400000 {
-		compatible = "arm,gic-v3";
-		reg = <0x0 0xfd400000 0 0x10000>, /* GICD */
-		      <0x0 0xfd460000 0 0x80000>; /* GICR */
-		interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
-		interrupt-controller;
-		#interrupt-cells = <3>;
-		mbi-alias = <0x0 0xfd410000>;
-		mbi-ranges = <296 24>;
-		msi-controller;
-	};
-
-	usb_host0_ehci: usb@fd800000 {
-		compatible = "generic-ehci";
-		reg = <0x0 0xfd800000 0x0 0x40000>;
-		interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru HCLK_USB2HOST0>, <&cru HCLK_USB2HOST0_ARB>,
-			 <&cru PCLK_USB>;
-		phys = <&usb2phy1_otg>;
-		phy-names = "usb";
-		status = "disabled";
-	};
-
-	usb_host0_ohci: usb@fd840000 {
-		compatible = "generic-ohci";
-		reg = <0x0 0xfd840000 0x0 0x40000>;
-		interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru HCLK_USB2HOST0>, <&cru HCLK_USB2HOST0_ARB>,
-			 <&cru PCLK_USB>;
-		phys = <&usb2phy1_otg>;
-		phy-names = "usb";
-		status = "disabled";
-	};
-
-	usb_host1_ehci: usb@fd880000 {
-		compatible = "generic-ehci";
-		reg = <0x0 0xfd880000 0x0 0x40000>;
-		interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru HCLK_USB2HOST1>, <&cru HCLK_USB2HOST1_ARB>,
-			 <&cru PCLK_USB>;
-		phys = <&usb2phy1_host>;
-		phy-names = "usb";
-		status = "disabled";
-	};
-
-	usb_host1_ohci: usb@fd8c0000 {
-		compatible = "generic-ohci";
-		reg = <0x0 0xfd8c0000 0x0 0x40000>;
-		interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru HCLK_USB2HOST1>, <&cru HCLK_USB2HOST1_ARB>,
-			 <&cru PCLK_USB>;
-		phys = <&usb2phy1_host>;
-		phy-names = "usb";
-		status = "disabled";
-	};
-
-	pmugrf: syscon@fdc20000 {
-		compatible = "rockchip,rk3568-pmugrf", "syscon", "simple-mfd";
-		reg = <0x0 0xfdc20000 0x0 0x10000>;
-
-		pmu_io_domains: io-domains {
-			compatible = "rockchip,rk3568-pmu-io-voltage-domain";
-			status = "disabled";
-		};
-	};
-
-	pipegrf: syscon@fdc50000 {
-		reg = <0x0 0xfdc50000 0x0 0x1000>;
-	};
-
-	grf: syscon@fdc60000 {
-		compatible = "rockchip,rk3568-grf", "syscon", "simple-mfd";
-		reg = <0x0 0xfdc60000 0x0 0x10000>;
-	};
-
-	pipe_phy_grf1: syscon@fdc80000 {
-		compatible = "rockchip,rk3568-pipe-phy-grf", "syscon";
-		reg = <0x0 0xfdc80000 0x0 0x1000>;
-	};
-
-	pipe_phy_grf2: syscon@fdc90000 {
-		compatible = "rockchip,rk3568-pipe-phy-grf", "syscon";
-		reg = <0x0 0xfdc90000 0x0 0x1000>;
-	};
-
-	usb2phy0_grf: syscon@fdca0000 {
-		compatible = "rockchip,rk3568-usb2phy-grf", "syscon";
-		reg = <0x0 0xfdca0000 0x0 0x8000>;
-	};
-
-	usb2phy1_grf: syscon@fdca8000 {
-		compatible = "rockchip,rk3568-usb2phy-grf", "syscon";
-		reg = <0x0 0xfdca8000 0x0 0x8000>;
-	};
-
-	pmucru: clock-controller@fdd00000 {
-		compatible = "rockchip,rk3568-pmucru";
-		reg = <0x0 0xfdd00000 0x0 0x1000>;
-		#clock-cells = <1>;
-		#reset-cells = <1>;
-	};
-
-	cru: clock-controller@fdd20000 {
-		compatible = "rockchip,rk3568-cru";
-		reg = <0x0 0xfdd20000 0x0 0x1000>;
-		clocks = <&xin24m>;
-		clock-names = "xin24m";
-		#clock-cells = <1>;
-		#reset-cells = <1>;
-		assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>, <&pmucru PLL_PPLL>;
-		assigned-clock-rates = <32768>, <1200000000>, <200000000>;
-		assigned-clock-parents = <&pmucru CLK_RTC32K_FRAC>;
-		rockchip,grf = <&grf>;
-	};
-
-	i2c0: i2c@fdd40000 {
-		compatible = "rockchip,rk3568-i2c", "rockchip,rk3399-i2c";
-		reg = <0x0 0xfdd40000 0x0 0x1000>;
-		interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&pmucru CLK_I2C0>, <&pmucru PCLK_I2C0>;
-		clock-names = "i2c", "pclk";
-		pinctrl-0 = <&i2c0_xfer>;
-		pinctrl-names = "default";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		status = "disabled";
-	};
-
-	uart0: serial@fdd50000 {
-		compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart";
-		reg = <0x0 0xfdd50000 0x0 0x100>;
-		interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&pmucru SCLK_UART0>, <&pmucru PCLK_UART0>;
-		clock-names = "baudclk", "apb_pclk";
-		dmas = <&dmac0 0>, <&dmac0 1>;
-		pinctrl-0 = <&uart0_xfer>;
-		pinctrl-names = "default";
-		reg-io-width = <4>;
-		reg-shift = <2>;
-		status = "disabled";
-	};
-
-	pwm0: pwm@fdd70000 {
-		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
-		reg = <0x0 0xfdd70000 0x0 0x10>;
-		clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
-		clock-names = "pwm", "pclk";
-		pinctrl-0 = <&pwm0m0_pins>;
-		pinctrl-names = "default";
-		#pwm-cells = <3>;
-		status = "disabled";
-	};
-
-	pwm1: pwm@fdd70010 {
-		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
-		reg = <0x0 0xfdd70010 0x0 0x10>;
-		clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
-		clock-names = "pwm", "pclk";
-		pinctrl-0 = <&pwm1m0_pins>;
-		pinctrl-names = "default";
-		#pwm-cells = <3>;
-		status = "disabled";
-	};
-
-	pwm2: pwm@fdd70020 {
-		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
-		reg = <0x0 0xfdd70020 0x0 0x10>;
-		clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
-		clock-names = "pwm", "pclk";
-		pinctrl-0 = <&pwm2m0_pins>;
-		pinctrl-names = "default";
-		#pwm-cells = <3>;
-		status = "disabled";
-	};
-
-	pwm3: pwm@fdd70030 {
-		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
-		reg = <0x0 0xfdd70030 0x0 0x10>;
-		clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
-		clock-names = "pwm", "pclk";
-		pinctrl-0 = <&pwm3_pins>;
-		pinctrl-names = "default";
-		#pwm-cells = <3>;
-		status = "disabled";
-	};
-
-	pmu: power-management@fdd90000 {
-		compatible = "rockchip,rk3568-pmu", "syscon", "simple-mfd";
-		reg = <0x0 0xfdd90000 0x0 0x1000>;
-
-		power: power-controller {
-			compatible = "rockchip,rk3568-power-controller";
-			#power-domain-cells = <1>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-
-			/* These power domains are grouped by VD_GPU */
-			power-domain@RK3568_PD_GPU {
-				reg = <RK3568_PD_GPU>;
-				clocks = <&cru ACLK_GPU_PRE>,
-					 <&cru PCLK_GPU_PRE>;
-				pm_qos = <&qos_gpu>;
-				#power-domain-cells = <0>;
-			};
-
-			/* These power domains are grouped by VD_LOGIC */
-			power-domain@RK3568_PD_VI {
-				reg = <RK3568_PD_VI>;
-				clocks = <&cru HCLK_VI>,
-					 <&cru PCLK_VI>;
-				pm_qos = <&qos_isp>,
-					 <&qos_vicap0>,
-					 <&qos_vicap1>;
-				#power-domain-cells = <0>;
-			};
-
-			power-domain@RK3568_PD_VO {
-				reg = <RK3568_PD_VO>;
-				clocks = <&cru HCLK_VO>,
-					 <&cru PCLK_VO>,
-					 <&cru ACLK_VOP_PRE>;
-				pm_qos = <&qos_hdcp>,
-					 <&qos_vop_m0>,
-					 <&qos_vop_m1>;
-				#power-domain-cells = <0>;
-			};
-
-			power-domain@RK3568_PD_RGA {
-				reg = <RK3568_PD_RGA>;
-				clocks = <&cru HCLK_RGA_PRE>,
-					 <&cru PCLK_RGA_PRE>;
-				pm_qos = <&qos_ebc>,
-					 <&qos_iep>,
-					 <&qos_jpeg_dec>,
-					 <&qos_jpeg_enc>,
-					 <&qos_rga_rd>,
-					 <&qos_rga_wr>;
-				#power-domain-cells = <0>;
-			};
-
-			power-domain@RK3568_PD_VPU {
-				reg = <RK3568_PD_VPU>;
-				clocks = <&cru HCLK_VPU_PRE>;
-				pm_qos = <&qos_vpu>;
-				#power-domain-cells = <0>;
-			};
-
-			power-domain@RK3568_PD_RKVDEC {
-				clocks = <&cru HCLK_RKVDEC_PRE>;
-				reg = <RK3568_PD_RKVDEC>;
-				pm_qos = <&qos_rkvdec>;
-				#power-domain-cells = <0>;
-			};
-
-			power-domain@RK3568_PD_RKVENC {
-				reg = <RK3568_PD_RKVENC>;
-				clocks = <&cru HCLK_RKVENC_PRE>;
-				pm_qos = <&qos_rkvenc_rd_m0>,
-					 <&qos_rkvenc_rd_m1>,
-					 <&qos_rkvenc_wr_m0>;
-				#power-domain-cells = <0>;
-			};
-		};
-	};
-
-	gpu: gpu@fde60000 {
-		compatible = "rockchip,rk3568-mali", "arm,mali-bifrost";
-		reg = <0x0 0xfde60000 0x0 0x4000>;
-		interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
-		interrupt-names = "job", "mmu", "gpu";
-		clocks = <&scmi_clk 1>, <&cru CLK_GPU>;
-		clock-names = "gpu", "bus";
-		#cooling-cells = <2>;
-		operating-points-v2 = <&gpu_opp_table>;
-		power-domains = <&power RK3568_PD_GPU>;
-		status = "disabled";
-	};
-
-	vpu: video-codec@fdea0400 {
-		compatible = "rockchip,rk3568-vpu";
-		reg = <0x0 0xfdea0000 0x0 0x800>;
-		interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
-		clock-names = "aclk", "hclk";
-		iommus = <&vdpu_mmu>;
-		power-domains = <&power RK3568_PD_VPU>;
-	};
-
-	vdpu_mmu: iommu@fdea0800 {
-		compatible = "rockchip,rk3568-iommu";
-		reg = <0x0 0xfdea0800 0x0 0x40>;
-		interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
-		clock-names = "aclk", "iface";
-		clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
-		power-domains = <&power RK3568_PD_VPU>;
-		#iommu-cells = <0>;
-	};
-
-	rga: rga@fdeb0000 {
-		compatible = "rockchip,rk3568-rga", "rockchip,rk3288-rga";
-		reg = <0x0 0xfdeb0000 0x0 0x180>;
-		interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru CLK_RGA_CORE>;
-		clock-names = "aclk", "hclk", "sclk";
-		resets = <&cru SRST_RGA_CORE>, <&cru SRST_A_RGA>, <&cru SRST_H_RGA>;
-		reset-names = "core", "axi", "ahb";
-		power-domains = <&power RK3568_PD_RGA>;
-	};
-
-	vepu: video-codec@fdee0000 {
-		compatible = "rockchip,rk3568-vepu";
-		reg = <0x0 0xfdee0000 0x0 0x800>;
-		interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru ACLK_JENC>, <&cru HCLK_JENC>;
-		clock-names = "aclk", "hclk";
-		iommus = <&vepu_mmu>;
-		power-domains = <&power RK3568_PD_RGA>;
-	};
-
-	vepu_mmu: iommu@fdee0800 {
-		compatible = "rockchip,rk3568-iommu";
-		reg = <0x0 0xfdee0800 0x0 0x40>;
-		interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru ACLK_JENC>, <&cru HCLK_JENC>;
-		clock-names = "aclk", "iface";
-		power-domains = <&power RK3568_PD_RGA>;
-		#iommu-cells = <0>;
-	};
-
-	sdmmc2: mmc@fe000000 {
-		compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc";
-		reg = <0x0 0xfe000000 0x0 0x4000>;
-		interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru HCLK_SDMMC2>, <&cru CLK_SDMMC2>,
-			 <&cru SCLK_SDMMC2_DRV>, <&cru SCLK_SDMMC2_SAMPLE>;
-		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
-		fifo-depth = <0x100>;
-		max-frequency = <150000000>;
-		resets = <&cru SRST_SDMMC2>;
-		reset-names = "reset";
-		status = "disabled";
-	};
-
-	gmac1: ethernet@fe010000 {
-		compatible = "rockchip,rk3568-gmac", "snps,dwmac-4.20a";
-		reg = <0x0 0xfe010000 0x0 0x10000>;
-		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
-		interrupt-names = "macirq", "eth_wake_irq";
-		clocks = <&cru SCLK_GMAC1>, <&cru SCLK_GMAC1_RX_TX>,
-			 <&cru SCLK_GMAC1_RX_TX>, <&cru CLK_MAC1_REFOUT>,
-			 <&cru ACLK_GMAC1>, <&cru PCLK_GMAC1>,
-			 <&cru SCLK_GMAC1_RX_TX>, <&cru CLK_GMAC1_PTP_REF>;
-		clock-names = "stmmaceth", "mac_clk_rx",
-			      "mac_clk_tx", "clk_mac_refout",
-			      "aclk_mac", "pclk_mac",
-			      "clk_mac_speed", "ptp_ref";
-		resets = <&cru SRST_A_GMAC1>;
-		reset-names = "stmmaceth";
-		rockchip,grf = <&grf>;
-		snps,axi-config = <&gmac1_stmmac_axi_setup>;
-		snps,mixed-burst;
-		snps,mtl-rx-config = <&gmac1_mtl_rx_setup>;
-		snps,mtl-tx-config = <&gmac1_mtl_tx_setup>;
-		snps,tso;
-		status = "disabled";
-
-		mdio1: mdio {
-			compatible = "snps,dwmac-mdio";
-			#address-cells = <0x1>;
-			#size-cells = <0x0>;
-		};
-
-		gmac1_stmmac_axi_setup: stmmac-axi-config {
-			snps,blen = <0 0 0 0 16 8 4>;
-			snps,rd_osr_lmt = <8>;
-			snps,wr_osr_lmt = <4>;
-		};
-
-		gmac1_mtl_rx_setup: rx-queues-config {
-			snps,rx-queues-to-use = <1>;
-			queue0 {};
-		};
-
-		gmac1_mtl_tx_setup: tx-queues-config {
-			snps,tx-queues-to-use = <1>;
-			queue0 {};
-		};
-	};
-
-	vop: vop@fe040000 {
-		reg = <0x0 0xfe040000 0x0 0x3000>, <0x0 0xfe044000 0x0 0x1000>;
-		reg-names = "vop", "gamma-lut";
-		interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>, <&cru DCLK_VOP0>,
-			 <&cru DCLK_VOP1>, <&cru DCLK_VOP2>;
-		clock-names = "aclk", "hclk", "dclk_vp0", "dclk_vp1", "dclk_vp2";
-		iommus = <&vop_mmu>;
-		power-domains = <&power RK3568_PD_VO>;
-		rockchip,grf = <&grf>;
-		status = "disabled";
-
-		vop_out: ports {
-			#address-cells = <1>;
-			#size-cells = <0>;
-
-			vp0: port@0 {
-				reg = <0>;
-				#address-cells = <1>;
-				#size-cells = <0>;
-			};
-
-			vp1: port@1 {
-				reg = <1>;
-				#address-cells = <1>;
-				#size-cells = <0>;
-			};
-
-			vp2: port@2 {
-				reg = <2>;
-				#address-cells = <1>;
-				#size-cells = <0>;
-			};
-		};
-	};
-
-	vop_mmu: iommu@fe043e00 {
-		compatible = "rockchip,rk3568-iommu";
-		reg = <0x0 0xfe043e00 0x0 0x100>, <0x0 0xfe043f00 0x0 0x100>;
-		interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>;
-		clock-names = "aclk", "iface";
-		#iommu-cells = <0>;
-		status = "disabled";
-	};
-
-	dsi0: dsi@fe060000 {
-		compatible = "rockchip,rk3568-mipi-dsi", "snps,dw-mipi-dsi";
-		reg = <0x00 0xfe060000 0x00 0x10000>;
-		interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
-		clock-names = "pclk";
-		clocks = <&cru PCLK_DSITX_0>;
-		phy-names = "dphy";
-		phys = <&dsi_dphy0>;
-		power-domains = <&power RK3568_PD_VO>;
-		reset-names = "apb";
-		resets = <&cru SRST_P_DSITX_0>;
-		rockchip,grf = <&grf>;
-		status = "disabled";
-
-		ports {
-			#address-cells = <1>;
-			#size-cells = <0>;
-
-			dsi0_in: port@0 {
-				reg = <0>;
-			};
-
-			dsi0_out: port@1 {
-				reg = <1>;
-			};
-		};
-	};
-
-	dsi1: dsi@fe070000 {
-		compatible = "rockchip,rk3568-mipi-dsi", "snps,dw-mipi-dsi";
-		reg = <0x0 0xfe070000 0x0 0x10000>;
-		interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
-		clock-names = "pclk";
-		clocks = <&cru PCLK_DSITX_1>;
-		phy-names = "dphy";
-		phys = <&dsi_dphy1>;
-		power-domains = <&power RK3568_PD_VO>;
-		reset-names = "apb";
-		resets = <&cru SRST_P_DSITX_1>;
-		rockchip,grf = <&grf>;
-		status = "disabled";
-
-		ports {
-			#address-cells = <1>;
-			#size-cells = <0>;
-
-			dsi1_in: port@0 {
-				reg = <0>;
-			};
-
-			dsi1_out: port@1 {
-				reg = <1>;
-			};
-		};
-	};
-
-	hdmi: hdmi@fe0a0000 {
-		compatible = "rockchip,rk3568-dw-hdmi";
-		reg = <0x0 0xfe0a0000 0x0 0x20000>;
-		interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru PCLK_HDMI_HOST>,
-			 <&cru CLK_HDMI_SFR>,
-			 <&cru CLK_HDMI_CEC>,
-			 <&pmucru CLK_HDMI_REF>,
-			 <&cru HCLK_VO>;
-		clock-names = "iahb", "isfr", "cec", "ref";
-		pinctrl-names = "default";
-		pinctrl-0 = <&hdmitx_scl &hdmitx_sda &hdmitxm0_cec>;
-		power-domains = <&power RK3568_PD_VO>;
-		reg-io-width = <4>;
-		rockchip,grf = <&grf>;
-		#sound-dai-cells = <0>;
-		status = "disabled";
-
-		ports {
-			#address-cells = <1>;
-			#size-cells = <0>;
-
-			hdmi_in: port@0 {
-				reg = <0>;
-			};
-
-			hdmi_out: port@1 {
-				reg = <1>;
-			};
-		};
-	};
-
-	qos_gpu: qos@fe128000 {
-		compatible = "rockchip,rk3568-qos", "syscon";
-		reg = <0x0 0xfe128000 0x0 0x20>;
-	};
-
-	qos_rkvenc_rd_m0: qos@fe138080 {
-		compatible = "rockchip,rk3568-qos", "syscon";
-		reg = <0x0 0xfe138080 0x0 0x20>;
-	};
-
-	qos_rkvenc_rd_m1: qos@fe138100 {
-		compatible = "rockchip,rk3568-qos", "syscon";
-		reg = <0x0 0xfe138100 0x0 0x20>;
-	};
-
-	qos_rkvenc_wr_m0: qos@fe138180 {
-		compatible = "rockchip,rk3568-qos", "syscon";
-		reg = <0x0 0xfe138180 0x0 0x20>;
-	};
-
-	qos_isp: qos@fe148000 {
-		compatible = "rockchip,rk3568-qos", "syscon";
-		reg = <0x0 0xfe148000 0x0 0x20>;
-	};
-
-	qos_vicap0: qos@fe148080 {
-		compatible = "rockchip,rk3568-qos", "syscon";
-		reg = <0x0 0xfe148080 0x0 0x20>;
-	};
-
-	qos_vicap1: qos@fe148100 {
-		compatible = "rockchip,rk3568-qos", "syscon";
-		reg = <0x0 0xfe148100 0x0 0x20>;
-	};
-
-	qos_vpu: qos@fe150000 {
-		compatible = "rockchip,rk3568-qos", "syscon";
-		reg = <0x0 0xfe150000 0x0 0x20>;
-	};
-
-	qos_ebc: qos@fe158000 {
-		compatible = "rockchip,rk3568-qos", "syscon";
-		reg = <0x0 0xfe158000 0x0 0x20>;
-	};
-
-	qos_iep: qos@fe158100 {
-		compatible = "rockchip,rk3568-qos", "syscon";
-		reg = <0x0 0xfe158100 0x0 0x20>;
-	};
-
-	qos_jpeg_dec: qos@fe158180 {
-		compatible = "rockchip,rk3568-qos", "syscon";
-		reg = <0x0 0xfe158180 0x0 0x20>;
-	};
-
-	qos_jpeg_enc: qos@fe158200 {
-		compatible = "rockchip,rk3568-qos", "syscon";
-		reg = <0x0 0xfe158200 0x0 0x20>;
-	};
-
-	qos_rga_rd: qos@fe158280 {
-		compatible = "rockchip,rk3568-qos", "syscon";
-		reg = <0x0 0xfe158280 0x0 0x20>;
-	};
-
-	qos_rga_wr: qos@fe158300 {
-		compatible = "rockchip,rk3568-qos", "syscon";
-		reg = <0x0 0xfe158300 0x0 0x20>;
-	};
-
-	qos_npu: qos@fe180000 {
-		compatible = "rockchip,rk3568-qos", "syscon";
-		reg = <0x0 0xfe180000 0x0 0x20>;
-	};
-
-	qos_pcie2x1: qos@fe190000 {
-		compatible = "rockchip,rk3568-qos", "syscon";
-		reg = <0x0 0xfe190000 0x0 0x20>;
-	};
-
-	qos_sata1: qos@fe190280 {
-		compatible = "rockchip,rk3568-qos", "syscon";
-		reg = <0x0 0xfe190280 0x0 0x20>;
-	};
-
-	qos_sata2: qos@fe190300 {
-		compatible = "rockchip,rk3568-qos", "syscon";
-		reg = <0x0 0xfe190300 0x0 0x20>;
-	};
-
-	qos_usb3_0: qos@fe190380 {
-		compatible = "rockchip,rk3568-qos", "syscon";
-		reg = <0x0 0xfe190380 0x0 0x20>;
-	};
-
-	qos_usb3_1: qos@fe190400 {
-		compatible = "rockchip,rk3568-qos", "syscon";
-		reg = <0x0 0xfe190400 0x0 0x20>;
-	};
-
-	qos_rkvdec: qos@fe198000 {
-		compatible = "rockchip,rk3568-qos", "syscon";
-		reg = <0x0 0xfe198000 0x0 0x20>;
-	};
-
-	qos_hdcp: qos@fe1a8000 {
-		compatible = "rockchip,rk3568-qos", "syscon";
-		reg = <0x0 0xfe1a8000 0x0 0x20>;
-	};
-
-	qos_vop_m0: qos@fe1a8080 {
-		compatible = "rockchip,rk3568-qos", "syscon";
-		reg = <0x0 0xfe1a8080 0x0 0x20>;
-	};
-
-	qos_vop_m1: qos@fe1a8100 {
-		compatible = "rockchip,rk3568-qos", "syscon";
-		reg = <0x0 0xfe1a8100 0x0 0x20>;
-	};
-
-	dfi: dfi@fe230000 {
-		compatible = "rockchip,rk3568-dfi";
-		reg = <0x00 0xfe230000 0x00 0x400>;
-		interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
-		rockchip,pmu = <&pmugrf>;
-	};
-
-	pcie2x1: pcie@fe260000 {
-		compatible = "rockchip,rk3568-pcie";
-		reg = <0x3 0xc0000000 0x0 0x00400000>,
-		      <0x0 0xfe260000 0x0 0x00010000>,
-		      <0x0 0xf4000000 0x0 0x00100000>;
-		reg-names = "dbi", "apb", "config";
-		interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
-		interrupt-names = "sys", "pmc", "msg", "legacy", "err";
-		bus-range = <0x0 0xf>;
-		clocks = <&cru ACLK_PCIE20_MST>, <&cru ACLK_PCIE20_SLV>,
-			 <&cru ACLK_PCIE20_DBI>, <&cru PCLK_PCIE20>,
-			 <&cru CLK_PCIE20_AUX_NDFT>;
-		clock-names = "aclk_mst", "aclk_slv",
-			      "aclk_dbi", "pclk", "aux";
-		device_type = "pci";
-		#interrupt-cells = <1>;
-		interrupt-map-mask = <0 0 0 7>;
-		interrupt-map = <0 0 0 1 &pcie_intc 0>,
-				<0 0 0 2 &pcie_intc 1>,
-				<0 0 0 3 &pcie_intc 2>,
-				<0 0 0 4 &pcie_intc 3>;
-		linux,pci-domain = <0>;
-		num-ib-windows = <6>;
-		num-ob-windows = <2>;
-		max-link-speed = <2>;
-		msi-map = <0x0 &gic 0x0 0x1000>;
-		num-lanes = <1>;
-		phys = <&combphy2 PHY_TYPE_PCIE>;
-		phy-names = "pcie-phy";
-		power-domains = <&power RK3568_PD_PIPE>;
-		ranges = <0x01000000 0x0 0xf4100000 0x0 0xf4100000 0x0 0x00100000>,
-			 <0x02000000 0x0 0xf4200000 0x0 0xf4200000 0x0 0x01e00000>,
-			 <0x03000000 0x0 0x40000000 0x3 0x00000000 0x0 0x40000000>;
-		resets = <&cru SRST_PCIE20_POWERUP>;
-		reset-names = "pipe";
-		#address-cells = <3>;
-		#size-cells = <2>;
-		status = "disabled";
-
-		pcie_intc: legacy-interrupt-controller {
-			#address-cells = <0>;
-			#interrupt-cells = <1>;
-			interrupt-controller;
-			interrupt-parent = <&gic>;
-			interrupts = <GIC_SPI 72 IRQ_TYPE_EDGE_RISING>;
-		};
-	};
-
-	sdmmc0: mmc@fe2b0000 {
-		compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc";
-		reg = <0x0 0xfe2b0000 0x0 0x4000>;
-		interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru HCLK_SDMMC0>, <&cru CLK_SDMMC0>,
-			 <&cru SCLK_SDMMC0_DRV>, <&cru SCLK_SDMMC0_SAMPLE>;
-		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
-		fifo-depth = <0x100>;
-		max-frequency = <150000000>;
-		resets = <&cru SRST_SDMMC0>;
-		reset-names = "reset";
-		status = "disabled";
-	};
-
-	sdmmc1: mmc@fe2c0000 {
-		compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc";
-		reg = <0x0 0xfe2c0000 0x0 0x4000>;
-		interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru HCLK_SDMMC1>, <&cru CLK_SDMMC1>,
-			 <&cru SCLK_SDMMC1_DRV>, <&cru SCLK_SDMMC1_SAMPLE>;
-		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
-		fifo-depth = <0x100>;
-		max-frequency = <150000000>;
-		resets = <&cru SRST_SDMMC1>;
-		reset-names = "reset";
-		status = "disabled";
-	};
-
-	sfc: spi@fe300000 {
-		compatible = "rockchip,sfc";
-		reg = <0x0 0xfe300000 0x0 0x4000>;
-		interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
-		clock-names = "clk_sfc", "hclk_sfc";
-		pinctrl-0 = <&fspi_pins>;
-		pinctrl-names = "default";
-		status = "disabled";
-	};
-
-	sdhci: mmc@fe310000 {
-		compatible = "rockchip,rk3568-dwcmshc";
-		reg = <0x0 0xfe310000 0x0 0x10000>;
-		interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
-		assigned-clocks = <&cru BCLK_EMMC>, <&cru TCLK_EMMC>;
-		assigned-clock-rates = <200000000>, <24000000>;
-		clocks = <&cru CCLK_EMMC>, <&cru HCLK_EMMC>,
-			 <&cru ACLK_EMMC>, <&cru BCLK_EMMC>,
-			 <&cru TCLK_EMMC>;
-		clock-names = "core", "bus", "axi", "block", "timer";
-		status = "disabled";
-	};
-
-	i2s0_8ch: i2s@fe400000 {
-		compatible = "rockchip,rk3568-i2s-tdm";
-		reg = <0x0 0xfe400000 0x0 0x1000>;
-		interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
-		assigned-clocks = <&cru CLK_I2S0_8CH_TX_SRC>, <&cru CLK_I2S0_8CH_RX_SRC>;
-		assigned-clock-rates = <1188000000>, <1188000000>;
-		clocks = <&cru MCLK_I2S0_8CH_TX>, <&cru MCLK_I2S0_8CH_RX>, <&cru HCLK_I2S0_8CH>;
-		clock-names = "mclk_tx", "mclk_rx", "hclk";
-		dmas = <&dmac1 0>;
-		dma-names = "tx";
-		resets = <&cru SRST_M_I2S0_8CH_TX>, <&cru SRST_M_I2S0_8CH_RX>;
-		reset-names = "tx-m", "rx-m";
-		rockchip,grf = <&grf>;
-		#sound-dai-cells = <0>;
-		status = "disabled";
-	};
-
-	i2s1_8ch: i2s@fe410000 {
-		compatible = "rockchip,rk3568-i2s-tdm";
-		reg = <0x0 0xfe410000 0x0 0x1000>;
-		interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
-		assigned-clocks = <&cru CLK_I2S1_8CH_TX_SRC>, <&cru CLK_I2S1_8CH_RX_SRC>;
-		assigned-clock-rates = <1188000000>, <1188000000>;
-		clocks = <&cru MCLK_I2S1_8CH_TX>, <&cru MCLK_I2S1_8CH_RX>,
-			 <&cru HCLK_I2S1_8CH>;
-		clock-names = "mclk_tx", "mclk_rx", "hclk";
-		dmas = <&dmac1 3>, <&dmac1 2>;
-		dma-names = "rx", "tx";
-		resets = <&cru SRST_M_I2S1_8CH_TX>, <&cru SRST_M_I2S1_8CH_RX>;
-		reset-names = "tx-m", "rx-m";
-		rockchip,grf = <&grf>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&i2s1m0_sclktx &i2s1m0_sclkrx
-			     &i2s1m0_lrcktx &i2s1m0_lrckrx
-			     &i2s1m0_sdi0   &i2s1m0_sdi1
-			     &i2s1m0_sdi2   &i2s1m0_sdi3
-			     &i2s1m0_sdo0   &i2s1m0_sdo1
-			     &i2s1m0_sdo2   &i2s1m0_sdo3>;
-		#sound-dai-cells = <0>;
-		status = "disabled";
-	};
-
-	i2s2_2ch: i2s@fe420000 {
-		compatible = "rockchip,rk3568-i2s-tdm";
-		reg = <0x0 0xfe420000 0x0 0x1000>;
-		interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
-		assigned-clocks = <&cru CLK_I2S2_2CH_SRC>;
-		assigned-clock-rates = <1188000000>;
-		clocks = <&cru MCLK_I2S2_2CH>, <&cru MCLK_I2S2_2CH>, <&cru HCLK_I2S2_2CH>;
-		clock-names = "mclk_tx", "mclk_rx", "hclk";
-		dmas = <&dmac1 4>, <&dmac1 5>;
-		dma-names = "tx", "rx";
-		resets = <&cru SRST_M_I2S2_2CH>;
-		reset-names = "m";
-		rockchip,grf = <&grf>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&i2s2m0_sclktx
-				&i2s2m0_lrcktx
-				&i2s2m0_sdi
-				&i2s2m0_sdo>;
-		#sound-dai-cells = <0>;
-		status = "disabled";
-	};
-
-	i2s3_2ch: i2s@fe430000 {
-		compatible = "rockchip,rk3568-i2s-tdm";
-		reg = <0x0 0xfe430000 0x0 0x1000>;
-		interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru MCLK_I2S3_2CH_TX>, <&cru MCLK_I2S3_2CH_RX>,
-			 <&cru HCLK_I2S3_2CH>;
-		clock-names = "mclk_tx", "mclk_rx", "hclk";
-		dmas = <&dmac1 6>, <&dmac1 7>;
-		dma-names = "tx", "rx";
-		resets = <&cru SRST_M_I2S3_2CH_TX>, <&cru SRST_M_I2S3_2CH_RX>;
-		reset-names = "tx-m", "rx-m";
-		rockchip,grf = <&grf>;
-		#sound-dai-cells = <0>;
-		status = "disabled";
-	};
-
-	pdm: pdm@fe440000 {
-		compatible = "rockchip,rk3568-pdm";
-		reg = <0x0 0xfe440000 0x0 0x1000>;
-		interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru MCLK_PDM>, <&cru HCLK_PDM>;
-		clock-names = "pdm_clk", "pdm_hclk";
-		dmas = <&dmac1 9>;
-		dma-names = "rx";
-		pinctrl-0 = <&pdmm0_clk
-			     &pdmm0_clk1
-			     &pdmm0_sdi0
-			     &pdmm0_sdi1
-			     &pdmm0_sdi2
-			     &pdmm0_sdi3>;
-		pinctrl-names = "default";
-		resets = <&cru SRST_M_PDM>;
-		reset-names = "pdm-m";
-		#sound-dai-cells = <0>;
-		status = "disabled";
-	};
-
-	spdif: spdif@fe460000 {
-		compatible = "rockchip,rk3568-spdif";
-		reg = <0x0 0xfe460000 0x0 0x1000>;
-		interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
-		clock-names = "mclk", "hclk";
-		clocks = <&cru MCLK_SPDIF_8CH>, <&cru HCLK_SPDIF_8CH>;
-		dmas = <&dmac1 1>;
-		dma-names = "tx";
-		pinctrl-names = "default";
-		pinctrl-0 = <&spdifm0_tx>;
-		#sound-dai-cells = <0>;
-		status = "disabled";
-	};
-
-	dmac0: dma-controller@fe530000 {
-		compatible = "arm,pl330", "arm,primecell";
-		reg = <0x0 0xfe530000 0x0 0x4000>;
-		interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
-		arm,pl330-periph-burst;
-		clocks = <&cru ACLK_BUS>;
-		clock-names = "apb_pclk";
-		#dma-cells = <1>;
-	};
-
-	dmac1: dma-controller@fe550000 {
-		compatible = "arm,pl330", "arm,primecell";
-		reg = <0x0 0xfe550000 0x0 0x4000>;
-		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
-		arm,pl330-periph-burst;
-		clocks = <&cru ACLK_BUS>;
-		clock-names = "apb_pclk";
-		#dma-cells = <1>;
-	};
-
-	i2c1: i2c@fe5a0000 {
-		compatible = "rockchip,rk3568-i2c", "rockchip,rk3399-i2c";
-		reg = <0x0 0xfe5a0000 0x0 0x1000>;
-		interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru CLK_I2C1>, <&cru PCLK_I2C1>;
-		clock-names = "i2c", "pclk";
-		pinctrl-0 = <&i2c1_xfer>;
-		pinctrl-names = "default";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		status = "disabled";
-	};
-
-	i2c2: i2c@fe5b0000 {
-		compatible = "rockchip,rk3568-i2c", "rockchip,rk3399-i2c";
-		reg = <0x0 0xfe5b0000 0x0 0x1000>;
-		interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru CLK_I2C2>, <&cru PCLK_I2C2>;
-		clock-names = "i2c", "pclk";
-		pinctrl-0 = <&i2c2m0_xfer>;
-		pinctrl-names = "default";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		status = "disabled";
-	};
-
-	i2c3: i2c@fe5c0000 {
-		compatible = "rockchip,rk3568-i2c", "rockchip,rk3399-i2c";
-		reg = <0x0 0xfe5c0000 0x0 0x1000>;
-		interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru CLK_I2C3>, <&cru PCLK_I2C3>;
-		clock-names = "i2c", "pclk";
-		pinctrl-0 = <&i2c3m0_xfer>;
-		pinctrl-names = "default";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		status = "disabled";
-	};
-
-	i2c4: i2c@fe5d0000 {
-		compatible = "rockchip,rk3568-i2c", "rockchip,rk3399-i2c";
-		reg = <0x0 0xfe5d0000 0x0 0x1000>;
-		interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru CLK_I2C4>, <&cru PCLK_I2C4>;
-		clock-names = "i2c", "pclk";
-		pinctrl-0 = <&i2c4m0_xfer>;
-		pinctrl-names = "default";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		status = "disabled";
-	};
-
-	i2c5: i2c@fe5e0000 {
-		compatible = "rockchip,rk3568-i2c", "rockchip,rk3399-i2c";
-		reg = <0x0 0xfe5e0000 0x0 0x1000>;
-		interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru CLK_I2C5>, <&cru PCLK_I2C5>;
-		clock-names = "i2c", "pclk";
-		pinctrl-0 = <&i2c5m0_xfer>;
-		pinctrl-names = "default";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		status = "disabled";
-	};
-
-	wdt: watchdog@fe600000 {
-		compatible = "rockchip,rk3568-wdt", "snps,dw-wdt";
-		reg = <0x0 0xfe600000 0x0 0x100>;
-		interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru TCLK_WDT_NS>, <&cru PCLK_WDT_NS>;
-		clock-names = "tclk", "pclk";
-	};
-
-	spi0: spi@fe610000 {
-		compatible = "rockchip,rk3568-spi", "rockchip,rk3066-spi";
-		reg = <0x0 0xfe610000 0x0 0x1000>;
-		interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru CLK_SPI0>, <&cru PCLK_SPI0>;
-		clock-names = "spiclk", "apb_pclk";
-		dmas = <&dmac0 20>, <&dmac0 21>;
-		dma-names = "tx", "rx";
-		pinctrl-names = "default";
-		pinctrl-0 = <&spi0m0_cs0 &spi0m0_cs1 &spi0m0_pins>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-		status = "disabled";
-	};
-
-	spi1: spi@fe620000 {
-		compatible = "rockchip,rk3568-spi", "rockchip,rk3066-spi";
-		reg = <0x0 0xfe620000 0x0 0x1000>;
-		interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru CLK_SPI1>, <&cru PCLK_SPI1>;
-		clock-names = "spiclk", "apb_pclk";
-		dmas = <&dmac0 22>, <&dmac0 23>;
-		dma-names = "tx", "rx";
-		pinctrl-names = "default";
-		pinctrl-0 = <&spi1m0_cs0 &spi1m0_cs1 &spi1m0_pins>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-		status = "disabled";
-	};
-
-	spi2: spi@fe630000 {
-		compatible = "rockchip,rk3568-spi", "rockchip,rk3066-spi";
-		reg = <0x0 0xfe630000 0x0 0x1000>;
-		interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru CLK_SPI2>, <&cru PCLK_SPI2>;
-		clock-names = "spiclk", "apb_pclk";
-		dmas = <&dmac0 24>, <&dmac0 25>;
-		dma-names = "tx", "rx";
-		pinctrl-names = "default";
-		pinctrl-0 = <&spi2m0_cs0 &spi2m0_cs1 &spi2m0_pins>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-		status = "disabled";
-	};
-
-	spi3: spi@fe640000 {
-		compatible = "rockchip,rk3568-spi", "rockchip,rk3066-spi";
-		reg = <0x0 0xfe640000 0x0 0x1000>;
-		interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru CLK_SPI3>, <&cru PCLK_SPI3>;
-		clock-names = "spiclk", "apb_pclk";
-		dmas = <&dmac0 26>, <&dmac0 27>;
-		dma-names = "tx", "rx";
-		pinctrl-names = "default";
-		pinctrl-0 = <&spi3m0_cs0 &spi3m0_cs1 &spi3m0_pins>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-		status = "disabled";
-	};
-
-	uart1: serial@fe650000 {
-		compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart";
-		reg = <0x0 0xfe650000 0x0 0x100>;
-		interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
-		clock-names = "baudclk", "apb_pclk";
-		dmas = <&dmac0 2>, <&dmac0 3>;
-		pinctrl-0 = <&uart1m0_xfer>;
-		pinctrl-names = "default";
-		reg-io-width = <4>;
-		reg-shift = <2>;
-		status = "disabled";
-	};
-
-	uart2: serial@fe660000 {
-		compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart";
-		reg = <0x0 0xfe660000 0x0 0x100>;
-		interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
-		clock-names = "baudclk", "apb_pclk";
-		dmas = <&dmac0 4>, <&dmac0 5>;
-		pinctrl-0 = <&uart2m0_xfer>;
-		pinctrl-names = "default";
-		reg-io-width = <4>;
-		reg-shift = <2>;
-		status = "disabled";
-	};
-
-	uart3: serial@fe670000 {
-		compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart";
-		reg = <0x0 0xfe670000 0x0 0x100>;
-		interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>;
-		clock-names = "baudclk", "apb_pclk";
-		dmas = <&dmac0 6>, <&dmac0 7>;
-		pinctrl-0 = <&uart3m0_xfer>;
-		pinctrl-names = "default";
-		reg-io-width = <4>;
-		reg-shift = <2>;
-		status = "disabled";
-	};
-
-	uart4: serial@fe680000 {
-		compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart";
-		reg = <0x0 0xfe680000 0x0 0x100>;
-		interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
-		clock-names = "baudclk", "apb_pclk";
-		dmas = <&dmac0 8>, <&dmac0 9>;
-		pinctrl-0 = <&uart4m0_xfer>;
-		pinctrl-names = "default";
-		reg-io-width = <4>;
-		reg-shift = <2>;
-		status = "disabled";
-	};
-
-	uart5: serial@fe690000 {
-		compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart";
-		reg = <0x0 0xfe690000 0x0 0x100>;
-		interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru SCLK_UART5>, <&cru PCLK_UART5>;
-		clock-names = "baudclk", "apb_pclk";
-		dmas = <&dmac0 10>, <&dmac0 11>;
-		pinctrl-0 = <&uart5m0_xfer>;
-		pinctrl-names = "default";
-		reg-io-width = <4>;
-		reg-shift = <2>;
-		status = "disabled";
-	};
-
-	uart6: serial@fe6a0000 {
-		compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart";
-		reg = <0x0 0xfe6a0000 0x0 0x100>;
-		interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru SCLK_UART6>, <&cru PCLK_UART6>;
-		clock-names = "baudclk", "apb_pclk";
-		dmas = <&dmac0 12>, <&dmac0 13>;
-		pinctrl-0 = <&uart6m0_xfer>;
-		pinctrl-names = "default";
-		reg-io-width = <4>;
-		reg-shift = <2>;
-		status = "disabled";
-	};
-
-	uart7: serial@fe6b0000 {
-		compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart";
-		reg = <0x0 0xfe6b0000 0x0 0x100>;
-		interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru SCLK_UART7>, <&cru PCLK_UART7>;
-		clock-names = "baudclk", "apb_pclk";
-		dmas = <&dmac0 14>, <&dmac0 15>;
-		pinctrl-0 = <&uart7m0_xfer>;
-		pinctrl-names = "default";
-		reg-io-width = <4>;
-		reg-shift = <2>;
-		status = "disabled";
-	};
-
-	uart8: serial@fe6c0000 {
-		compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart";
-		reg = <0x0 0xfe6c0000 0x0 0x100>;
-		interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru SCLK_UART8>, <&cru PCLK_UART8>;
-		clock-names = "baudclk", "apb_pclk";
-		dmas = <&dmac0 16>, <&dmac0 17>;
-		pinctrl-0 = <&uart8m0_xfer>;
-		pinctrl-names = "default";
-		reg-io-width = <4>;
-		reg-shift = <2>;
-		status = "disabled";
-	};
-
-	uart9: serial@fe6d0000 {
-		compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart";
-		reg = <0x0 0xfe6d0000 0x0 0x100>;
-		interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru SCLK_UART9>, <&cru PCLK_UART9>;
-		clock-names = "baudclk", "apb_pclk";
-		dmas = <&dmac0 18>, <&dmac0 19>;
-		pinctrl-0 = <&uart9m0_xfer>;
-		pinctrl-names = "default";
-		reg-io-width = <4>;
-		reg-shift = <2>;
-		status = "disabled";
-	};
-
-	thermal_zones: thermal-zones {
-		cpu_thermal: cpu-thermal {
-			polling-delay-passive = <100>;
-			polling-delay = <1000>;
-
-			thermal-sensors = <&tsadc 0>;
-
-			trips {
-				cpu_alert0: cpu_alert0 {
-					temperature = <70000>;
-					hysteresis = <2000>;
-					type = "passive";
-				};
-				cpu_alert1: cpu_alert1 {
-					temperature = <75000>;
-					hysteresis = <2000>;
-					type = "passive";
-				};
-				cpu_crit: cpu_crit {
-					temperature = <95000>;
-					hysteresis = <2000>;
-					type = "critical";
-				};
-			};
-
-			cooling-maps {
-				map0 {
-					trip = <&cpu_alert0>;
-					cooling-device =
-						<&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-						<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-						<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-						<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-				};
-			};
-		};
-
-		gpu_thermal: gpu-thermal {
-			polling-delay-passive = <20>; /* milliseconds */
-			polling-delay = <1000>; /* milliseconds */
-
-			thermal-sensors = <&tsadc 1>;
-
-			trips {
-				gpu_threshold: gpu-threshold {
-					temperature = <70000>;
-					hysteresis = <2000>;
-					type = "passive";
-				};
-				gpu_target: gpu-target {
-					temperature = <75000>;
-					hysteresis = <2000>;
-					type = "passive";
-				};
-				gpu_crit: gpu-crit {
-					temperature = <95000>;
-					hysteresis = <2000>;
-					type = "critical";
-				};
-			};
-
-			cooling-maps {
-				map0 {
-					trip = <&gpu_target>;
-					cooling-device =
-						<&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-				};
-			};
-		};
-	};
-
-	tsadc: tsadc@fe710000 {
-		compatible = "rockchip,rk3568-tsadc";
-		reg = <0x0 0xfe710000 0x0 0x100>;
-		interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
-		assigned-clocks = <&cru CLK_TSADC_TSEN>, <&cru CLK_TSADC>;
-		assigned-clock-rates = <17000000>, <700000>;
-		clocks = <&cru CLK_TSADC>, <&cru PCLK_TSADC>;
-		clock-names = "tsadc", "apb_pclk";
-		resets = <&cru SRST_P_TSADC>, <&cru SRST_TSADC>,
-			 <&cru SRST_TSADCPHY>;
-		rockchip,grf = <&grf>;
-		rockchip,hw-tshut-temp = <95000>;
-		pinctrl-names = "init", "default", "sleep";
-		pinctrl-0 = <&tsadc_pin>;
-		pinctrl-1 = <&tsadc_shutorg>;
-		pinctrl-2 = <&tsadc_pin>;
-		#thermal-sensor-cells = <1>;
-		status = "disabled";
-	};
-
-	saradc: saradc@fe720000 {
-		compatible = "rockchip,rk3568-saradc", "rockchip,rk3399-saradc";
-		reg = <0x0 0xfe720000 0x0 0x100>;
-		interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru CLK_SARADC>, <&cru PCLK_SARADC>;
-		clock-names = "saradc", "apb_pclk";
-		resets = <&cru SRST_P_SARADC>;
-		reset-names = "saradc-apb";
-		#io-channel-cells = <1>;
-		status = "disabled";
-	};
-
-	pwm4: pwm@fe6e0000 {
-		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
-		reg = <0x0 0xfe6e0000 0x0 0x10>;
-		clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
-		clock-names = "pwm", "pclk";
-		pinctrl-0 = <&pwm4_pins>;
-		pinctrl-names = "default";
-		#pwm-cells = <3>;
-		status = "disabled";
-	};
-
-	pwm5: pwm@fe6e0010 {
-		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
-		reg = <0x0 0xfe6e0010 0x0 0x10>;
-		clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
-		clock-names = "pwm", "pclk";
-		pinctrl-0 = <&pwm5_pins>;
-		pinctrl-names = "default";
-		#pwm-cells = <3>;
-		status = "disabled";
-	};
-
-	pwm6: pwm@fe6e0020 {
-		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
-		reg = <0x0 0xfe6e0020 0x0 0x10>;
-		clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
-		clock-names = "pwm", "pclk";
-		pinctrl-0 = <&pwm6_pins>;
-		pinctrl-names = "default";
-		#pwm-cells = <3>;
-		status = "disabled";
-	};
-
-	pwm7: pwm@fe6e0030 {
-		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
-		reg = <0x0 0xfe6e0030 0x0 0x10>;
-		clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
-		clock-names = "pwm", "pclk";
-		pinctrl-0 = <&pwm7_pins>;
-		pinctrl-names = "default";
-		#pwm-cells = <3>;
-		status = "disabled";
-	};
-
-	pwm8: pwm@fe6f0000 {
-		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
-		reg = <0x0 0xfe6f0000 0x0 0x10>;
-		clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>;
-		clock-names = "pwm", "pclk";
-		pinctrl-0 = <&pwm8m0_pins>;
-		pinctrl-names = "default";
-		#pwm-cells = <3>;
-		status = "disabled";
-	};
-
-	pwm9: pwm@fe6f0010 {
-		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
-		reg = <0x0 0xfe6f0010 0x0 0x10>;
-		clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>;
-		clock-names = "pwm", "pclk";
-		pinctrl-0 = <&pwm9m0_pins>;
-		pinctrl-names = "default";
-		#pwm-cells = <3>;
-		status = "disabled";
-	};
-
-	pwm10: pwm@fe6f0020 {
-		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
-		reg = <0x0 0xfe6f0020 0x0 0x10>;
-		clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>;
-		clock-names = "pwm", "pclk";
-		pinctrl-0 = <&pwm10m0_pins>;
-		pinctrl-names = "default";
-		#pwm-cells = <3>;
-		status = "disabled";
-	};
-
-	pwm11: pwm@fe6f0030 {
-		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
-		reg = <0x0 0xfe6f0030 0x0 0x10>;
-		clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>;
-		clock-names = "pwm", "pclk";
-		pinctrl-0 = <&pwm11m0_pins>;
-		pinctrl-names = "default";
-		#pwm-cells = <3>;
-		status = "disabled";
-	};
-
-	pwm12: pwm@fe700000 {
-		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
-		reg = <0x0 0xfe700000 0x0 0x10>;
-		clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>;
-		clock-names = "pwm", "pclk";
-		pinctrl-0 = <&pwm12m0_pins>;
-		pinctrl-names = "default";
-		#pwm-cells = <3>;
-		status = "disabled";
-	};
-
-	pwm13: pwm@fe700010 {
-		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
-		reg = <0x0 0xfe700010 0x0 0x10>;
-		clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>;
-		clock-names = "pwm", "pclk";
-		pinctrl-0 = <&pwm13m0_pins>;
-		pinctrl-names = "default";
-		#pwm-cells = <3>;
-		status = "disabled";
-	};
-
-	pwm14: pwm@fe700020 {
-		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
-		reg = <0x0 0xfe700020 0x0 0x10>;
-		clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>;
-		clock-names = "pwm", "pclk";
-		pinctrl-0 = <&pwm14m0_pins>;
-		pinctrl-names = "default";
-		#pwm-cells = <3>;
-		status = "disabled";
-	};
-
-	pwm15: pwm@fe700030 {
-		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
-		reg = <0x0 0xfe700030 0x0 0x10>;
-		clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>;
-		clock-names = "pwm", "pclk";
-		pinctrl-0 = <&pwm15m0_pins>;
-		pinctrl-names = "default";
-		#pwm-cells = <3>;
-		status = "disabled";
-	};
-
-	combphy1: phy@fe830000 {
-		compatible = "rockchip,rk3568-naneng-combphy";
-		reg = <0x0 0xfe830000 0x0 0x100>;
-		clocks = <&pmucru CLK_PCIEPHY1_REF>,
-			 <&cru PCLK_PIPEPHY1>,
-			 <&cru PCLK_PIPE>;
-		clock-names = "ref", "apb", "pipe";
-		assigned-clocks = <&pmucru CLK_PCIEPHY1_REF>;
-		assigned-clock-rates = <100000000>;
-		resets = <&cru SRST_PIPEPHY1>;
-		rockchip,pipe-grf = <&pipegrf>;
-		rockchip,pipe-phy-grf = <&pipe_phy_grf1>;
-		#phy-cells = <1>;
-		status = "disabled";
-	};
-
-	combphy2: phy@fe840000 {
-		compatible = "rockchip,rk3568-naneng-combphy";
-		reg = <0x0 0xfe840000 0x0 0x100>;
-		clocks = <&pmucru CLK_PCIEPHY2_REF>,
-			 <&cru PCLK_PIPEPHY2>,
-			 <&cru PCLK_PIPE>;
-		clock-names = "ref", "apb", "pipe";
-		assigned-clocks = <&pmucru CLK_PCIEPHY2_REF>;
-		assigned-clock-rates = <100000000>;
-		resets = <&cru SRST_PIPEPHY2>;
-		rockchip,pipe-grf = <&pipegrf>;
-		rockchip,pipe-phy-grf = <&pipe_phy_grf2>;
-		#phy-cells = <1>;
-		status = "disabled";
-	};
-
-	csi_dphy: phy@fe870000 {
-		compatible = "rockchip,rk3568-csi-dphy";
-		reg = <0x0 0xfe870000 0x0 0x10000>;
-		clocks = <&cru PCLK_MIPICSIPHY>;
-		clock-names = "pclk";
-		#phy-cells = <0>;
-		resets = <&cru SRST_P_MIPICSIPHY>;
-		reset-names = "apb";
-		rockchip,grf = <&grf>;
-		status = "disabled";
-	};
-
-	dsi_dphy0: mipi-dphy@fe850000 {
-		compatible = "rockchip,rk3568-dsi-dphy";
-		reg = <0x0 0xfe850000 0x0 0x10000>;
-		clock-names = "ref", "pclk";
-		clocks = <&pmucru CLK_MIPIDSIPHY0_REF>, <&cru PCLK_MIPIDSIPHY0>;
-		#phy-cells = <0>;
-		power-domains = <&power RK3568_PD_VO>;
-		reset-names = "apb";
-		resets = <&cru SRST_P_MIPIDSIPHY0>;
-		status = "disabled";
-	};
-
-	dsi_dphy1: mipi-dphy@fe860000 {
-		compatible = "rockchip,rk3568-dsi-dphy";
-		reg = <0x0 0xfe860000 0x0 0x10000>;
-		clock-names = "ref", "pclk";
-		clocks = <&pmucru CLK_MIPIDSIPHY1_REF>, <&cru PCLK_MIPIDSIPHY1>;
-		#phy-cells = <0>;
-		power-domains = <&power RK3568_PD_VO>;
-		reset-names = "apb";
-		resets = <&cru SRST_P_MIPIDSIPHY1>;
-		status = "disabled";
-	};
-
-	usb2phy0: usb2phy@fe8a0000 {
-		compatible = "rockchip,rk3568-usb2phy";
-		reg = <0x0 0xfe8a0000 0x0 0x10000>;
-		clocks = <&pmucru CLK_USBPHY0_REF>;
-		clock-names = "phyclk";
-		clock-output-names = "clk_usbphy0_480m";
-		interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
-		rockchip,usbgrf = <&usb2phy0_grf>;
-		#clock-cells = <0>;
-		status = "disabled";
-
-		usb2phy0_host: host-port {
-			#phy-cells = <0>;
-			status = "disabled";
-		};
-
-		usb2phy0_otg: otg-port {
-			#phy-cells = <0>;
-			status = "disabled";
-		};
-	};
-
-	usb2phy1: usb2phy@fe8b0000 {
-		compatible = "rockchip,rk3568-usb2phy";
-		reg = <0x0 0xfe8b0000 0x0 0x10000>;
-		clocks = <&pmucru CLK_USBPHY1_REF>;
-		clock-names = "phyclk";
-		clock-output-names = "clk_usbphy1_480m";
-		interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
-		rockchip,usbgrf = <&usb2phy1_grf>;
-		#clock-cells = <0>;
-		status = "disabled";
-
-		usb2phy1_host: host-port {
-			#phy-cells = <0>;
-			status = "disabled";
-		};
-
-		usb2phy1_otg: otg-port {
-			#phy-cells = <0>;
-			status = "disabled";
-		};
-	};
-
-	pinctrl: pinctrl {
-		compatible = "rockchip,rk3568-pinctrl";
-		rockchip,grf = <&grf>;
-		rockchip,pmu = <&pmugrf>;
-		#address-cells = <2>;
-		#size-cells = <2>;
-		ranges;
-
-		gpio0: gpio@fdd60000 {
-			compatible = "rockchip,gpio-bank";
-			reg = <0x0 0xfdd60000 0x0 0x100>;
-			interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&pmucru PCLK_GPIO0>, <&pmucru DBCLK_GPIO0>;
-			gpio-controller;
-			gpio-ranges = <&pinctrl 0 0 32>;
-			#gpio-cells = <2>;
-			interrupt-controller;
-			#interrupt-cells = <2>;
-		};
-
-		gpio1: gpio@fe740000 {
-			compatible = "rockchip,gpio-bank";
-			reg = <0x0 0xfe740000 0x0 0x100>;
-			interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>;
-			gpio-controller;
-			gpio-ranges = <&pinctrl 0 32 32>;
-			#gpio-cells = <2>;
-			interrupt-controller;
-			#interrupt-cells = <2>;
-		};
-
-		gpio2: gpio@fe750000 {
-			compatible = "rockchip,gpio-bank";
-			reg = <0x0 0xfe750000 0x0 0x100>;
-			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>;
-			gpio-controller;
-			gpio-ranges = <&pinctrl 0 64 32>;
-			#gpio-cells = <2>;
-			interrupt-controller;
-			#interrupt-cells = <2>;
-		};
-
-		gpio3: gpio@fe760000 {
-			compatible = "rockchip,gpio-bank";
-			reg = <0x0 0xfe760000 0x0 0x100>;
-			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>;
-			gpio-controller;
-			gpio-ranges = <&pinctrl 0 96 32>;
-			#gpio-cells = <2>;
-			interrupt-controller;
-			#interrupt-cells = <2>;
-		};
-
-		gpio4: gpio@fe770000 {
-			compatible = "rockchip,gpio-bank";
-			reg = <0x0 0xfe770000 0x0 0x100>;
-			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>;
-			gpio-controller;
-			gpio-ranges = <&pinctrl 0 128 32>;
-			#gpio-cells = <2>;
-			interrupt-controller;
-			#interrupt-cells = <2>;
-		};
-	};
-};
-
-#include "rk3568-pinctrl.dtsi"
diff --git a/include/dt-bindings/clock/rk3568-cru.h b/include/dt-bindings/clock/rk3568-cru.h
deleted file mode 100644
index d29890865150..000000000000
--- a/include/dt-bindings/clock/rk3568-cru.h
+++ /dev/null
@@ -1,926 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (c) 2021 Rockchip Electronics Co. Ltd.
- * Author: Elaine Zhang <zhangqing@rock-chips.com>
- */
-
-#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3568_H
-#define _DT_BINDINGS_CLK_ROCKCHIP_RK3568_H
-
-/* pmucru-clocks indices */
-
-/* pmucru plls */
-#define PLL_PPLL		1
-#define PLL_HPLL		2
-
-/* pmucru clocks */
-#define XIN_OSC0_DIV		4
-#define CLK_RTC_32K		5
-#define CLK_PMU			6
-#define CLK_I2C0		7
-#define CLK_RTC32K_FRAC		8
-#define CLK_UART0_DIV		9
-#define CLK_UART0_FRAC		10
-#define SCLK_UART0		11
-#define DBCLK_GPIO0		12
-#define CLK_PWM0		13
-#define CLK_CAPTURE_PWM0_NDFT	14
-#define CLK_PMUPVTM		15
-#define CLK_CORE_PMUPVTM	16
-#define CLK_REF24M		17
-#define XIN_OSC0_USBPHY0_G	18
-#define CLK_USBPHY0_REF		19
-#define XIN_OSC0_USBPHY1_G	20
-#define CLK_USBPHY1_REF		21
-#define XIN_OSC0_MIPIDSIPHY0_G	22
-#define CLK_MIPIDSIPHY0_REF	23
-#define XIN_OSC0_MIPIDSIPHY1_G	24
-#define CLK_MIPIDSIPHY1_REF	25
-#define CLK_WIFI_DIV		26
-#define CLK_WIFI_OSC0		27
-#define CLK_WIFI		28
-#define CLK_PCIEPHY0_DIV	29
-#define CLK_PCIEPHY0_OSC0	30
-#define CLK_PCIEPHY0_REF	31
-#define CLK_PCIEPHY1_DIV	32
-#define CLK_PCIEPHY1_OSC0	33
-#define CLK_PCIEPHY1_REF	34
-#define CLK_PCIEPHY2_DIV	35
-#define CLK_PCIEPHY2_OSC0	36
-#define CLK_PCIEPHY2_REF	37
-#define CLK_PCIE30PHY_REF_M	38
-#define CLK_PCIE30PHY_REF_N	39
-#define CLK_HDMI_REF		40
-#define XIN_OSC0_EDPPHY_G	41
-#define PCLK_PDPMU		42
-#define PCLK_PMU		43
-#define PCLK_UART0		44
-#define PCLK_I2C0		45
-#define PCLK_GPIO0		46
-#define PCLK_PMUPVTM		47
-#define PCLK_PWM0		48
-#define CLK_PDPMU		49
-#define SCLK_32K_IOE		50
-
-#define CLKPMU_NR_CLKS		(SCLK_32K_IOE + 1)
-
-/* cru-clocks indices */
-
-/* cru plls */
-#define PLL_APLL		1
-#define PLL_DPLL		2
-#define PLL_CPLL		3
-#define PLL_GPLL		4
-#define PLL_VPLL		5
-#define PLL_NPLL		6
-
-/* cru clocks */
-#define CPLL_333M		9
-#define ARMCLK			10
-#define USB480M			11
-#define ACLK_CORE_NIU2BUS	18
-#define CLK_CORE_PVTM		19
-#define CLK_CORE_PVTM_CORE	20
-#define CLK_CORE_PVTPLL		21
-#define CLK_GPU_SRC		22
-#define CLK_GPU_PRE_NDFT	23
-#define CLK_GPU_PRE_MUX		24
-#define ACLK_GPU_PRE		25
-#define PCLK_GPU_PRE		26
-#define CLK_GPU			27
-#define CLK_GPU_NP5		28
-#define PCLK_GPU_PVTM		29
-#define CLK_GPU_PVTM		30
-#define CLK_GPU_PVTM_CORE	31
-#define CLK_GPU_PVTPLL		32
-#define CLK_NPU_SRC		33
-#define CLK_NPU_PRE_NDFT	34
-#define CLK_NPU			35
-#define CLK_NPU_NP5		36
-#define HCLK_NPU_PRE		37
-#define PCLK_NPU_PRE		38
-#define ACLK_NPU_PRE		39
-#define ACLK_NPU		40
-#define HCLK_NPU		41
-#define PCLK_NPU_PVTM		42
-#define CLK_NPU_PVTM		43
-#define CLK_NPU_PVTM_CORE	44
-#define CLK_NPU_PVTPLL		45
-#define CLK_DDRPHY1X_SRC	46
-#define CLK_DDRPHY1X_HWFFC_SRC	47
-#define CLK_DDR1X		48
-#define CLK_MSCH		49
-#define CLK24_DDRMON		50
-#define ACLK_GIC_AUDIO		51
-#define HCLK_GIC_AUDIO		52
-#define HCLK_SDMMC_BUFFER	53
-#define DCLK_SDMMC_BUFFER	54
-#define ACLK_GIC600		55
-#define ACLK_SPINLOCK		56
-#define HCLK_I2S0_8CH		57
-#define HCLK_I2S1_8CH		58
-#define HCLK_I2S2_2CH		59
-#define HCLK_I2S3_2CH		60
-#define CLK_I2S0_8CH_TX_SRC	61
-#define CLK_I2S0_8CH_TX_FRAC	62
-#define MCLK_I2S0_8CH_TX	63
-#define I2S0_MCLKOUT_TX		64
-#define CLK_I2S0_8CH_RX_SRC	65
-#define CLK_I2S0_8CH_RX_FRAC	66
-#define MCLK_I2S0_8CH_RX	67
-#define I2S0_MCLKOUT_RX		68
-#define CLK_I2S1_8CH_TX_SRC	69
-#define CLK_I2S1_8CH_TX_FRAC	70
-#define MCLK_I2S1_8CH_TX	71
-#define I2S1_MCLKOUT_TX		72
-#define CLK_I2S1_8CH_RX_SRC	73
-#define CLK_I2S1_8CH_RX_FRAC	74
-#define MCLK_I2S1_8CH_RX	75
-#define I2S1_MCLKOUT_RX		76
-#define CLK_I2S2_2CH_SRC	77
-#define CLK_I2S2_2CH_FRAC	78
-#define MCLK_I2S2_2CH		79
-#define I2S2_MCLKOUT		80
-#define CLK_I2S3_2CH_TX_SRC	81
-#define CLK_I2S3_2CH_TX_FRAC	82
-#define MCLK_I2S3_2CH_TX	83
-#define I2S3_MCLKOUT_TX		84
-#define CLK_I2S3_2CH_RX_SRC	85
-#define CLK_I2S3_2CH_RX_FRAC	86
-#define MCLK_I2S3_2CH_RX	87
-#define I2S3_MCLKOUT_RX		88
-#define HCLK_PDM		89
-#define MCLK_PDM		90
-#define HCLK_VAD		91
-#define HCLK_SPDIF_8CH		92
-#define MCLK_SPDIF_8CH_SRC	93
-#define MCLK_SPDIF_8CH_FRAC	94
-#define MCLK_SPDIF_8CH		95
-#define HCLK_AUDPWM		96
-#define SCLK_AUDPWM_SRC		97
-#define SCLK_AUDPWM_FRAC	98
-#define SCLK_AUDPWM		99
-#define HCLK_ACDCDIG		100
-#define CLK_ACDCDIG_I2C		101
-#define CLK_ACDCDIG_DAC		102
-#define CLK_ACDCDIG_ADC		103
-#define ACLK_SECURE_FLASH	104
-#define HCLK_SECURE_FLASH	105
-#define ACLK_CRYPTO_NS		106
-#define HCLK_CRYPTO_NS		107
-#define CLK_CRYPTO_NS_CORE	108
-#define CLK_CRYPTO_NS_PKA	109
-#define CLK_CRYPTO_NS_RNG	110
-#define HCLK_TRNG_NS		111
-#define CLK_TRNG_NS		112
-#define PCLK_OTPC_NS		113
-#define CLK_OTPC_NS_SBPI	114
-#define CLK_OTPC_NS_USR		115
-#define HCLK_NANDC		116
-#define NCLK_NANDC		117
-#define HCLK_SFC		118
-#define HCLK_SFC_XIP		119
-#define SCLK_SFC		120
-#define ACLK_EMMC		121
-#define HCLK_EMMC		122
-#define BCLK_EMMC		123
-#define CCLK_EMMC		124
-#define TCLK_EMMC		125
-#define ACLK_PIPE		126
-#define PCLK_PIPE		127
-#define PCLK_PIPE_GRF		128
-#define ACLK_PCIE20_MST		129
-#define ACLK_PCIE20_SLV		130
-#define ACLK_PCIE20_DBI		131
-#define PCLK_PCIE20		132
-#define CLK_PCIE20_AUX_NDFT	133
-#define CLK_PCIE20_AUX_DFT	134
-#define CLK_PCIE20_PIPE_DFT	135
-#define ACLK_PCIE30X1_MST	136
-#define ACLK_PCIE30X1_SLV	137
-#define ACLK_PCIE30X1_DBI	138
-#define PCLK_PCIE30X1		139
-#define CLK_PCIE30X1_AUX_NDFT	140
-#define CLK_PCIE30X1_AUX_DFT	141
-#define CLK_PCIE30X1_PIPE_DFT	142
-#define ACLK_PCIE30X2_MST	143
-#define ACLK_PCIE30X2_SLV	144
-#define ACLK_PCIE30X2_DBI	145
-#define PCLK_PCIE30X2		146
-#define CLK_PCIE30X2_AUX_NDFT	147
-#define CLK_PCIE30X2_AUX_DFT	148
-#define CLK_PCIE30X2_PIPE_DFT	149
-#define ACLK_SATA0		150
-#define CLK_SATA0_PMALIVE	151
-#define CLK_SATA0_RXOOB		152
-#define CLK_SATA0_PIPE_NDFT	153
-#define CLK_SATA0_PIPE_DFT	154
-#define ACLK_SATA1		155
-#define CLK_SATA1_PMALIVE	156
-#define CLK_SATA1_RXOOB		157
-#define CLK_SATA1_PIPE_NDFT	158
-#define CLK_SATA1_PIPE_DFT	159
-#define ACLK_SATA2		160
-#define CLK_SATA2_PMALIVE	161
-#define CLK_SATA2_RXOOB		162
-#define CLK_SATA2_PIPE_NDFT	163
-#define CLK_SATA2_PIPE_DFT	164
-#define ACLK_USB3OTG0		165
-#define CLK_USB3OTG0_REF	166
-#define CLK_USB3OTG0_SUSPEND	167
-#define ACLK_USB3OTG1		168
-#define CLK_USB3OTG1_REF	169
-#define CLK_USB3OTG1_SUSPEND	170
-#define CLK_XPCS_EEE		171
-#define PCLK_XPCS		172
-#define ACLK_PHP		173
-#define HCLK_PHP		174
-#define PCLK_PHP		175
-#define HCLK_SDMMC0		176
-#define CLK_SDMMC0		177
-#define HCLK_SDMMC1		178
-#define CLK_SDMMC1		179
-#define ACLK_GMAC0		180
-#define PCLK_GMAC0		181
-#define CLK_MAC0_2TOP		182
-#define CLK_MAC0_OUT		183
-#define CLK_MAC0_REFOUT		184
-#define CLK_GMAC0_PTP_REF	185
-#define ACLK_USB		186
-#define HCLK_USB		187
-#define PCLK_USB		188
-#define HCLK_USB2HOST0		189
-#define HCLK_USB2HOST0_ARB	190
-#define HCLK_USB2HOST1		191
-#define HCLK_USB2HOST1_ARB	192
-#define HCLK_SDMMC2		193
-#define CLK_SDMMC2		194
-#define ACLK_GMAC1		195
-#define PCLK_GMAC1		196
-#define CLK_MAC1_2TOP		197
-#define CLK_MAC1_OUT		198
-#define CLK_MAC1_REFOUT		199
-#define CLK_GMAC1_PTP_REF	200
-#define ACLK_PERIMID		201
-#define HCLK_PERIMID		202
-#define ACLK_VI			203
-#define HCLK_VI			204
-#define PCLK_VI			205
-#define ACLK_VICAP		206
-#define HCLK_VICAP		207
-#define DCLK_VICAP		208
-#define ICLK_VICAP_G		209
-#define ACLK_ISP		210
-#define HCLK_ISP		211
-#define CLK_ISP			212
-#define PCLK_CSI2HOST1		213
-#define CLK_CIF_OUT		214
-#define CLK_CAM0_OUT		215
-#define CLK_CAM1_OUT		216
-#define ACLK_VO			217
-#define HCLK_VO			218
-#define PCLK_VO			219
-#define ACLK_VOP_PRE		220
-#define ACLK_VOP		221
-#define HCLK_VOP		222
-#define DCLK_VOP0		223
-#define DCLK_VOP1		224
-#define DCLK_VOP2		225
-#define CLK_VOP_PWM		226
-#define ACLK_HDCP		227
-#define HCLK_HDCP		228
-#define PCLK_HDCP		229
-#define PCLK_HDMI_HOST		230
-#define CLK_HDMI_SFR		231
-#define PCLK_DSITX_0		232
-#define PCLK_DSITX_1		233
-#define PCLK_EDP_CTRL		234
-#define CLK_EDP_200M		235
-#define ACLK_VPU_PRE		236
-#define HCLK_VPU_PRE		237
-#define ACLK_VPU		238
-#define HCLK_VPU		239
-#define ACLK_RGA_PRE		240
-#define HCLK_RGA_PRE		241
-#define PCLK_RGA_PRE		242
-#define ACLK_RGA		243
-#define HCLK_RGA		244
-#define CLK_RGA_CORE		245
-#define ACLK_IEP		246
-#define HCLK_IEP		247
-#define CLK_IEP_CORE		248
-#define HCLK_EBC		249
-#define DCLK_EBC		250
-#define ACLK_JDEC		251
-#define HCLK_JDEC		252
-#define ACLK_JENC		253
-#define HCLK_JENC		254
-#define PCLK_EINK		255
-#define HCLK_EINK		256
-#define ACLK_RKVENC_PRE		257
-#define HCLK_RKVENC_PRE		258
-#define ACLK_RKVENC		259
-#define HCLK_RKVENC		260
-#define CLK_RKVENC_CORE		261
-#define ACLK_RKVDEC_PRE		262
-#define HCLK_RKVDEC_PRE		263
-#define ACLK_RKVDEC		264
-#define HCLK_RKVDEC		265
-#define CLK_RKVDEC_CA		266
-#define CLK_RKVDEC_CORE		267
-#define CLK_RKVDEC_HEVC_CA	268
-#define ACLK_BUS		269
-#define PCLK_BUS		270
-#define PCLK_TSADC		271
-#define CLK_TSADC_TSEN		272
-#define CLK_TSADC		273
-#define PCLK_SARADC		274
-#define CLK_SARADC		275
-#define PCLK_SCR		276
-#define PCLK_WDT_NS		277
-#define TCLK_WDT_NS		278
-#define ACLK_DMAC0		279
-#define ACLK_DMAC1		280
-#define ACLK_MCU		281
-#define PCLK_INTMUX		282
-#define PCLK_MAILBOX		283
-#define PCLK_UART1		284
-#define CLK_UART1_SRC		285
-#define CLK_UART1_FRAC		286
-#define SCLK_UART1		287
-#define PCLK_UART2		288
-#define CLK_UART2_SRC		289
-#define CLK_UART2_FRAC		290
-#define SCLK_UART2		291
-#define PCLK_UART3		292
-#define CLK_UART3_SRC		293
-#define CLK_UART3_FRAC		294
-#define SCLK_UART3		295
-#define PCLK_UART4		296
-#define CLK_UART4_SRC		297
-#define CLK_UART4_FRAC		298
-#define SCLK_UART4		299
-#define PCLK_UART5		300
-#define CLK_UART5_SRC		301
-#define CLK_UART5_FRAC		302
-#define SCLK_UART5		303
-#define PCLK_UART6		304
-#define CLK_UART6_SRC		305
-#define CLK_UART6_FRAC		306
-#define SCLK_UART6		307
-#define PCLK_UART7		308
-#define CLK_UART7_SRC		309
-#define CLK_UART7_FRAC		310
-#define SCLK_UART7		311
-#define PCLK_UART8		312
-#define CLK_UART8_SRC		313
-#define CLK_UART8_FRAC		314
-#define SCLK_UART8		315
-#define PCLK_UART9		316
-#define CLK_UART9_SRC		317
-#define CLK_UART9_FRAC		318
-#define SCLK_UART9		319
-#define PCLK_CAN0		320
-#define CLK_CAN0		321
-#define PCLK_CAN1		322
-#define CLK_CAN1		323
-#define PCLK_CAN2		324
-#define CLK_CAN2		325
-#define CLK_I2C			326
-#define PCLK_I2C1		327
-#define CLK_I2C1		328
-#define PCLK_I2C2		329
-#define CLK_I2C2		330
-#define PCLK_I2C3		331
-#define CLK_I2C3		332
-#define PCLK_I2C4		333
-#define CLK_I2C4		334
-#define PCLK_I2C5		335
-#define CLK_I2C5		336
-#define PCLK_SPI0		337
-#define CLK_SPI0		338
-#define PCLK_SPI1		339
-#define CLK_SPI1		340
-#define PCLK_SPI2		341
-#define CLK_SPI2		342
-#define PCLK_SPI3		343
-#define CLK_SPI3		344
-#define PCLK_PWM1		345
-#define CLK_PWM1		346
-#define CLK_PWM1_CAPTURE	347
-#define PCLK_PWM2		348
-#define CLK_PWM2		349
-#define CLK_PWM2_CAPTURE	350
-#define PCLK_PWM3		351
-#define CLK_PWM3		352
-#define CLK_PWM3_CAPTURE	353
-#define DBCLK_GPIO		354
-#define PCLK_GPIO1		355
-#define DBCLK_GPIO1		356
-#define PCLK_GPIO2		357
-#define DBCLK_GPIO2		358
-#define PCLK_GPIO3		359
-#define DBCLK_GPIO3		360
-#define PCLK_GPIO4		361
-#define DBCLK_GPIO4		362
-#define OCC_SCAN_CLK_GPIO	363
-#define PCLK_TIMER		364
-#define CLK_TIMER0		365
-#define CLK_TIMER1		366
-#define CLK_TIMER2		367
-#define CLK_TIMER3		368
-#define CLK_TIMER4		369
-#define CLK_TIMER5		370
-#define ACLK_TOP_HIGH		371
-#define ACLK_TOP_LOW		372
-#define HCLK_TOP		373
-#define PCLK_TOP		374
-#define PCLK_PCIE30PHY		375
-#define CLK_OPTC_ARB		376
-#define PCLK_MIPICSIPHY		377
-#define PCLK_MIPIDSIPHY0	378
-#define PCLK_MIPIDSIPHY1	379
-#define PCLK_PIPEPHY0		380
-#define PCLK_PIPEPHY1		381
-#define PCLK_PIPEPHY2		382
-#define PCLK_CPU_BOOST		383
-#define CLK_CPU_BOOST		384
-#define PCLK_OTPPHY		385
-#define SCLK_GMAC0		386
-#define SCLK_GMAC0_RGMII_SPEED	387
-#define SCLK_GMAC0_RMII_SPEED	388
-#define SCLK_GMAC0_RX_TX	389
-#define SCLK_GMAC1		390
-#define SCLK_GMAC1_RGMII_SPEED	391
-#define SCLK_GMAC1_RMII_SPEED	392
-#define SCLK_GMAC1_RX_TX	393
-#define SCLK_SDMMC0_DRV		394
-#define SCLK_SDMMC0_SAMPLE	395
-#define SCLK_SDMMC1_DRV		396
-#define SCLK_SDMMC1_SAMPLE	397
-#define SCLK_SDMMC2_DRV		398
-#define SCLK_SDMMC2_SAMPLE	399
-#define SCLK_EMMC_DRV		400
-#define SCLK_EMMC_SAMPLE	401
-#define PCLK_EDPPHY_GRF		402
-#define CLK_HDMI_CEC            403
-#define CLK_I2S0_8CH_TX		404
-#define CLK_I2S0_8CH_RX		405
-#define CLK_I2S1_8CH_TX		406
-#define CLK_I2S1_8CH_RX		407
-#define CLK_I2S2_2CH		408
-#define CLK_I2S3_2CH_TX		409
-#define CLK_I2S3_2CH_RX		410
-#define CPLL_500M		411
-#define CPLL_250M		412
-#define CPLL_125M		413
-#define CPLL_62P5M		414
-#define CPLL_50M		415
-#define CPLL_25M		416
-#define CPLL_100M		417
-#define SCLK_DDRCLK		418
-
-#define PCLK_CORE_PVTM		450
-
-#define CLK_NR_CLKS		(PCLK_CORE_PVTM + 1)
-
-/* pmu soft-reset indices */
-/* pmucru_softrst_con0 */
-#define SRST_P_PDPMU_NIU	0
-#define SRST_P_PMUCRU		1
-#define SRST_P_PMUGRF		2
-#define SRST_P_I2C0		3
-#define SRST_I2C0		4
-#define SRST_P_UART0		5
-#define SRST_S_UART0		6
-#define SRST_P_PWM0		7
-#define SRST_PWM0		8
-#define SRST_P_GPIO0		9
-#define SRST_GPIO0		10
-#define SRST_P_PMUPVTM		11
-#define SRST_PMUPVTM		12
-
-/* soft-reset indices */
-
-/* cru_softrst_con0 */
-#define SRST_NCORERESET0	0
-#define SRST_NCORERESET1	1
-#define SRST_NCORERESET2	2
-#define SRST_NCORERESET3	3
-#define SRST_NCPUPORESET0	4
-#define SRST_NCPUPORESET1	5
-#define SRST_NCPUPORESET2	6
-#define SRST_NCPUPORESET3	7
-#define SRST_NSRESET		8
-#define SRST_NSPORESET		9
-#define SRST_NATRESET		10
-#define SRST_NGICRESET		11
-#define SRST_NPRESET		12
-#define SRST_NPERIPHRESET	13
-
-/* cru_softrst_con1 */
-#define SRST_A_CORE_NIU2DDR	16
-#define SRST_A_CORE_NIU2BUS	17
-#define SRST_P_DBG_NIU		18
-#define SRST_P_DBG		19
-#define SRST_P_DBG_DAPLITE	20
-#define SRST_DAP		21
-#define SRST_A_ADB400_CORE2GIC	22
-#define SRST_A_ADB400_GIC2CORE	23
-#define SRST_P_CORE_GRF		24
-#define SRST_P_CORE_PVTM	25
-#define SRST_CORE_PVTM		26
-#define SRST_CORE_PVTPLL	27
-
-/* cru_softrst_con2 */
-#define SRST_GPU		32
-#define SRST_A_GPU_NIU		33
-#define SRST_P_GPU_NIU		34
-#define SRST_P_GPU_PVTM		35
-#define SRST_GPU_PVTM		36
-#define SRST_GPU_PVTPLL		37
-#define SRST_A_NPU_NIU		40
-#define SRST_H_NPU_NIU		41
-#define SRST_P_NPU_NIU		42
-#define SRST_A_NPU		43
-#define SRST_H_NPU		44
-#define SRST_P_NPU_PVTM		45
-#define SRST_NPU_PVTM		46
-#define SRST_NPU_PVTPLL		47
-
-/* cru_softrst_con3 */
-#define SRST_A_MSCH		51
-#define SRST_HWFFC_CTRL		52
-#define SRST_DDR_ALWAYSON	53
-#define SRST_A_DDRSPLIT		54
-#define SRST_DDRDFI_CTL		55
-#define SRST_A_DMA2DDR		57
-
-/* cru_softrst_con4 */
-#define SRST_A_PERIMID_NIU	64
-#define SRST_H_PERIMID_NIU	65
-#define SRST_A_GIC_AUDIO_NIU	66
-#define SRST_H_GIC_AUDIO_NIU	67
-#define SRST_A_GIC600		68
-#define SRST_A_GIC600_DEBUG	69
-#define SRST_A_GICADB_CORE2GIC	70
-#define SRST_A_GICADB_GIC2CORE	71
-#define SRST_A_SPINLOCK		72
-#define SRST_H_SDMMC_BUFFER	73
-#define SRST_D_SDMMC_BUFFER	74
-#define SRST_H_I2S0_8CH		75
-#define SRST_H_I2S1_8CH		76
-#define SRST_H_I2S2_2CH		77
-#define SRST_H_I2S3_2CH		78
-
-/* cru_softrst_con5 */
-#define SRST_M_I2S0_8CH_TX	80
-#define SRST_M_I2S0_8CH_RX	81
-#define SRST_M_I2S1_8CH_TX	82
-#define SRST_M_I2S1_8CH_RX	83
-#define SRST_M_I2S2_2CH		84
-#define SRST_M_I2S3_2CH_TX	85
-#define SRST_M_I2S3_2CH_RX	86
-#define SRST_H_PDM		87
-#define SRST_M_PDM		88
-#define SRST_H_VAD		89
-#define SRST_H_SPDIF_8CH	90
-#define SRST_M_SPDIF_8CH	91
-#define SRST_H_AUDPWM		92
-#define SRST_S_AUDPWM		93
-#define SRST_H_ACDCDIG		94
-#define SRST_ACDCDIG		95
-
-/* cru_softrst_con6 */
-#define SRST_A_SECURE_FLASH_NIU	96
-#define SRST_H_SECURE_FLASH_NIU	97
-#define SRST_A_CRYPTO_NS	103
-#define SRST_H_CRYPTO_NS	104
-#define SRST_CRYPTO_NS_CORE	105
-#define SRST_CRYPTO_NS_PKA	106
-#define SRST_CRYPTO_NS_RNG	107
-#define SRST_H_TRNG_NS		108
-#define SRST_TRNG_NS		109
-
-/* cru_softrst_con7 */
-#define SRST_H_NANDC		112
-#define SRST_N_NANDC		113
-#define SRST_H_SFC		114
-#define SRST_H_SFC_XIP		115
-#define SRST_S_SFC		116
-#define SRST_A_EMMC		117
-#define SRST_H_EMMC		118
-#define SRST_B_EMMC		119
-#define SRST_C_EMMC		120
-#define SRST_T_EMMC		121
-
-/* cru_softrst_con8 */
-#define SRST_A_PIPE_NIU		128
-#define SRST_P_PIPE_NIU		130
-#define SRST_P_PIPE_GRF		133
-#define SRST_A_SATA0		134
-#define SRST_SATA0_PIPE		135
-#define SRST_SATA0_PMALIVE	136
-#define SRST_SATA0_RXOOB	137
-#define SRST_A_SATA1		138
-#define SRST_SATA1_PIPE		139
-#define SRST_SATA1_PMALIVE	140
-#define SRST_SATA1_RXOOB	141
-
-/* cru_softrst_con9 */
-#define SRST_A_SATA2		144
-#define SRST_SATA2_PIPE		145
-#define SRST_SATA2_PMALIVE	146
-#define SRST_SATA2_RXOOB	147
-#define SRST_USB3OTG0		148
-#define SRST_USB3OTG1		149
-#define SRST_XPCS		150
-#define SRST_XPCS_TX_DIV10	151
-#define SRST_XPCS_RX_DIV10	152
-#define SRST_XPCS_XGXS_RX	153
-
-/* cru_softrst_con10 */
-#define SRST_P_PCIE20		160
-#define SRST_PCIE20_POWERUP	161
-#define SRST_MSTR_ARESET_PCIE20	162
-#define SRST_SLV_ARESET_PCIE20	163
-#define SRST_DBI_ARESET_PCIE20	164
-#define SRST_BRESET_PCIE20	165
-#define SRST_PERST_PCIE20	166
-#define SRST_CORE_RST_PCIE20	167
-#define SRST_NSTICKY_RST_PCIE20	168
-#define SRST_STICKY_RST_PCIE20	169
-#define SRST_PWR_RST_PCIE20	170
-
-/* cru_softrst_con11 */
-#define SRST_P_PCIE30X1		176
-#define SRST_PCIE30X1_POWERUP	177
-#define SRST_M_ARESET_PCIE30X1	178
-#define SRST_S_ARESET_PCIE30X1	179
-#define SRST_D_ARESET_PCIE30X1	180
-#define SRST_BRESET_PCIE30X1	181
-#define SRST_PERST_PCIE30X1	182
-#define SRST_CORE_RST_PCIE30X1	183
-#define SRST_NSTC_RST_PCIE30X1	184
-#define SRST_STC_RST_PCIE30X1	185
-#define SRST_PWR_RST_PCIE30X1	186
-
-/* cru_softrst_con12 */
-#define SRST_P_PCIE30X2		192
-#define SRST_PCIE30X2_POWERUP	193
-#define SRST_M_ARESET_PCIE30X2	194
-#define SRST_S_ARESET_PCIE30X2	195
-#define SRST_D_ARESET_PCIE30X2	196
-#define SRST_BRESET_PCIE30X2	197
-#define SRST_PERST_PCIE30X2	198
-#define SRST_CORE_RST_PCIE30X2	199
-#define SRST_NSTC_RST_PCIE30X2	200
-#define SRST_STC_RST_PCIE30X2	201
-#define SRST_PWR_RST_PCIE30X2	202
-
-/* cru_softrst_con13 */
-#define SRST_A_PHP_NIU		208
-#define SRST_H_PHP_NIU		209
-#define SRST_P_PHP_NIU		210
-#define SRST_H_SDMMC0		211
-#define SRST_SDMMC0		212
-#define SRST_H_SDMMC1		213
-#define SRST_SDMMC1		214
-#define SRST_A_GMAC0		215
-#define SRST_GMAC0_TIMESTAMP	216
-
-/* cru_softrst_con14 */
-#define SRST_A_USB_NIU		224
-#define SRST_H_USB_NIU		225
-#define SRST_P_USB_NIU		226
-#define SRST_P_USB_GRF		227
-#define SRST_H_USB2HOST0	228
-#define SRST_H_USB2HOST0_ARB	229
-#define SRST_USB2HOST0_UTMI	230
-#define SRST_H_USB2HOST1	231
-#define SRST_H_USB2HOST1_ARB	232
-#define SRST_USB2HOST1_UTMI	233
-#define SRST_H_SDMMC2		234
-#define SRST_SDMMC2		235
-#define SRST_A_GMAC1		236
-#define SRST_GMAC1_TIMESTAMP	237
-
-/* cru_softrst_con15 */
-#define SRST_A_VI_NIU		240
-#define SRST_H_VI_NIU		241
-#define SRST_P_VI_NIU		242
-#define SRST_A_VICAP		247
-#define SRST_H_VICAP		248
-#define SRST_D_VICAP		249
-#define SRST_I_VICAP		250
-#define SRST_P_VICAP		251
-#define SRST_H_ISP		252
-#define SRST_ISP		253
-#define SRST_P_CSI2HOST1	255
-
-/* cru_softrst_con16 */
-#define SRST_A_VO_NIU		256
-#define SRST_H_VO_NIU		257
-#define SRST_P_VO_NIU		258
-#define SRST_A_VOP_NIU		259
-#define SRST_A_VOP		260
-#define SRST_H_VOP		261
-#define SRST_VOP0		262
-#define SRST_VOP1		263
-#define SRST_VOP2		264
-#define SRST_VOP_PWM		265
-#define SRST_A_HDCP		266
-#define SRST_H_HDCP		267
-#define SRST_P_HDCP		268
-#define SRST_P_HDMI_HOST	270
-#define SRST_HDMI_HOST		271
-
-/* cru_softrst_con17 */
-#define SRST_P_DSITX_0		272
-#define SRST_P_DSITX_1		273
-#define SRST_P_EDP_CTRL		274
-#define SRST_EDP_24M		275
-#define SRST_A_VPU_NIU		280
-#define SRST_H_VPU_NIU		281
-#define SRST_A_VPU		282
-#define SRST_H_VPU		283
-#define SRST_H_EINK		286
-#define SRST_P_EINK		287
-
-/* cru_softrst_con18 */
-#define SRST_A_RGA_NIU		288
-#define SRST_H_RGA_NIU		289
-#define SRST_P_RGA_NIU		290
-#define SRST_A_RGA		292
-#define SRST_H_RGA		293
-#define SRST_RGA_CORE		294
-#define SRST_A_IEP		295
-#define SRST_H_IEP		296
-#define SRST_IEP_CORE		297
-#define SRST_H_EBC		298
-#define SRST_D_EBC		299
-#define SRST_A_JDEC		300
-#define SRST_H_JDEC		301
-#define SRST_A_JENC		302
-#define SRST_H_JENC		303
-
-/* cru_softrst_con19 */
-#define SRST_A_VENC_NIU		304
-#define SRST_H_VENC_NIU		305
-#define SRST_A_RKVENC		307
-#define SRST_H_RKVENC		308
-#define SRST_RKVENC_CORE	309
-
-/* cru_softrst_con20 */
-#define SRST_A_RKVDEC_NIU	320
-#define SRST_H_RKVDEC_NIU	321
-#define SRST_A_RKVDEC		322
-#define SRST_H_RKVDEC		323
-#define SRST_RKVDEC_CA		324
-#define SRST_RKVDEC_CORE	325
-#define SRST_RKVDEC_HEVC_CA	326
-
-/* cru_softrst_con21 */
-#define SRST_A_BUS_NIU		336
-#define SRST_P_BUS_NIU		338
-#define SRST_P_CAN0		340
-#define SRST_CAN0		341
-#define SRST_P_CAN1		342
-#define SRST_CAN1		343
-#define SRST_P_CAN2		344
-#define SRST_CAN2		345
-#define SRST_P_GPIO1		346
-#define SRST_GPIO1		347
-#define SRST_P_GPIO2		348
-#define SRST_GPIO2		349
-#define SRST_P_GPIO3		350
-#define SRST_GPIO3		351
-
-/* cru_softrst_con22 */
-#define SRST_P_GPIO4		352
-#define SRST_GPIO4		353
-#define SRST_P_I2C1		354
-#define SRST_I2C1		355
-#define SRST_P_I2C2		356
-#define SRST_I2C2		357
-#define SRST_P_I2C3		358
-#define SRST_I2C3		359
-#define SRST_P_I2C4		360
-#define SRST_I2C4		361
-#define SRST_P_I2C5		362
-#define SRST_I2C5		363
-#define SRST_P_OTPC_NS		364
-#define SRST_OTPC_NS_SBPI	365
-#define SRST_OTPC_NS_USR	366
-
-/* cru_softrst_con23 */
-#define SRST_P_PWM1		368
-#define SRST_PWM1		369
-#define SRST_P_PWM2		370
-#define SRST_PWM2		371
-#define SRST_P_PWM3		372
-#define SRST_PWM3		373
-#define SRST_P_SPI0		374
-#define SRST_SPI0		375
-#define SRST_P_SPI1		376
-#define SRST_SPI1		377
-#define SRST_P_SPI2		378
-#define SRST_SPI2		379
-#define SRST_P_SPI3		380
-#define SRST_SPI3		381
-
-/* cru_softrst_con24 */
-#define SRST_P_SARADC		384
-#define SRST_P_TSADC		385
-#define SRST_TSADC		386
-#define SRST_P_TIMER		387
-#define SRST_TIMER0		388
-#define SRST_TIMER1		389
-#define SRST_TIMER2		390
-#define SRST_TIMER3		391
-#define SRST_TIMER4		392
-#define SRST_TIMER5		393
-#define SRST_P_UART1		394
-#define SRST_S_UART1		395
-
-/* cru_softrst_con25 */
-#define SRST_P_UART2		400
-#define SRST_S_UART2		401
-#define SRST_P_UART3		402
-#define SRST_S_UART3		403
-#define SRST_P_UART4		404
-#define SRST_S_UART4		405
-#define SRST_P_UART5		406
-#define SRST_S_UART5		407
-#define SRST_P_UART6		408
-#define SRST_S_UART6		409
-#define SRST_P_UART7		410
-#define SRST_S_UART7		411
-#define SRST_P_UART8		412
-#define SRST_S_UART8		413
-#define SRST_P_UART9		414
-#define SRST_S_UART9		415
-
-/* cru_softrst_con26 */
-#define SRST_P_GRF 416
-#define SRST_P_GRF_VCCIO12	417
-#define SRST_P_GRF_VCCIO34	418
-#define SRST_P_GRF_VCCIO567	419
-#define SRST_P_SCR		420
-#define SRST_P_WDT_NS		421
-#define SRST_T_WDT_NS		422
-#define SRST_P_DFT2APB		423
-#define SRST_A_MCU		426
-#define SRST_P_INTMUX		427
-#define SRST_P_MAILBOX		428
-
-/* cru_softrst_con27 */
-#define SRST_A_TOP_HIGH_NIU	432
-#define SRST_A_TOP_LOW_NIU	433
-#define SRST_H_TOP_NIU		434
-#define SRST_P_TOP_NIU		435
-#define SRST_P_TOP_CRU		438
-#define SRST_P_DDRPHY		439
-#define SRST_DDRPHY		440
-#define SRST_P_MIPICSIPHY	442
-#define SRST_P_MIPIDSIPHY0	443
-#define SRST_P_MIPIDSIPHY1	444
-#define SRST_P_PCIE30PHY	445
-#define SRST_PCIE30PHY		446
-#define SRST_P_PCIE30PHY_GRF	447
-
-/* cru_softrst_con28 */
-#define SRST_P_APB2ASB_LEFT	448
-#define SRST_P_APB2ASB_BOTTOM	449
-#define SRST_P_ASB2APB_LEFT	450
-#define SRST_P_ASB2APB_BOTTOM	451
-#define SRST_P_PIPEPHY0		452
-#define SRST_PIPEPHY0		453
-#define SRST_P_PIPEPHY1		454
-#define SRST_PIPEPHY1		455
-#define SRST_P_PIPEPHY2		456
-#define SRST_PIPEPHY2		457
-#define SRST_P_USB2PHY0_GRF	458
-#define SRST_P_USB2PHY1_GRF	459
-#define SRST_P_CPU_BOOST	460
-#define SRST_CPU_BOOST		461
-#define SRST_P_OTPPHY		462
-#define SRST_OTPPHY		463
-
-/* cru_softrst_con29 */
-#define SRST_USB2PHY0_POR	464
-#define SRST_USB2PHY0_USB3OTG0	465
-#define SRST_USB2PHY0_USB3OTG1	466
-#define SRST_USB2PHY1_POR	467
-#define SRST_USB2PHY1_USB2HOST0	468
-#define SRST_USB2PHY1_USB2HOST1	469
-#define SRST_P_EDPPHY_GRF	470
-#define SRST_TSADCPHY		471
-#define SRST_GMAC0_DELAYLINE	472
-#define SRST_GMAC1_DELAYLINE	473
-#define SRST_OTPC_ARB		474
-#define SRST_P_PIPEPHY0_GRF	475
-#define SRST_P_PIPEPHY1_GRF	476
-#define SRST_P_PIPEPHY2_GRF	477
-
-#endif
diff --git a/include/dt-bindings/power/rk3568-power.h b/include/dt-bindings/power/rk3568-power.h
deleted file mode 100644
index 6cc1af1a9d26..000000000000
--- a/include/dt-bindings/power/rk3568-power.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __DT_BINDINGS_POWER_RK3568_POWER_H__
-#define __DT_BINDINGS_POWER_RK3568_POWER_H__
-
-/* VD_CORE */
-#define RK3568_PD_CPU_0		0
-#define RK3568_PD_CPU_1		1
-#define RK3568_PD_CPU_2		2
-#define RK3568_PD_CPU_3		3
-#define RK3568_PD_CORE_ALIVE	4
-
-/* VD_PMU */
-#define RK3568_PD_PMU		5
-
-/* VD_NPU */
-#define RK3568_PD_NPU		6
-
-/* VD_GPU */
-#define RK3568_PD_GPU		7
-
-/* VD_LOGIC */
-#define RK3568_PD_VI		8
-#define RK3568_PD_VO		9
-#define RK3568_PD_RGA		10
-#define RK3568_PD_VPU		11
-#define RK3568_PD_CENTER	12
-#define RK3568_PD_RKVDEC	13
-#define RK3568_PD_RKVENC	14
-#define RK3568_PD_PIPE		15
-#define RK3568_PD_LOGIC_ALIVE	16
-
-#endif
