Message ID | 20240423081005.23218-2-peter.hoyes@arm.com |
---|---|
State | Superseded |
Delegated to: | Tom Rini |
Headers | show |
Series | Optimize udelay for aarch64 boards | expand |
On Tue, 23 Apr 2024 09:10:04 +0100 Peter Hoyes <peter.hoyes@arm.com> wrote: Hi, > From: Peter Hoyes <Peter.Hoyes@arm.com> > > The sev() and wfe() asm macros are currently defined only for > mach-exynos. As these are common Arm instructions, move them to the > common asm/system.h header file, for both Armv7 and Armv8, so they > can be used by other machines. > > wfe may theoretically trigger a context switch if an interrupt occurs > so add a memory barrier to this call. > > Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com> Looks alright to me, and the memory barrier for wfe looks justified. For the records: we couldn't come up with a reason why "sev" would need one as well, so even while the kernel has this, this seems to be more a copy&paste incident rather than something intentional. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Cheers, Andre > --- > arch/arm/include/asm/system.h | 9 +++++++++ > arch/arm/mach-exynos/include/mach/system.h | 19 ------------------- > 2 files changed, 9 insertions(+), 19 deletions(-) > > diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h > index 43f7503571..51123c2968 100644 > --- a/arch/arm/include/asm/system.h > +++ b/arch/arm/include/asm/system.h > @@ -154,6 +154,13 @@ enum dcache_option { > "wfi" : : : "memory"); \ > }) > > +#define wfe() \ > + ({asm volatile( \ > + "wfe" : : : "memory"); \ > + }) > + > +#define sev() asm volatile("sev") > + > static inline unsigned int current_el(void) > { > unsigned long el; > @@ -369,6 +376,8 @@ void switch_to_hypervisor_ret(void); > > #ifdef __ARM_ARCH_7A__ > #define wfi() __asm__ __volatile__ ("wfi" : : : "memory") > +#define wfe() __asm__ __volatile__ ("wfe" : : : "memory") > +#define sev() __asm__ __volatile__ ("sev") > #else > #define wfi() > #endif > diff --git a/arch/arm/mach-exynos/include/mach/system.h b/arch/arm/mach-exynos/include/mach/system.h > index 5d0bebac57..0aed4c3e2b 100644 > --- a/arch/arm/mach-exynos/include/mach/system.h > +++ b/arch/arm/mach-exynos/include/mach/system.h > @@ -36,25 +36,6 @@ struct exynos5_sysreg { > > #define USB20_PHY_CFG_HOST_LINK_EN (1 << 0) > > -/* > - * This instruction causes an event to be signaled to all cores > - * within a multiprocessor system. If SEV is implemented, > - * WFE must also be implemented. > - */ > -#define sev() __asm__ __volatile__ ("sev\n\t" : : ); > -/* > - * If the Event Register is not set, WFE suspends execution until > - * one of the following events occurs: > - * - an IRQ interrupt, unless masked by the CPSR I-bit > - * - an FIQ interrupt, unless masked by the CPSR F-bit > - * - an Imprecise Data abort, unless masked by the CPSR A-bit > - * - a Debug Entry request, if Debug is enabled > - * - an Event signaled by another processor using the SEV instruction. > - * If the Event Register is set, WFE clears it and returns immediately. > - * If WFE is implemented, SEV must also be implemented. > - */ > -#define wfe() __asm__ __volatile__ ("wfe\n\t" : : ); > - > /* Move 0xd3 value to CPSR register to enable SVC mode */ > #define svc32_mode_en() __asm__ __volatile__ \ > ("@ I&F disable, Mode: 0x13 - SVC\n\t" \
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 43f7503571..51123c2968 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -154,6 +154,13 @@ enum dcache_option { "wfi" : : : "memory"); \ }) +#define wfe() \ + ({asm volatile( \ + "wfe" : : : "memory"); \ + }) + +#define sev() asm volatile("sev") + static inline unsigned int current_el(void) { unsigned long el; @@ -369,6 +376,8 @@ void switch_to_hypervisor_ret(void); #ifdef __ARM_ARCH_7A__ #define wfi() __asm__ __volatile__ ("wfi" : : : "memory") +#define wfe() __asm__ __volatile__ ("wfe" : : : "memory") +#define sev() __asm__ __volatile__ ("sev") #else #define wfi() #endif diff --git a/arch/arm/mach-exynos/include/mach/system.h b/arch/arm/mach-exynos/include/mach/system.h index 5d0bebac57..0aed4c3e2b 100644 --- a/arch/arm/mach-exynos/include/mach/system.h +++ b/arch/arm/mach-exynos/include/mach/system.h @@ -36,25 +36,6 @@ struct exynos5_sysreg { #define USB20_PHY_CFG_HOST_LINK_EN (1 << 0) -/* - * This instruction causes an event to be signaled to all cores - * within a multiprocessor system. If SEV is implemented, - * WFE must also be implemented. - */ -#define sev() __asm__ __volatile__ ("sev\n\t" : : ); -/* - * If the Event Register is not set, WFE suspends execution until - * one of the following events occurs: - * - an IRQ interrupt, unless masked by the CPSR I-bit - * - an FIQ interrupt, unless masked by the CPSR F-bit - * - an Imprecise Data abort, unless masked by the CPSR A-bit - * - a Debug Entry request, if Debug is enabled - * - an Event signaled by another processor using the SEV instruction. - * If the Event Register is set, WFE clears it and returns immediately. - * If WFE is implemented, SEV must also be implemented. - */ -#define wfe() __asm__ __volatile__ ("wfe\n\t" : : ); - /* Move 0xd3 value to CPSR register to enable SVC mode */ #define svc32_mode_en() __asm__ __volatile__ \ ("@ I&F disable, Mode: 0x13 - SVC\n\t" \