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[1/5] andes: csr.h: Clean up CSR definition

Message ID 20231225130528.1954968-1-ycliang@andestech.com
State Superseded
Headers show
Series [1/5] andes: csr.h: Clean up CSR definition | expand

Commit Message

Leo Liang Dec. 25, 2023, 1:05 p.m. UTC 
Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
---
 arch/riscv/include/asm/arch-andes/csr.h | 19 ++++++++-----------
 1 file changed, 8 insertions(+), 11 deletions(-)
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Patch

diff --git a/arch/riscv/include/asm/arch-andes/csr.h b/arch/riscv/include/asm/arch-andes/csr.h
index 393d51c6dd..93aa8b2343 100644
--- a/arch/riscv/include/asm/arch-andes/csr.h
+++ b/arch/riscv/include/asm/arch-andes/csr.h
@@ -15,17 +15,14 @@ 
 #define CSR_MARCHID 0xf12
 #define CSR_MCCTLCOMMAND 0x7cc
 
-#define MCACHE_CTL_IC_EN_OFFSET 0
-#define MCACHE_CTL_DC_EN_OFFSET 1
-#define MCACHE_CTL_CCTL_SUEN_OFFSET 8
-#define MCACHE_CTL_DC_COHEN_OFFSET 19
-#define MCACHE_CTL_DC_COHSTA_OFFSET 20
-
-#define MCACHE_CTL_IC_EN BIT(MCACHE_CTL_IC_EN_OFFSET)
-#define MCACHE_CTL_DC_EN BIT(MCACHE_CTL_DC_EN_OFFSET)
-#define MCACHE_CTL_CCTL_SUEN BIT(MCACHE_CTL_CCTL_SUEN_OFFSET)
-#define MCACHE_CTL_DC_COHEN BIT(MCACHE_CTL_DC_COHEN_OFFSET)
-#define MCACHE_CTL_DC_COHSTA BIT(MCACHE_CTL_DC_COHSTA_OFFSET)
+/* mcache_ctl register */
+
+#define MCACHE_CTL_IC_EN		BIT(0)
+#define MCACHE_CTL_DC_EN		BIT(1)
+#define MCACHE_CTL_CCTL_SUEN		BIT(8)
+#define MCACHE_CTL_DC_COHEN		BIT(19)
+#define MCACHE_CTL_DC_COHSTA		BIT(20)
+
 
 #define CCTL_L1D_WBINVAL_ALL 6