| Message ID | 20231113190721.1841748-1-jpaulo.silvagoncalves@gmail.com |
|---|---|
| State | Accepted |
| Commit | 52a86e69e2043fb488be67f5cfbbdeb30a02ddae |
| Delegated to: | Tom Rini |
| Headers | show |
| Series | [1/1] arm: k3: Enable instruction cache for main domain SPL | expand |
On 16:07-20231113, Joao Paulo Goncalves wrote: > From: Joao Paulo Goncalves <joao.goncalves@toradex.com> > > Change spl_enable_dcache so it also enable icache on SPL > initialization for the main domain part of the boot flow. This > improves bootloader booting time. > > Link: https://lore.kernel.org/all/20231109140958.1093235-1-joao.goncalves@toradex.com/ > Signed-off-by: Joao Paulo Goncalves <joao.goncalves@toradex.com> > --- Tested-by: Nishanth Menon <nm@ti.com> https://gist.github.com/nmenon/ee47a34d6b581916d6fba164617ea93b
On Mon, Nov 13, 2023 at 04:07:21PM -0300, Joao Paulo Goncalves wrote: > From: Joao Paulo Goncalves <joao.goncalves@toradex.com> > > Change spl_enable_dcache so it also enable icache on SPL > initialization for the main domain part of the boot flow. This > improves bootloader booting time. > > Link: https://lore.kernel.org/all/20231109140958.1093235-1-joao.goncalves@toradex.com/ > Signed-off-by: Joao Paulo Goncalves <joao.goncalves@toradex.com> > Tested-by: Nishanth Menon <nm@ti.com> Applied to u-boot/next, thanks!
diff --git a/arch/arm/mach-k3/am625_init.c b/arch/arm/mach-k3/am625_init.c index 8fa36f7b91..1d4ef35e7b 100644 --- a/arch/arm/mach-k3/am625_init.c +++ b/arch/arm/mach-k3/am625_init.c @@ -209,7 +209,7 @@ void board_init_f(ulong dummy) if (ret) panic("DRAM init failed: %d\n", ret); } - spl_enable_dcache(); + spl_enable_cache(); } u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device) diff --git a/arch/arm/mach-k3/am654_init.c b/arch/arm/mach-k3/am654_init.c index 0d3889cde2..f46b063d91 100644 --- a/arch/arm/mach-k3/am654_init.c +++ b/arch/arm/mach-k3/am654_init.c @@ -259,7 +259,7 @@ void board_init_f(ulong dummy) if (ret) panic("DRAM init failed: %d\n", ret); #endif - spl_enable_dcache(); + spl_enable_cache(); } u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device) diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c index c3006ba387..f609e3001f 100644 --- a/arch/arm/mach-k3/common.c +++ b/arch/arm/mach-k3/common.c @@ -522,7 +522,7 @@ void remove_fwl_configs(struct fwl_data *fwl_data, size_t fwl_data_size) } } -void spl_enable_dcache(void) +void spl_enable_cache(void) { #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) phys_addr_t ram_top = CFG_SYS_SDRAM_BASE; @@ -543,7 +543,7 @@ void spl_enable_dcache(void) gd->arch.tlb_addr + gd->arch.tlb_size); gd->relocaddr = gd->arch.tlb_addr; - dcache_enable(); + enable_caches(); #endif } diff --git a/arch/arm/mach-k3/common.h b/arch/arm/mach-k3/common.h index eabb44f620..bb84e98b55 100644 --- a/arch/arm/mach-k3/common.h +++ b/arch/arm/mach-k3/common.h @@ -37,7 +37,7 @@ void disable_linefill_optimization(void); void remove_fwl_configs(struct fwl_data *fwl_data, size_t fwl_data_size); int load_firmware(char *name_fw, char *name_loadaddr, u32 *loadaddr); void k3_sysfw_print_ver(void); -void spl_enable_dcache(void); +void spl_enable_cache(void); void mmr_unlock(uintptr_t base, u32 partition); bool is_rom_loaded_sysfw(struct rom_extended_boot_data *data); enum k3_device_type get_device_type(void); diff --git a/arch/arm/mach-k3/j721e_init.c b/arch/arm/mach-k3/j721e_init.c index b1f7e25ed0..7d793801de 100644 --- a/arch/arm/mach-k3/j721e_init.c +++ b/arch/arm/mach-k3/j721e_init.c @@ -287,7 +287,7 @@ void board_init_f(ulong dummy) if (ret) panic("DRAM init failed: %d\n", ret); #endif - spl_enable_dcache(); + spl_enable_cache(); } u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device) diff --git a/arch/arm/mach-k3/j721s2_init.c b/arch/arm/mach-k3/j721s2_init.c index a5be84b147..d46d91e652 100644 --- a/arch/arm/mach-k3/j721s2_init.c +++ b/arch/arm/mach-k3/j721s2_init.c @@ -232,7 +232,7 @@ void k3_mem_init(void) if (ret) panic("DRAM 1 init failed: %d\n", ret); } - spl_enable_dcache(); + spl_enable_cache(); } /* Support for the various EVM / SK families */