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(fttx-pool-217.61.159.206.bambit.de [217.61.159.206]) by mxbox4.masterlogin.de (Postfix) with ESMTPSA id C93B180405; Thu, 3 Aug 2023 18:00:05 +0000 (UTC) From: Frank Wunderlich To: u-boot@lists.denx.de Cc: Frank Wunderlich , Weijie Gao , Daniel Golle Subject: [PATCH] arm: mediatek: add usb support for MT7988 Date: Thu, 3 Aug 2023 20:00:01 +0200 Message-Id: <20230803180001.22130-1-linux@fw-web.de> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Mail-ID: 75cc1681-03aa-425d-baf0-72e0eacbfa01 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean From: Frank Wunderlich MT7988 has a t-phy and an x-phy controller. There is already a driver for t-phy so we can add USB support for this phy type. Signed-off-by: Frank Wunderlich --- arch/arm/dts/mt7988.dtsi | 60 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 60 insertions(+) diff --git a/arch/arm/dts/mt7988.dtsi b/arch/arm/dts/mt7988.dtsi index ddd629e8c99d..ac476d5cdd7f 100644 --- a/arch/arm/dts/mt7988.dtsi +++ b/arch/arm/dts/mt7988.dtsi @@ -9,6 +9,7 @@ #include #include #include +#include / { compatible = "mediatek,mt7988-rfb"; @@ -161,6 +162,65 @@ #clock-cells = <1>; }; + dummy_clk: dummy12m { + compatible = "fixed-clock"; + clock-frequency = <12000000>; + #clock-cells = <0>; + /* must need this line, or uart uanable to get dummy_clk */ + bootph-all; + }; + + xhci1: xhci@11200000 { + compatible = "mediatek,mt7988-xhci", + "mediatek,mtk-xhci"; + reg = <0 0x11200000 0 0x2e00>, + <0 0x11203e00 0 0x0100>; + reg-names = "mac", "ippc"; + interrupts = ; + phys = <&tphyu2port0 PHY_TYPE_USB2>, + <&tphyu3port0 PHY_TYPE_USB3>; + clocks = <&dummy_clk>, + <&dummy_clk>, + <&dummy_clk>, + <&dummy_clk>, + <&dummy_clk>; + clock-names = "sys_ck", + "xhci_ck", + "ref_ck", + "mcu_ck", + "dma_ck"; + #address-cells = <2>; + #size-cells = <2>; + status = "okay"; + }; + + usbtphy: usb-phy@11c50000 { + compatible = "mediatek,mt7988", + "mediatek,generic-tphy-v2"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + status = "okay"; + + tphyu2port0: usb-phy@11c50000 { + reg = <0 0x11c50000 0 0x700>; + clocks = <&dummy_clk>; + clock-names = "ref"; + #phy-cells = <1>; + status = "okay"; + }; + + tphyu3port0: usb-phy@11c50700 { + reg = <0 0x11c50700 0 0x900>; + clocks = <&dummy_clk>; + clock-names = "ref"; + #phy-cells = <1>; + mediatek,usb3-pll-ssc-delta; + mediatek,usb3-pll-ssc-delta1; + status = "okay"; + }; + }; + xfi_pextp0: syscon@11f20000 { compatible = "mediatek,mt7988-xfi_pextp_0", "syscon"; reg = <0 0x11f20000 0 0x10000>;