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07 Jun 2023 03:06:56 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Wed, 7 Jun 2023 03:06:55 -0700 Received: from wendy.microchip.com (10.10.115.15) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Wed, 7 Jun 2023 03:06:54 -0700 From: Conor Dooley To: CC: Rick Chen , Leo , "Padmarao Begari" , Conor Dooley Subject: [PATCH v1 1/3] riscv: dts: drop microchip from dts filenames Date: Wed, 7 Jun 2023 11:06:12 +0100 Message-ID: <20230607-backhand-mangy-9b826fbb13d3@wendy> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230607-sandlot-utility-0304dcbdaf43@wendy> References: <20230607-sandlot-utility-0304dcbdaf43@wendy> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=4467; i=conor.dooley@microchip.com; h=from:subject:message-id; bh=Eqs+tGSEDf0aaLY83WinZCp22Hq9bdwqmO3oalf65V0=; b=owGbwMvMwCFWscWwfUFT0iXG02pJDCkNYVM+T5Js+Of1efWOIM+DrxXUVDJLpS9ccZvqVSR5XVU9 TIOpo5SFQYyDQVZMkSXxdl+L1Po/Ljuce97CzGFlAhnCwMUpABOZ9pvhD1el0Or1HAKHCztbjovm7H /yoUiit/3mw+a5m80sBZYeyWT4p8bjfb1+woODDFfTFX7VLbZ6ujCNL7MwyO/s0kbtjeaxvAA= X-Developer-Key: i=conor.dooley@microchip.com; a=openpgp; fpr=F9ECA03CF54F12CD01F1655722E2C55B37CF380C X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean The original names picked for the DT doesn't match Linux's naming scheme and it was renamed there a while ago. Rename it in U-Boot to allow easily syncing dts between the two projects. Signed-off-by: Conor Dooley Reviewed-by: Rick Chen Reviewed-by: Padmarao Begari --- arch/riscv/dts/Makefile | 2 +- ...s-icicle-kit-u-boot.dtsi => mpfs-icicle-kit-u-boot.dtsi} | 0 .../{microchip-mpfs-icicle-kit.dts => mpfs-icicle-kit.dts} | 2 +- arch/riscv/dts/{microchip-mpfs.dtsi => mpfs.dtsi} | 0 configs/microchip_mpfs_icicle_defconfig | 2 +- doc/board/microchip/mpfs_icicle.rst | 6 +++--- 6 files changed, 6 insertions(+), 6 deletions(-) rename arch/riscv/dts/{microchip-mpfs-icicle-kit-u-boot.dtsi => mpfs-icicle-kit-u-boot.dtsi} (100%) rename arch/riscv/dts/{microchip-mpfs-icicle-kit.dts => mpfs-icicle-kit.dts} (98%) rename arch/riscv/dts/{microchip-mpfs.dtsi => mpfs.dtsi} (100%) diff --git a/arch/riscv/dts/Makefile b/arch/riscv/dts/Makefile index 79a58694f5..1d61eb8020 100644 --- a/arch/riscv/dts/Makefile +++ b/arch/riscv/dts/Makefile @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0+ dtb-$(CONFIG_TARGET_AE350) += ae350_32.dtb ae350_64.dtb -dtb-$(CONFIG_TARGET_MICROCHIP_ICICLE) += microchip-mpfs-icicle-kit.dtb +dtb-$(CONFIG_TARGET_MICROCHIP_ICICLE) += mpfs-icicle-kit.dtb dtb-$(CONFIG_TARGET_QEMU_VIRT) += qemu-virt32.dtb qemu-virt64.dtb dtb-$(CONFIG_TARGET_OPENPITON_RISCV64) += openpiton-riscv64.dtb dtb-$(CONFIG_TARGET_SIFIVE_UNLEASHED) += hifive-unleashed-a00.dtb diff --git a/arch/riscv/dts/microchip-mpfs-icicle-kit-u-boot.dtsi b/arch/riscv/dts/mpfs-icicle-kit-u-boot.dtsi similarity index 100% rename from arch/riscv/dts/microchip-mpfs-icicle-kit-u-boot.dtsi rename to arch/riscv/dts/mpfs-icicle-kit-u-boot.dtsi diff --git a/arch/riscv/dts/microchip-mpfs-icicle-kit.dts b/arch/riscv/dts/mpfs-icicle-kit.dts similarity index 98% rename from arch/riscv/dts/microchip-mpfs-icicle-kit.dts rename to arch/riscv/dts/mpfs-icicle-kit.dts index c3f58e2d56..3c56400b92 100644 --- a/arch/riscv/dts/microchip-mpfs-icicle-kit.dts +++ b/arch/riscv/dts/mpfs-icicle-kit.dts @@ -6,7 +6,7 @@ /dts-v1/; -#include "microchip-mpfs.dtsi" +#include "mpfs.dtsi" /* Clock frequency (in Hz) of the rtcclk */ #define RTCCLK_FREQ 1000000 diff --git a/arch/riscv/dts/microchip-mpfs.dtsi b/arch/riscv/dts/mpfs.dtsi similarity index 100% rename from arch/riscv/dts/microchip-mpfs.dtsi rename to arch/riscv/dts/mpfs.dtsi diff --git a/configs/microchip_mpfs_icicle_defconfig b/configs/microchip_mpfs_icicle_defconfig index c03c8ec6ec..fa49d3865f 100644 --- a/configs/microchip_mpfs_icicle_defconfig +++ b/configs/microchip_mpfs_icicle_defconfig @@ -4,7 +4,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_ENV_SIZE=0x2000 -CONFIG_DEFAULT_DEVICE_TREE="microchip-mpfs-icicle-kit" +CONFIG_DEFAULT_DEVICE_TREE="mpfs-icicle-kit" CONFIG_SYS_PROMPT="RISC-V # " CONFIG_SYS_MEM_TOP_HIDE=0x400000 CONFIG_SYS_LOAD_ADDR=0x80200000 diff --git a/doc/board/microchip/mpfs_icicle.rst b/doc/board/microchip/mpfs_icicle.rst index 09c2c6a9c1..1464e536e9 100644 --- a/doc/board/microchip/mpfs_icicle.rst +++ b/doc/board/microchip/mpfs_icicle.rst @@ -134,7 +134,7 @@ Build OpenSBI .. code-block:: none make PLATFORM=generic FW_PAYLOAD_PATH=/u-boot.bin - FW_FDT_PATH=/arch/riscv/dts/microchip-mpfs-icicle-kit-.dtb + FW_FDT_PATH=/arch/riscv/dts/mpfs-icicle-kit-.dtb 3. Output "fw_payload.bin" file available at "/build/platform/generic/firmware/fw_payload.bin" @@ -277,14 +277,14 @@ load uImage (with initramfs). done Bytes transferred = 14482480 (dcfc30 hex) - RISC-V # tftpboot ${fdt_addr_r} microchip-mpfs-icicle-kit.dtb + RISC-V # tftpboot ${fdt_addr_r} mpfs-icicle-kit.dtb ethernet@20112000: PHY present at 9 ethernet@20112000: Starting autonegotiation... ethernet@20112000: Autonegotiation complete ethernet@20112000: link up, 1000Mbps full-duplex (lpa: 0x7800) Using ethernet@20112000 device TFTP from server 192.168.1.3; our IP address is 192.168.1.5 - Filename 'microchip-mpfs-icicle-kit.dtb'. + Filename 'mpfs-icicle-kit.dtb'. Load address: 0x82200000 Loading: # 2.5 MiB/s