From patchwork Sun Apr 23 18:00:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: sin.hui.kho@intel.com X-Patchwork-Id: 1772481 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=OJag+Ub+; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Q4GLl4qGYz1ybF for ; Mon, 24 Apr 2023 04:02:23 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id B03C085D9D; Sun, 23 Apr 2023 20:01:36 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="OJag+Ub+"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 609308604C; Sun, 23 Apr 2023 20:01:34 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.2 Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id DA90A86071 for ; Sun, 23 Apr 2023 20:01:27 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=sin.hui.kho@intel.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1682272888; x=1713808888; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=1bkIHCqwVC+IgtMqgewykG90w35YALTEKNDpawi4VKg=; b=OJag+Ub+H9MPRy7xAyp03APL4e3pGX3k4bVMFIsqiUtw/vGEtjKSox/F U0uKIrBULrZ4P/3dfFg+GOQt0XX8MUc80BR0FHJ/ZjJXDeLKAr2rUllNp Mm3G2TiHm1LQMMlMmdXB+oaynnsZqRu0TeonxcJRtZL3h6D105Riegk/a wbRXd2H++ZkgvTTkZVcmeMq3fvs3PyuveX0P+Iy+VCsazDz1sIEgc3Pnm vMXrNBaGi6FougExw/NaSUORYyWgHNCG61CcX7YxX52mxYDBkuyt0j5PR pqFxMhj8CpyFxyYd5LYDAaJSRMb2rT9KhsVLzvDGXHXdj9Sio59bSbD9A g==; X-IronPort-AV: E=McAfee;i="6600,9927,10689"; a="345060935" X-IronPort-AV: E=Sophos;i="5.99,220,1677571200"; d="scan'208";a="345060935" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Apr 2023 11:01:27 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10689"; a="670275279" X-IronPort-AV: E=Sophos;i="5.99,220,1677571200"; d="scan'208";a="670275279" Received: from pglc00257.png.intel.com ([10.221.233.180]) by orsmga006.jf.intel.com with ESMTP; 23 Apr 2023 11:01:21 -0700 From: sin.hui.kho@intel.com To: u-boot@lists.denx.de Cc: Marek Vasut , Simon Goldschmidt , Tien Fong Chee , Sin Hui Kho , Lukasz Majewski , Sean Anderson , William Zhang , Philippe Reynes , Michal Simek , Samuel Holland , Marcel Ziswiler , =?utf-8?q?Pali_Roh=C3=A1r?= , Frieder Schrempf , Dinesh Maniyam , Jit Loon Lim , Teik Heng , Kok Kiang Subject: [PATCH v1 4/6] arm: socfpga: agilex7: Add SPL for AGILEX7 SoC Date: Mon, 24 Apr 2023 02:00:47 +0800 Message-Id: <20230423180049.25281-5-sin.hui.kho@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230423180049.25281-1-sin.hui.kho@intel.com> References: <20230423180049.25281-1-sin.hui.kho@intel.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean From: Sin Hui Kho Add SPL support for AGILEX7 SoC. Signed-off-by: Sin Hui Kho --- arch/arm/mach-socfpga/Makefile | 3 + arch/arm/mach-socfpga/spl_agilex7.c | 87 +++++++++++++++++++++++++++++ 2 files changed, 90 insertions(+) create mode 100644 arch/arm/mach-socfpga/spl_agilex7.c diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile index 2b26be3f41..224ed02865 100644 --- a/arch/arm/mach-socfpga/Makefile +++ b/arch/arm/mach-socfpga/Makefile @@ -107,6 +107,9 @@ endif ifdef CONFIG_TARGET_SOCFPGA_N5X obj-y += spl_n5x.o endif +ifdef CONFIG_TARGET_SOCFPGA_AGILEX7 +obj-y += spl_agilex7.o +endif else obj-$(CONFIG_SPL_ATF) += secure_reg_helper.o obj-$(CONFIG_SPL_ATF) += smc_api.o diff --git a/arch/arm/mach-socfpga/spl_agilex7.c b/arch/arm/mach-socfpga/spl_agilex7.c new file mode 100644 index 0000000000..1225ade387 --- /dev/null +++ b/arch/arm/mach-socfpga/spl_agilex7.c @@ -0,0 +1,87 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2023 Intel Corporation + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +void board_init_f(ulong dummy) +{ + int ret; + struct udevice *dev; + + ret = spl_early_init(); + if (ret) + hang(); + + socfpga_get_managers_addr(); + + /* Ensure watchdog is paused when debugging is happening */ + writel(SYSMGR_WDDBG_PAUSE_ALL_CPU, + socfpga_get_sysmgr_addr() + SYSMGR_SOC64_WDDBG); + +#ifdef CONFIG_HW_WATCHDOG + /* Enable watchdog before initializing the HW */ + socfpga_per_reset(SOCFPGA_RESET(L4WD0), 1); + socfpga_per_reset(SOCFPGA_RESET(L4WD0), 0); + hw_watchdog_init(); +#endif + + /* ensure all processors are not released prior Linux boot */ + writeq(0, CPU_RELEASE_ADDR); + + timer_init(); + + sysmgr_pinmux_init(); + + ret = uclass_get_device(UCLASS_CLK, 0, &dev); + if (ret) { + debug("Clock init failed: %d\n", ret); + hang(); + } + + preloader_console_init(); + print_reset_info(); + cm_print_clock_quick_summary(); + + firewall_setup(); + ret = uclass_get_device(UCLASS_CACHE, 0, &dev); + if (ret) { + debug("CCU init failed: %d\n", ret); + hang(); + } + +#if CONFIG_IS_ENABLED(ALTERA_SDRAM) + ret = uclass_get_device(UCLASS_RAM, 0, &dev); + if (ret) { + debug("DRAM init failed: %d\n", ret); + hang(); + } +#endif + + mbox_init(); + +#ifdef CONFIG_CADENCE_QSPI + mbox_qspi_open(); +#endif +}