From patchwork Thu Mar 16 02:53:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yanhong Wang X-Patchwork-Id: 1757684 X-Patchwork-Delegate: uboot@andestech.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4PcXBH23zbz246q for ; Thu, 16 Mar 2023 14:02:47 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id F2E4A85F10; Thu, 16 Mar 2023 04:02:12 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=starfivetech.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id EDBB985F55; Thu, 16 Mar 2023 04:01:55 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RCVD_IN_MSPIKE_H2, SPF_HELO_PASS,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.2 Received: from fd01.gateway.ufhost.com (fd01.gateway.ufhost.com [61.152.239.71]) by phobos.denx.de (Postfix) with ESMTP id 23DEF85F41 for ; Thu, 16 Mar 2023 03:53:44 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=starfivetech.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=yanhong.wang@starfivetech.com Received: from EXMBX166.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX166", Issuer "EXMBX166" (not verified)) by fd01.gateway.ufhost.com (Postfix) with ESMTP id BFBA724E2F2; Thu, 16 Mar 2023 10:53:43 +0800 (CST) Received: from EXMBX073.cuchost.com (172.16.6.83) by EXMBX166.cuchost.com (172.16.6.76) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Thu, 16 Mar 2023 10:53:43 +0800 Received: from wyh-VirtualBox.starfivetech.com (171.223.208.138) by EXMBX073.cuchost.com (172.16.6.83) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Thu, 16 Mar 2023 10:53:42 +0800 From: Yanhong Wang To: , Rick Chen , Leo , Lukasz Majewski , Sean Anderson CC: Lee Kuan Lim , Jianlong Huang , Emil Renner Berthing , Yanhong Wang Subject: [PATCH v4 15/17] riscv: dts: jh7110: Add initial u-boot device tree Date: Thu, 16 Mar 2023 10:53:30 +0800 Message-ID: <20230316025332.3297-16-yanhong.wang@starfivetech.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230316025332.3297-1-yanhong.wang@starfivetech.com> References: <20230316025332.3297-1-yanhong.wang@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [171.223.208.138] X-ClientProxiedBy: EXCAS064.cuchost.com (172.16.6.24) To EXMBX073.cuchost.com (172.16.6.83) X-YovoleRuleAgent: yovoleflag X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Add initial u-boot device tree for the JH7110 RISC-V SoC. Signed-off-by: Yanhong Wang Tested-by: Conor Dooley --- arch/riscv/dts/jh7110-u-boot.dtsi | 99 +++++++++++++++++++++++++++++++ 1 file changed, 99 insertions(+) create mode 100644 arch/riscv/dts/jh7110-u-boot.dtsi diff --git a/arch/riscv/dts/jh7110-u-boot.dtsi b/arch/riscv/dts/jh7110-u-boot.dtsi new file mode 100644 index 0000000000..31ca054f54 --- /dev/null +++ b/arch/riscv/dts/jh7110-u-boot.dtsi @@ -0,0 +1,99 @@ +// SPDX-License-Identifier: GPL-2.0 OR MIT +/* + * Copyright (C) 2022 StarFive Technology Co., Ltd. + */ + +#include + +/ { + cpus: cpus { + u-boot,dm-spl; + + S7_0: cpu@0 { + u-boot,dm-spl; + status = "okay"; + cpu0_intc: interrupt-controller { + u-boot,dm-spl; + }; + }; + + U74_1: cpu@1 { + u-boot,dm-spl; + cpu1_intc: interrupt-controller { + u-boot,dm-spl; + }; + }; + + U74_2: cpu@2 { + u-boot,dm-spl; + cpu2_intc: interrupt-controller { + u-boot,dm-spl; + }; + }; + + U74_3: cpu@3 { + u-boot,dm-spl; + cpu3_intc: interrupt-controller { + u-boot,dm-spl; + }; + }; + + U74_4: cpu@4 { + u-boot,dm-spl; + cpu4_intc: interrupt-controller { + u-boot,dm-spl; + }; + }; + }; + + soc { + u-boot,dm-spl; + + clint: timer@2000000 { + u-boot,dm-spl; + }; + + dmc: dmc@15700000 { + u-boot,dm-spl; + compatible = "starfive,jh7110-dmc"; + reg = <0x0 0x15700000 0x0 0x10000>, + <0x0 0x13000000 0x0 0x10000>; + resets = <&syscrg JH7110_SYSRST_DDR_AXI>, + <&syscrg JH7110_SYSRST_DDR_OSC>, + <&syscrg JH7110_SYSRST_DDR_APB>; + reset-names = "axi", "osc", "apb"; + clocks = <&syscrg JH7110_SYSCLK_PLL1_OUT>; + clock-names = "pll1_out"; + clock-frequency = <2133>; + }; + }; +}; + +&osc { + u-boot,dm-spl; +}; + +&gmac0_rmii_refin { + u-boot,dm-spl; +}; + +&aoncrg { + u-boot,dm-spl; +}; + +&syscrg { + u-boot,dm-spl; + starfive,sys-syscon = <&sys_syscon>; +}; + +&stgcrg { + u-boot,dm-spl; +}; + +&sys_syscon { + u-boot,dm-spl; +}; + +&S7_0 { + status = "okay"; +};