Message ID | 20230222154414.49219-2-ralph.siemsen@linaro.org |
---|---|
State | RFC |
Delegated to: | Marek Vasut |
Headers | show
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[206.248.184.2]) by smtp.gmail.com with ESMTPSA id t41-20020a05622a182900b003bfad864e81sm522246qtc.69.2023.02.22.07.44.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Feb 2023 07:44:23 -0800 (PST) From: Ralph Siemsen <ralph.siemsen@linaro.org> To: u-boot@lists.denx.de Cc: Ralph Siemsen <ralph.siemsen@linaro.org> Subject: [RFC PATCH v3 1/9] ARM: armv7: add non-SPL enable for Cortex SMPEN Date: Wed, 22 Feb 2023 10:44:06 -0500 Message-Id: <20230222154414.49219-2-ralph.siemsen@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230222154414.49219-1-ralph.siemsen@linaro.org> References: <20230222154414.49219-1-ralph.siemsen@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion <u-boot.lists.denx.de> List-Unsubscribe: <https://lists.denx.de/options/u-boot>, <mailto:u-boot-request@lists.denx.de?subject=unsubscribe> List-Archive: <https://lists.denx.de/pipermail/u-boot/> List-Post: <mailto:u-boot@lists.denx.de> List-Help: <mailto:u-boot-request@lists.denx.de?subject=help> List-Subscribe: <https://lists.denx.de/listinfo/u-boot>, <mailto:u-boot-request@lists.denx.de?subject=subscribe> Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" <u-boot-bounces@lists.denx.de> X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean |
Series |
Renesas RZ/N1 SoC initial support
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diff --git a/arch/arm/cpu/armv7/Kconfig b/arch/arm/cpu/armv7/Kconfig index f1e4e26b8f..e33e53636a 100644 --- a/arch/arm/cpu/armv7/Kconfig +++ b/arch/arm/cpu/armv7/Kconfig @@ -107,6 +107,11 @@ config ARMV7_LPAE Say Y here to use the long descriptor page table format. This is required if U-Boot runs in HYP mode. +config ARMV7_SET_CORTEX_SMPEN + bool + help + Enable the ARM Cortex ACTLR.SMP enable bit in U-boot. + config SPL_ARMV7_SET_CORTEX_SMPEN bool help
Commit 2564fce7eea3 ("sunxi: move Cortex SMPEN setting into start.S") added SPL_ARMV7_SET_CORTEX_SMPEN to enable setting SMP bit. For platforms not using SPL boot, add the corresponding non-SPL config, so that CONFIG_IS_ENABLED(ARMV7_SET_CORTEX_SMPEN) works as expected. Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org> --- This will be used by the following commit that adds ARCH_RZN1. (no changes since v1) arch/arm/cpu/armv7/Kconfig | 5 +++++ 1 file changed, 5 insertions(+)