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[2/2] arm: socfpga: soc64: Add mask support to INTEL_SIP_SMC_HPS_SET_BRIDGES

Message ID 20221123140720.31941-2-jit.loon.lim@intel.com
State Needs Review / ACK, archived
Delegated to: Marek Vasut
Headers show
Series [1/2] arm: socfpga: soc64: Add mask support when enable/disable bridges | expand

Commit Message

Jit Loon Lim Nov. 23, 2022, 2:07 p.m. UTC 
From: Ley Foon Tan <ley.foon.tan@intel.com>

HSD #18016042797-2: Add mask support to INTEL_SIP_SMC_HPS_SET_BRIDGES SMC call.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
---
 arch/arm/mach-socfpga/reset_manager_s10.c | 10 +++++++---
 include/linux/intel-smc.h                 | 14 ++++++++++----
 2 files changed, 17 insertions(+), 7 deletions(-)
diff mbox series

Patch

diff --git a/arch/arm/mach-socfpga/reset_manager_s10.c b/arch/arm/mach-socfpga/reset_manager_s10.c
index 128cdbbbe3..bc643218d2 100644
--- a/arch/arm/mach-socfpga/reset_manager_s10.c
+++ b/arch/arm/mach-socfpga/reset_manager_s10.c
@@ -266,11 +266,15 @@  static __always_inline void socfpga_s2f_bridges_reset(int enable,
 void socfpga_bridges_reset(int enable, unsigned int mask)
 {
 	if (!IS_ENABLED(CONFIG_SPL_BUILD) && IS_ENABLED(CONFIG_SPL_ATF)) {
-		u64 arg = enable;
+		u64 arg[2];
 		int ret;
 
-		ret = invoke_smc(INTEL_SIP_SMC_HPS_SET_BRIDGES, &arg, 1, NULL,
-				 0);
+		/* Set bit-1 to indicate has mask value in arg[1]. */
+		arg[0] = (enable & BIT(0)) | BIT(1);
+		arg[1] = mask;
+
+		ret = invoke_smc(INTEL_SIP_SMC_HPS_SET_BRIDGES, arg,
+				 ARRAY_SIZE(arg), NULL, 0);
 		if (ret)
 			printf("Failed to %s the HPS bridges, error %d\n",
 			       enable ? "enable" : "disable", ret);
diff --git a/include/linux/intel-smc.h b/include/linux/intel-smc.h
index a54eff43ad..e15fa3d4da 100644
--- a/include/linux/intel-smc.h
+++ b/include/linux/intel-smc.h
@@ -482,10 +482,16 @@  INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE)
  * Call register usage:
  * a0 INTEL_SIP_SMC_HPS_SET_BRIDGES
  * a1 Set bridges status:
- *      0 - Disable
- *      1 - Enable
- * a2-7 not used
- *
+ *	Bit 0: 0 - Disable, 1 - Enable
+ *	Bit 1: 1 - Has mask value in a2
+ * a2 Mask value
+ *	Bit 0: soc2fpga
+ *	Bit 1: lwhps2fpga
+ *	Bit 2: fpga2soc
+ *	Bit 3: f2sdram0	(For Stratix 10 only)
+ *	Bit 4: f2sdram1	(For Stratix 10 only)
+ *	Bit 5: f2sdram2	(For Stratix 10 only)
+ * a3-7 not used
  * Return status
  * a0 INTEL_SIP_SMC_STATUS_OK
  */