From patchwork Fri Sep 30 09:25:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ashok Reddy Soma X-Patchwork-Id: 1684785 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=amd.com header.i=@amd.com header.a=rsa-sha256 header.s=selector1 header.b=3vYrbqwg; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Mf4cK0cwmz1yql for ; Fri, 30 Sep 2022 19:26:41 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id C87EE84D7A; Fri, 30 Sep 2022 11:26:37 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=amd.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=amd.com header.i=@amd.com header.b="3vYrbqwg"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 04B9184D79; Fri, 30 Sep 2022 11:26:36 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS, SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: from NAM11-BN8-obe.outbound.protection.outlook.com (mail-bn8nam11on2040.outbound.protection.outlook.com [40.107.236.40]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id D983184D7E for ; Fri, 30 Sep 2022 11:26:31 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=amd.com Authentication-Results: phobos.denx.de; spf=fail smtp.mailfrom=ashok.reddy.soma@amd.com ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=ilREHd7QLn2eHbCRbX5S8oO50rxYeOPxAClt7zy9vUZp3JJm8+q89gtp0fYBmaaUYCLJW6K9ApvbeE9ELIGMpICJ1GGxHOpiulZ2HhHCzXrKvT3BfH8DKyh0U7y6gOrH44ezNHqOqxBG71lQCNWiScOgrclqIW5ZssL0iRk2/Q2eKRcOc/jhYHVjL8IJGfURUhquwUpBY3VLjo76KgggXnTmDovyMB85HYdUhREemPTQxauJOxUpJUAvaW83TY05e8e7hfJ8TbY/9lXvMSajDJdgSK6M4Gp5oBJAAqJ49vged/lNlVBKTUWBfuy7MOMP6wJ23QXByKxgcomFxHFuQA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=T6/k01strpU9SIVNYC1TrA/0Hiy9oHTn55eTmKu0NvU=; b=Sy2xBGHNvMvD7rVi54ioBP5FBI8ZDZHYdCNM2vW+/OhJjE2hAs0zyTqKufbGCuyanjU1YC4MS4HAAJgkK4nQ91l+RP3V7g4I3ejL2qOPMTNurySMC9OgKNcLvHOcR/1vg/b+nliMKsXgMyNX5w3aD84gFy/JsxEEgnuLV9J+zuUWLcVBbZyBFv+hRpE2GFp9pjLA5lk7T6duibLio9im1SR5Fj8+oYPKTNY97befIHQ1yvHCqpx0smezVkeooYNeSVLJsovbqOAh9x5ssb85wHLxB6IGADcNqMIA4y/hqk7diYCttyz4GFNGpBnDwsQJ6/9HvIWE3yXYTCzF7nIVvw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=lists.denx.de smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=T6/k01strpU9SIVNYC1TrA/0Hiy9oHTn55eTmKu0NvU=; b=3vYrbqwgXGypNpqWWbhQVnTQV6fzopkJnAlmDoZiK8qECmqEmv4sOZXeVnPZXk6FfXpOUHKuCVqCya/lnTiTM2i0zMRS+zznjkzjrbqaNx4sDrOpHC5silokRxpCXySwBjGdjQJMoXL58NyW+cmAawHuigwM26iV6csqvFQRWjs= Received: from MW2PR2101CA0022.namprd21.prod.outlook.com (2603:10b6:302:1::35) by DS7PR12MB6168.namprd12.prod.outlook.com (2603:10b6:8:97::8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5676.19; Fri, 30 Sep 2022 09:26:28 +0000 Received: from CO1NAM11FT103.eop-nam11.prod.protection.outlook.com (2603:10b6:302:1:cafe::e8) by MW2PR2101CA0022.outlook.office365.com (2603:10b6:302:1::35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5709.0 via Frontend Transport; Fri, 30 Sep 2022 09:26:28 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by CO1NAM11FT103.mail.protection.outlook.com (10.13.174.252) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.5676.17 via Frontend Transport; Fri, 30 Sep 2022 09:26:27 +0000 Received: from SATLEXMB05.amd.com (10.181.40.146) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.28; Fri, 30 Sep 2022 04:26:26 -0500 Received: from SATLEXMB03.amd.com (10.181.40.144) by SATLEXMB05.amd.com (10.181.40.146) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.28; Fri, 30 Sep 2022 04:26:06 -0500 Received: from xhdashokred41.xilinx.com (10.180.168.240) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.28 via Frontend Transport; Fri, 30 Sep 2022 04:26:04 -0500 From: Ashok Reddy Soma To: CC: , , , , , , , "Ashok Reddy Soma" Subject: [PATCH 2/3] mmc: zynq_sdhci: Read power-domains id from DT and use Date: Fri, 30 Sep 2022 03:25:47 -0600 Message-ID: <20220930092548.18453-3-ashok.reddy.soma@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220930092548.18453-1-ashok.reddy.soma@amd.com> References: <20220930092548.18453-1-ashok.reddy.soma@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT103:EE_|DS7PR12MB6168:EE_ X-MS-Office365-Filtering-Correlation-Id: a0fe8df6-a64e-4ed2-f7db-08daa2c5da21 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: RB0cPyymQ7TvHRJm/fdv415uL9p+Y3m7+HN9G2bEla+tB1bw4yZDWcXSaW8RGgFlkOkBKJKAm4o58nS6k6d1/JZCpgDIEXMxw7NMsTT8Nsqo0J5lX3ZUMRX6di2t1sioL0i9m8R7VzzNi1KpvVBUuaIYZrFp3jWp2uksFBvbX2RjW5ufDN18Zw4xl0jmyRgVen3dmGFGV63I6CTei3wvewILyA3iqlLfOlyoafHJw4E/1S6N4zuRJYVdk9D/hPGIdJrlvxXUtZbZ5lmD1NFQCW0EVrGQtKu7/IN5bah1VtZYmmGR8hiMcxb/5HHec0HL7N8hSpr90Gu4ZLgNwniFpypqLpUVgqHh16Mf3W/Qqag+Of1KRIs0IInU/xgVmdKo5Kf+RvTHvggW5w5VENAOIduxfrmEop6N62Zfzc1SnWOO6eRhiDo4/7o0hNl9hgSQZSWKuWpwmQL8lVmVdgu+9DH2yNdS766X1zuam07Pp0CVukOvcU0mcE+VsFTQSAsj1+r0KfY7f1B3q5hhS0Ehu3Qud8EBern75jxy/iNJzlpznazpFwLwksPvO40VQsTuqcGQh5Y+A8XUMCfjOrFJMHGmVo5lGaatVxW9JvUJ6Gm6/NupPG+hkq3MPBOQ1EmbNtiFMvj/wF8yHey4UaMhF4az6IeREC0ucDErFhdGwrUQzsgshq95YQIJLgB2WtrIGf4qcHmRRDTZYrJJYfKv/HMVMBpZ6n8kguinGYvNlpwRLO6xYNEF8JgrMmvAx4Ihl+jsn3Y+KyhESEkyz0e0ZR2NLdSmyHM+ScccbOqRDLvrRxXCwO4ifxo6xLfrvSlQ X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230022)(4636009)(376002)(396003)(136003)(39860400002)(346002)(451199015)(46966006)(36840700001)(40470700004)(6916009)(54906003)(86362001)(40460700003)(8936002)(6666004)(41300700001)(1076003)(103116003)(2616005)(2906002)(186003)(8676002)(316002)(70586007)(82740400003)(36756003)(4326008)(70206006)(36860700001)(336012)(426003)(5660300002)(47076005)(81166007)(26005)(83380400001)(40480700001)(356005)(82310400005)(478600001)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Sep 2022 09:26:27.5138 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a0fe8df6-a64e-4ed2-f7db-08daa2c5da21 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT103.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB6168 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Firmware calls need node_id which is basically "power-domains" id. At present static values are used based on the "device_id" property of dt. Instead of this, read "power-domains" id from dt and use it. Add a element called node_id in priv structure and read it from dt. Replace static node_id with this priv->node_id across the driver. Since "device_id" is not used anywhere else simply remove it. Signed-off-by: Ashok Reddy Soma --- drivers/mmc/zynq_sdhci.c | 39 ++++++++++++++++++++------------------- 1 file changed, 20 insertions(+), 19 deletions(-) diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c index 3a4194452c..7dcf6ad842 100644 --- a/drivers/mmc/zynq_sdhci.c +++ b/drivers/mmc/zynq_sdhci.c @@ -61,7 +61,7 @@ struct arasan_sdhci_plat { struct arasan_sdhci_priv { struct sdhci_host *host; struct arasan_sdhci_clk_data clk_data; - u8 deviceid; + u32 node_id; u8 bank; u8 no_1p8; struct reset_ctl_bulk resets; @@ -250,7 +250,6 @@ static int arasan_sdhci_execute_tuning(struct mmc *mmc, u8 opcode) struct sdhci_host *host; struct arasan_sdhci_priv *priv = dev_get_priv(mmc->dev); char tuning_loop_counter = SDHCI_TUNING_LOOP_COUNT; - u8 node_id = priv->deviceid ? NODE_SD_1 : NODE_SD_0; dev_dbg(mmc->dev, "%s\n", __func__); @@ -262,7 +261,7 @@ static int arasan_sdhci_execute_tuning(struct mmc *mmc, u8 opcode) mdelay(1); - arasan_zynqmp_dll_reset(host, node_id); + arasan_zynqmp_dll_reset(host, priv->node_id); sdhci_writel(host, SDHCI_INT_DATA_AVAIL, SDHCI_INT_ENABLE); sdhci_writel(host, SDHCI_INT_DATA_AVAIL, SDHCI_SIGNAL_ENABLE); @@ -308,7 +307,7 @@ static int arasan_sdhci_execute_tuning(struct mmc *mmc, u8 opcode) } udelay(1); - arasan_zynqmp_dll_reset(host, node_id); + arasan_zynqmp_dll_reset(host, priv->node_id); /* Enable only interrupts served by the SD controller */ sdhci_writel(host, SDHCI_INT_DATA_MASK | SDHCI_INT_CMD_MASK, @@ -334,7 +333,6 @@ static int sdhci_zynqmp_sdcardclk_set_phase(struct sdhci_host *host, struct mmc *mmc = (struct mmc *)host->mmc; struct udevice *dev = mmc->dev; struct arasan_sdhci_priv *priv = dev_get_priv(mmc->dev); - u8 node_id = priv->deviceid ? NODE_SD_1 : NODE_SD_0; u8 tap_delay, tap_max = 0; int timing = mode2timing[mmc->selected_mode]; int ret; @@ -374,14 +372,14 @@ static int sdhci_zynqmp_sdcardclk_set_phase(struct sdhci_host *host, tap_delay &= SDHCI_ARASAN_OTAPDLY_SEL_MASK; /* Set the Clock Phase */ - ret = arasan_zynqmp_set_out_tapdelay(node_id, tap_delay); + ret = arasan_zynqmp_set_out_tapdelay(priv->node_id, tap_delay); if (ret) { dev_err(dev, "Error setting output Tap Delay\n"); return ret; } /* Release DLL Reset */ - ret = zynqmp_dll_reset(node_id, PM_DLL_RESET_RELEASE); + ret = zynqmp_dll_reset(priv->node_id, PM_DLL_RESET_RELEASE); if (ret) { dev_err(dev, "dll_reset release failed with err: %d\n", ret); return ret; @@ -405,7 +403,6 @@ static int sdhci_zynqmp_sampleclk_set_phase(struct sdhci_host *host, struct mmc *mmc = (struct mmc *)host->mmc; struct udevice *dev = mmc->dev; struct arasan_sdhci_priv *priv = dev_get_priv(mmc->dev); - u8 node_id = priv->deviceid ? NODE_SD_1 : NODE_SD_0; u8 tap_delay, tap_max = 0; int timing = mode2timing[mmc->selected_mode]; int ret; @@ -419,7 +416,7 @@ static int sdhci_zynqmp_sampleclk_set_phase(struct sdhci_host *host, return 0; /* Assert DLL Reset */ - ret = zynqmp_dll_reset(node_id, PM_DLL_RESET_ASSERT); + ret = zynqmp_dll_reset(priv->node_id, PM_DLL_RESET_ASSERT); if (ret) { dev_err(dev, "dll_reset assert failed with err: %d\n", ret); return ret; @@ -451,7 +448,7 @@ static int sdhci_zynqmp_sampleclk_set_phase(struct sdhci_host *host, /* Limit input tap_delay value to 8 bits */ tap_delay &= SDHCI_ARASAN_ITAPDLY_SEL_MASK; - ret = arasan_zynqmp_set_in_tapdelay(node_id, tap_delay); + ret = arasan_zynqmp_set_in_tapdelay(priv->node_id, tap_delay); if (ret) { dev_err(dev, "Error setting Input Tap Delay\n"); return ret; @@ -717,14 +714,14 @@ static int sdhci_zynqmp_set_dynamic_config(struct arasan_sdhci_priv *priv, struct udevice *dev) { int ret; - u32 node_id = priv->deviceid ? NODE_SD_1 : NODE_SD_0; struct clk clk; unsigned long clock, mhz; - ret = xilinx_pm_request(PM_REQUEST_NODE, node_id, ZYNQMP_PM_CAPABILITY_ACCESS, - ZYNQMP_PM_MAX_QOS, ZYNQMP_PM_REQUEST_ACK_NO, NULL); + ret = xilinx_pm_request(PM_REQUEST_NODE, priv->node_id, + ZYNQMP_PM_CAPABILITY_ACCESS, ZYNQMP_PM_MAX_QOS, + ZYNQMP_PM_REQUEST_ACK_NO, NULL); if (ret) { - dev_err(dev, "Request node failed for %d\n", node_id); + dev_err(dev, "Request node failed for %d\n", priv->node_id); return ret; } @@ -743,13 +740,13 @@ static int sdhci_zynqmp_set_dynamic_config(struct arasan_sdhci_priv *priv, return ret; } - ret = zynqmp_pm_set_sd_config(node_id, SD_CONFIG_FIXED, 0); + ret = zynqmp_pm_set_sd_config(priv->node_id, SD_CONFIG_FIXED, 0); if (ret) { dev_err(dev, "SD_CONFIG_FIXED failed\n"); return ret; } - ret = zynqmp_pm_set_sd_config(node_id, SD_CONFIG_EMMC_SEL, + ret = zynqmp_pm_set_sd_config(priv->node_id, SD_CONFIG_EMMC_SEL, dev_read_bool(dev, "non-removable")); if (ret) { dev_err(dev, "SD_CONFIG_EMMC_SEL failed\n"); @@ -779,13 +776,13 @@ static int sdhci_zynqmp_set_dynamic_config(struct arasan_sdhci_priv *priv, else mhz = 25; - ret = zynqmp_pm_set_sd_config(node_id, SD_CONFIG_BASECLK, mhz); + ret = zynqmp_pm_set_sd_config(priv->node_id, SD_CONFIG_BASECLK, mhz); if (ret) { dev_err(dev, "SD_CONFIG_BASECLK failed\n"); return ret; } - ret = zynqmp_pm_set_sd_config(node_id, SD_CONFIG_8BIT, + ret = zynqmp_pm_set_sd_config(priv->node_id, SD_CONFIG_8BIT, (dev_read_u32_default(dev, "bus-width", 1) == 8)); if (ret) { dev_err(dev, "SD_CONFIG_8BIT failed\n"); @@ -900,6 +897,7 @@ static int arasan_sdhci_probe(struct udevice *dev) static int arasan_sdhci_of_to_plat(struct udevice *dev) { struct arasan_sdhci_priv *priv = dev_get_priv(dev); + u32 pm_info[2]; priv->host = calloc(1, sizeof(struct sdhci_host)); if (!priv->host) @@ -916,10 +914,13 @@ static int arasan_sdhci_of_to_plat(struct udevice *dev) if (IS_ERR(priv->host->ioaddr)) return PTR_ERR(priv->host->ioaddr); - priv->deviceid = dev_read_u32_default(dev, "xlnx,device_id", -1); priv->bank = dev_read_u32_default(dev, "xlnx,mio-bank", 0); priv->no_1p8 = dev_read_bool(dev, "no-1-8-v"); + priv->node_id = 0; + if (!dev_read_u32_array(dev, "power-domains", pm_info, ARRAY_SIZE(pm_info))) + priv->node_id = pm_info[1]; + return 0; }