From patchwork Sun Sep 25 14:46:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chong, Teik Heng" X-Patchwork-Id: 1682177 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=XJ0EA78c; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Mb7xV3SXQz1ypX for ; Mon, 26 Sep 2022 00:46:20 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 155EA84A92; Sun, 25 Sep 2022 16:46:14 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="XJ0EA78c"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 81F7384AEB; Sun, 25 Sep 2022 16:46:12 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id E2F6E84A20 for ; Sun, 25 Sep 2022 16:46:09 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=teik.heng.chong@intel.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1664117170; x=1695653170; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=qVHieBajFsDYRigiZIcHb3DqG79U+VTDOYmp/8GWfS0=; b=XJ0EA78cFus49HjCxoOZunN7J884mFehJyQ28FY4lbcFqqCRaX7pchM5 gRaWdJCcaal9wG1lQzfQNTpEGemuDSEwD6ouTFp+b7raxstPJJFHQhcu4 a5ttEJ/BGYL0ejFvdWecLDPs2IgyeMUV1wg/ZsHJyjyMmNSKHVYiCyMgx tXNqZYs+rVFwPx8pxLpwU8bXyeX8OhZiBoc19qPkV4f+qWW6uEUvk1VeX D1R+lnd0aUQQEuxsw7TNhBKcWiibnaZg1SFO/ZQ7s2Gls6nZzWCW1mUic QyXGlflaD8NBM0YPsg9h2LxtOoyP/1v01VcgRuyOUlGmUJZF0wFg9Bv4s A==; X-IronPort-AV: E=McAfee;i="6500,9779,10481"; a="362697212" X-IronPort-AV: E=Sophos;i="5.93,344,1654585200"; d="scan'208";a="362697212" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Sep 2022 07:46:08 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,344,1654585200"; d="scan'208";a="763166597" Received: from pgli4336.png.intel.com ([10.221.172.41]) by fmsmga001.fm.intel.com with ESMTP; 25 Sep 2022 07:46:04 -0700 From: teik.heng.chong@intel.com To: u-boot@lists.denx.de Cc: Marek , Simon , Tien Fong , Kok Kiang , Siew Chin , Sin Hui , Raaj , Dinesh , Boon Khai , Alif , Teik Heng , Hazim , Jit Loon Lim , Sieu Mun Tang Subject: [PATCH] ARM: socfpga: Ensure FPGA in user mode before enabling the bridges Date: Sun, 25 Sep 2022 22:46:00 +0800 Message-Id: <20220925144600.11328-1-teik.heng.chong@intel.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Tien Fong Chee Unexpected behavior and error can occur if FPGA is accessed in unknown state.Always checking with FPGA in user mode is required to ensure system stability. Signed-off-by: Tien Fong Chee Signed-off-by: Teik Heng Chong --- arch/arm/mach-socfpga/misc_arria10.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-socfpga/misc_arria10.c b/arch/arm/mach-socfpga/misc_arria10.c index 7ce888d197..89298f5d4d 100644 --- a/arch/arm/mach-socfpga/misc_arria10.c +++ b/arch/arm/mach-socfpga/misc_arria10.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -126,10 +127,16 @@ int print_cpuinfo(void) void do_bridge_reset(int enable, unsigned int mask) { - if (enable) - socfpga_reset_deassert_bridges_handoff(); - else + if (enable) { + if (is_fpgamgr_user_mode()) { + socfpga_reset_deassert_bridges_handoff(); + } else { + puts("Bridges: Failed to enable because FPGA is not "); + puts("in user mode\n"); + } + } else { socfpga_bridges_reset(); + } } /*