@@ -12,7 +12,7 @@
void socfpga_watchdog_disable(void);
void socfpga_reset_deassert_noc_ddr_scheduler(void);
int socfpga_reset_deassert_bridges_handoff(void);
-void socfpga_reset_deassert_osc1wd0(void);
+void socfpga_reset_deassert_wd0(void);
int socfpga_bridges_reset(void);
#define RSTMGR_A10_STATUS 0x00
@@ -109,8 +109,8 @@ int socfpga_reset_deassert_bridges_handoff(void)
mask_noc, false, 1000, false);
}
-/* Release L4 OSC1 Watchdog Timer 0 from reset through reset manager */
-void socfpga_reset_deassert_osc1wd0(void)
+/* Release Watchdog 0 from reset through reset manager */
+void socfpga_reset_deassert_wd0(void)
{
clrbits_le32(socfpga_get_rstmgr_addr() + RSTMGR_A10_PER1MODRST,
ALT_RSTMGR_PER1MODRST_WD0_SET_MSK);
@@ -263,8 +263,8 @@ void board_init_f(ulong dummy)
cm_basic_init(gd->fdt_blob);
#ifdef CONFIG_HW_WATCHDOG
- /* release osc1 watchdog timer 0 from reset */
- socfpga_reset_deassert_osc1wd0();
+ /* release watchdog 0 from reset */
+ socfpga_reset_deassert_wd0();
/* reconfigure and enable the watchdog */
hw_watchdog_init();