From patchwork Fri Jul 22 09:30:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quentin Schulz X-Patchwork-Id: 1659453 X-Patchwork-Delegate: ykai007@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4Lq41b23Kcz9s07 for ; Fri, 22 Jul 2022 19:30:59 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 37F3883F98; Fri, 22 Jul 2022 11:30:45 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=0leil.net Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 6D41383F89; Fri, 22 Jul 2022 11:30:39 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from relay2-d.mail.gandi.net (relay2-d.mail.gandi.net [217.70.183.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 53C3383AD1 for ; Fri, 22 Jul 2022 11:30:36 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=0leil.net Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=foss+uboot@0leil.net Received: (Authenticated sender: foss@0leil.net) by mail.gandi.net (Postfix) with ESMTPSA id 53C9940008; Fri, 22 Jul 2022 09:30:34 +0000 (UTC) From: Quentin Schulz To: Cc: sjg@chromium.org, philipp.tomsich@vrull.eu, kever.yang@rock-chips.com, alpernebiyasak@gmail.com, email2tema@gmail.com, jagan@amarulasolutions.com, u-boot@lists.denx.de, Quentin Schulz , Quentin Schulz Subject: [PATCH v3 2/2] rockchip: rk3399: fix incorrect ifdef check on SPL_GPIO Date: Fri, 22 Jul 2022 11:30:14 +0200 Message-Id: <20220722093014.3850165-2-foss+uboot@0leil.net> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220722093014.3850165-1-foss+uboot@0leil.net> References: <20220722093014.3850165-1-foss+uboot@0leil.net> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Quentin Schulz The check to perform is on CONFIG_SPL_GPIO and not SPL_GPIO. Because this was never compiled in, it missed an include of cru.h that was not detected before. Let's include it too. Also switch to IS_ENABLED in-code check as it is the preferred inclusion/exclusion mechanism. Fixes: 07586ee4322a ("rockchip: rk3399: Support common spl_board_init") Cc: Quentin Schulz Signed-off-by: Quentin Schulz Reviewed-by: Kever Yang --- v3: - always include header to fix compilation for boards with CONFIG_SPL_GPIO disabled, - always define rk3399_force_power_on_reset function by using an in-code IS_ENABLED check instead of an ifdef to fix compilation for boards with CONFIG_SPL_GPIO disabled, v2: - use IS_ENABLED checks, arch/arm/mach-rockchip/rk3399/rk3399.c | 50 ++++++++++++++------------ 1 file changed, 28 insertions(+), 22 deletions(-) diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c index 8205511c25..fc1acaf4bd 100644 --- a/arch/arm/mach-rockchip/rk3399/rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/rk3399.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -221,12 +222,17 @@ void spl_perform_fixups(struct spl_image_info *spl_image) "u-boot,spl-boot-device", boot_ofpath); } -#if defined(SPL_GPIO) static void rk3399_force_power_on_reset(void) { ofnode node; struct gpio_desc sysreset_gpio; + if (!IS_ENABLED(CONFIG_SPL_GPIO)) { + debug("%s: trying to force a power-on reset but no GPIO " + "support in SPL!\n", __func__); + return; + } + debug("%s: trying to force a power-on reset\n", __func__); node = ofnode_path("/config"); @@ -243,7 +249,6 @@ static void rk3399_force_power_on_reset(void) dm_gpio_set_value(&sysreset_gpio, 1); } -#endif void __weak led_setup(void) { @@ -253,27 +258,28 @@ void spl_board_init(void) { led_setup(); -#if defined(SPL_GPIO) - struct rockchip_cru *cru = rockchip_get_cru(); + if (IS_ENABLED(CONFIG_SPL_GPIO)) { + struct rockchip_cru *cru = rockchip_get_cru(); - /* - * The RK3399 resets only 'almost all logic' (see also in the TRM - * "3.9.4 Global software reset"), when issuing a software reset. - * This may cause issues during boot-up for some configurations of - * the application software stack. - * - * To work around this, we test whether the last reset reason was - * a power-on reset and (if not) issue an overtemp-reset to reset - * the entire module. - * - * While this was previously fixed by modifying the various places - * that could generate a software reset (e.g. U-Boot's sysreset - * driver, the ATF or Linux), we now have it here to ensure that - * we no longer have to track this through the various components. - */ - if (cru->glb_rst_st != 0) - rk3399_force_power_on_reset(); -#endif + /* + * The RK3399 resets only 'almost all logic' (see also in the + * TRM "3.9.4 Global software reset"), when issuing a software + * reset. This may cause issues during boot-up for some + * configurations of the application software stack. + * + * To work around this, we test whether the last reset reason + * was a power-on reset and (if not) issue an overtemp-reset to + * reset the entire module. + * + * While this was previously fixed by modifying the various + * places that could generate a software reset (e.g. U-Boot's + * sysreset driver, the ATF or Linux), we now have it here to + * ensure that we no longer have to track this through the + * various components. + */ + if (cru->glb_rst_st != 0) + rk3399_force_power_on_reset(); + } if (IS_ENABLED(CONFIG_SPL_DM_REGULATOR)) { /*