From patchwork Thu Jul 21 13:20:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martyn Welch X-Patchwork-Id: 1659028 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=collabora.com header.i=@collabora.com header.a=rsa-sha256 header.s=mail header.b=G7FZclPG; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4LpY9r1X32z9s1l for ; Thu, 21 Jul 2022 23:21:20 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id E9C9284114; Thu, 21 Jul 2022 15:21:07 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=collabora.com header.i=@collabora.com header.b="G7FZclPG"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id CB55D840EE; Thu, 21 Jul 2022 15:20:58 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.2 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id D7F46840BB for ; Thu, 21 Jul 2022 15:20:52 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=martyn.welch@collabora.com Received: from pan.home (unknown [IPv6:2a00:23c6:c30a:1501:427e:206e:3eb7:267d]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: martyn) by madras.collabora.co.uk (Postfix) with ESMTPSA id 334686601AA5; Thu, 21 Jul 2022 14:20:52 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1658409652; bh=ZplwwqgxEnRsD1ZRe8HSPFmNSCG0t/HlY7ME+yAiRF8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=G7FZclPG44fF9Ms5oG5h+wmlg6smwtFogMIOW7eqlcHnO+3p2/WKEIMPzUWhkQKA0 B9cMBYiI2yVvPwT449ooZJyvke4xk4zYa/F7z6N5jDGCrYv8eTtSTxKowizrThKAoU NUjfvxmotzlBHMpstdKO4NpgbNQPTFnWMFBbMaUBzUDjHSN+StzDx40xxWHCLzj4PM bVeECI08S6dxwtjMbdx5tOqESPvOgjqCZTLyHWY5CkZYWOy8bWIoarsqau0iJRQTAy Qc9gAhUcVFCOV7huXHhiSGNSWquNUIZ2eGG4ewy/HYEK5p0Y9QAZrxjtnZtXJj5zhC H67pVnAmFzt7Q== From: Martyn Welch To: Stefano Babic , Fabio Estevam , "NXP i.MX U-Boot Team" Cc: Martyn Welch , u-boot@lists.denx.de Subject: [PATCH 2/5] ARM: imx: imx8mp: Enable support for i2c5 and i2c6 on i.MX8MP Date: Thu, 21 Jul 2022 14:20:37 +0100 Message-Id: <20220721132041.2640418-2-martyn.welch@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220721132041.2640418-1-martyn.welch@collabora.com> References: <20220721132041.2640418-1-martyn.welch@collabora.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean The i.MX8MP SoC contains 2 more i2c buses. Add support for the configuration of these buses. Signed-off-by: Martyn Welch --- arch/arm/include/asm/arch-imx8m/imx-regs.h | 4 ++++ arch/arm/mach-imx/i2c-mxv7.c | 6 ++++++ arch/arm/mach-imx/imx8m/clock_imx8mm.c | 12 +++++++++--- 3 files changed, 19 insertions(+), 3 deletions(-) diff --git a/arch/arm/include/asm/arch-imx8m/imx-regs.h b/arch/arm/include/asm/arch-imx8m/imx-regs.h index 912c28e624..6bdf7a7d4f 100644 --- a/arch/arm/include/asm/arch-imx8m/imx-regs.h +++ b/arch/arm/include/asm/arch-imx8m/imx-regs.h @@ -43,6 +43,10 @@ #define I2C3_BASE_ADDR 0x30A40000 #define I2C4_BASE_ADDR 0x30A50000 #define UART4_BASE_ADDR 0x30A60000 +#ifdef CONFIG_IMX8MP +#define I2C5_BASE_ADDR 0x30AD0000 +#define I2C6_BASE_ADDR 0x30AE0000 +#endif #define USDHC1_BASE_ADDR 0x30B40000 #define USDHC2_BASE_ADDR 0x30B50000 #if defined(CONFIG_IMX8MM) || defined(CONFIG_IMX8MP) diff --git a/arch/arm/mach-imx/i2c-mxv7.c b/arch/arm/mach-imx/i2c-mxv7.c index d36347d8e8..d3b4f6c9a8 100644 --- a/arch/arm/mach-imx/i2c-mxv7.c +++ b/arch/arm/mach-imx/i2c-mxv7.c @@ -70,6 +70,12 @@ static void * const i2c_bases[] = { #ifdef I2C4_BASE_ADDR (void *)I2C4_BASE_ADDR, #endif +#ifdef I2C5_BASE_ADDR + (void *)I2C5_BASE_ADDR, +#endif +#ifdef I2C6_BASE_ADDR + (void *)I2C6_BASE_ADDR, +#endif }; /* i2c_index can be from 0 - 3 */ diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mm.c b/arch/arm/mach-imx/imx8m/clock_imx8mm.c index 4db55f8608..64ad57e9b3 100644 --- a/arch/arm/mach-imx/imx8m/clock_imx8mm.c +++ b/arch/arm/mach-imx/imx8m/clock_imx8mm.c @@ -36,11 +36,17 @@ void enable_ocotp_clk(unsigned char enable) int enable_i2c_clk(unsigned char enable, unsigned i2c_num) { - /* 0 - 3 is valid i2c num */ - if (i2c_num > 3) + u8 i2c_ccgr[6] = { + CCGR_I2C1, CCGR_I2C2, CCGR_I2C3, CCGR_I2C4, +#if (IS_ENABLED(CONFIG_IMX8MP)) + CCGR_I2C5_8MP, CCGR_I2C6_8MP +#endif + }; + + if (i2c_num > ARRAY_SIZE(i2c_ccgr)) return -EINVAL; - clock_enable(CCGR_I2C1 + i2c_num, !!enable); + clock_enable(i2c_ccgr[i2c_num], !!enable); return 0; }