| Message ID | 20220720154142.GF2049@begut |
|---|---|
| State | Deferred |
| Delegated to: | Tom Rini |
| Headers | show |
| Series | mtd: spi: spi-nor: rk3399: rock-pi-4: u-boot/next Support SPI NOR Flash in Rock Pi 4 (XTX xt25f32b) | expand |
On 2022/7/20 23:41, Xavier Drudis Ferran wrote: > Configure Rock Pi 4 to boot from SPI NOR Flash. > > Based on flash chip, board documentation and tests, this is the > fastest I could use it. > > This seems to be the minimum necessary configuration for Rock Pi 4 to > be able to boot from SPI NOR Flash. > > With the next patch, it works to sf probe 1:0, sf read, sf erase, sf > write, sf read and then boot linux and flashrom can write to > it. Sometimes flashrom seems to fail to write when at U-Boot stage > there was no sf read or write, not sure why. Might work better after > a little while off power. > > Note: It seems to work with or without CONFIG_SPL_SPI_FLASH_TINY If I > disable it, and enable CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT I have > to increase CONFIG_SPL_MAX_SIZE (I set it to 0x2e800) because > the SPL grew over 1200 bytes bigger. It might work better, or > just be chance, but it boots from SPI 0.3s slower. So I leave > this out of this patch. > > Changed since v2: > > - added CONFIG_SPL_DM_SEQ_ALIAS to keep spi1 numeration consistent > between SPL and U-Boot > > Changed since v1: > > - include CONFIG_SF_DEFAULT_BUS=1 now that numeration > will be unified between U-Boot and SPL (at patch 5/5) > > Cc: Simon Glass <sjg@chromium.org> > Cc: Philipp Tomsich <philipp.tomsich@vrull.eu> > Cc: Kever Yang <kever.yang@rock-chips.com> > > Signed-off-by: Xavier Drudis Ferran <xdrudis@tinet.cat> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Thanks, - Kever > --- > arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi | 18 ++++++++++++++++++ > configs/rock-pi-4-rk3399_defconfig | 22 ++++++++++++++++++++++ > 2 files changed, 40 insertions(+) > > diff --git a/arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi b/arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi > index c17e769f64..4c2fe8f6bc 100644 > --- a/arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi > +++ b/arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi > @@ -15,3 +15,21 @@ > &vdd_log { > regulator-init-microvolt = <950000>; > }; > + > +&spi1 { > + status = "okay"; > + spi-max-frequency = <40000000>; > + spi-activate-delay = <12000>; /* 12 ms */ > + > + norflash: flash@0 { > + compatible = "rockchip,spidev", "jedec,spi-nor"; > + reg = <0>; > + > + spi-max-frequency = <40000000>; > + spi-cpha; > + spi-cpol; > + > + status = "okay"; > + u-boot,dm-pre-reloc; > + }; > +}; > diff --git a/configs/rock-pi-4-rk3399_defconfig b/configs/rock-pi-4-rk3399_defconfig > index cf2e9fbde3..d5fadcb64f 100644 > --- a/configs/rock-pi-4-rk3399_defconfig > +++ b/configs/rock-pi-4-rk3399_defconfig > @@ -10,6 +10,8 @@ CONFIG_ROCKCHIP_RK3399=y > CONFIG_TARGET_EVB_RK3399=y > CONFIG_DEBUG_UART_BASE=0xFF1A0000 > CONFIG_DEBUG_UART_CLOCK=24000000 > +CONFIG_SPL_SPI_FLASH_SUPPORT=y > +CONFIG_SPL_SPI=y > CONFIG_SYS_LOAD_ADDR=0x800800 > CONFIG_DEBUG_UART=y > CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y > @@ -28,6 +30,10 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 > CONFIG_SPL_STACK=0x400000 > CONFIG_SPL_STACK_R=y > CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 > +CONFIG_SPL_MTD_SUPPORT=y > +CONFIG_SPL_SPI_FLASH_MTD=y > +CONFIG_SPL_SPI_LOAD=y > +CONFIG_SYS_SPI_U_BOOT_OFFS=0xb0000 > CONFIG_TPL=y > CONFIG_CMD_BOOTZ=y > CONFIG_CMD_GPT=y > @@ -40,6 +46,7 @@ CONFIG_SPL_OF_CONTROL=y > CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" > CONFIG_ENV_IS_IN_MMC=y > CONFIG_SYS_RELOC_GD_ENV_ADDR=y > +CONFIG_SPL_DM_SEQ_ALIAS=y > CONFIG_ROCKCHIP_GPIO=y > CONFIG_SYS_I2C_ROCKCHIP=y > CONFIG_MISC=y > @@ -48,21 +55,36 @@ CONFIG_MMC_DW=y > CONFIG_MMC_DW_ROCKCHIP=y > CONFIG_MMC_SDHCI=y > CONFIG_MMC_SDHCI_ROCKCHIP=y > +CONFIG_MTD=y > +CONFIG_DM_MTD=y > +CONFIG_SF_DEFAULT_BUS=1 > +CONFIG_SF_DEFAULT_MODE=0x3 > +CONFIG_SF_DEFAULT_SPEED=40000000 > +CONFIG_SPI_FLASH_SFDP_SUPPORT=y > +CONFIG_SPI_FLASH_SOFT_RESET=y > +CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y > +CONFIG_SPI_FLASH_XTX=y > +CONFIG_SPI_FLASH_MTD=y > CONFIG_DM_ETH=y > CONFIG_ETH_DESIGNWARE=y > CONFIG_GMAC_ROCKCHIP=y > CONFIG_NVME_PCI=y > CONFIG_PCI=y > +CONFIG_SPL_PHY=y > CONFIG_PHY_ROCKCHIP_INNO_USB2=y > CONFIG_PHY_ROCKCHIP_TYPEC=y > +CONFIG_DM_PMIC_FAN53555=y > CONFIG_PMIC_RK8XX=y > CONFIG_REGULATOR_PWM=y > +CONFIG_SPL_REGULATOR_PWM=y > +CONFIG_DM_REGULATOR_GPIO=y > CONFIG_REGULATOR_RK8XX=y > CONFIG_PWM_ROCKCHIP=y > CONFIG_RAM_RK3399_LPDDR4=y > CONFIG_DM_RESET=y > CONFIG_BAUDRATE=1500000 > CONFIG_DEBUG_UART_SHIFT=2 > +CONFIG_ROCKCHIP_SPI=y > CONFIG_SYSRESET=y > CONFIG_USB=y > CONFIG_USB_XHCI_HCD=y
diff --git a/arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi b/arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi index c17e769f64..4c2fe8f6bc 100644 --- a/arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi +++ b/arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi @@ -15,3 +15,21 @@ &vdd_log { regulator-init-microvolt = <950000>; }; + +&spi1 { + status = "okay"; + spi-max-frequency = <40000000>; + spi-activate-delay = <12000>; /* 12 ms */ + + norflash: flash@0 { + compatible = "rockchip,spidev", "jedec,spi-nor"; + reg = <0>; + + spi-max-frequency = <40000000>; + spi-cpha; + spi-cpol; + + status = "okay"; + u-boot,dm-pre-reloc; + }; +}; diff --git a/configs/rock-pi-4-rk3399_defconfig b/configs/rock-pi-4-rk3399_defconfig index cf2e9fbde3..d5fadcb64f 100644 --- a/configs/rock-pi-4-rk3399_defconfig +++ b/configs/rock-pi-4-rk3399_defconfig @@ -10,6 +10,8 @@ CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y @@ -28,6 +30,10 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 +CONFIG_SPL_MTD_SUPPORT=y +CONFIG_SPL_SPI_FLASH_MTD=y +CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_SPI_U_BOOT_OFFS=0xb0000 CONFIG_TPL=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPT=y @@ -40,6 +46,7 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MISC=y @@ -48,21 +55,36 @@ CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_SF_DEFAULT_BUS=1 +CONFIG_SF_DEFAULT_MODE=0x3 +CONFIG_SF_DEFAULT_SPEED=40000000 +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_SOFT_RESET=y +CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y +CONFIG_SPI_FLASH_XTX=y +CONFIG_SPI_FLASH_MTD=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y CONFIG_NVME_PCI=y CONFIG_PCI=y +CONFIG_SPL_PHY=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PHY_ROCKCHIP_TYPEC=y +CONFIG_DM_PMIC_FAN53555=y CONFIG_PMIC_RK8XX=y CONFIG_REGULATOR_PWM=y +CONFIG_SPL_REGULATOR_PWM=y +CONFIG_DM_REGULATOR_GPIO=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM_RK3399_LPDDR4=y CONFIG_DM_RESET=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_ROCKCHIP_SPI=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y
Configure Rock Pi 4 to boot from SPI NOR Flash. Based on flash chip, board documentation and tests, this is the fastest I could use it. This seems to be the minimum necessary configuration for Rock Pi 4 to be able to boot from SPI NOR Flash. With the next patch, it works to sf probe 1:0, sf read, sf erase, sf write, sf read and then boot linux and flashrom can write to it. Sometimes flashrom seems to fail to write when at U-Boot stage there was no sf read or write, not sure why. Might work better after a little while off power. Note: It seems to work with or without CONFIG_SPL_SPI_FLASH_TINY If I disable it, and enable CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT I have to increase CONFIG_SPL_MAX_SIZE (I set it to 0x2e800) because the SPL grew over 1200 bytes bigger. It might work better, or just be chance, but it boots from SPI 0.3s slower. So I leave this out of this patch. Changed since v2: - added CONFIG_SPL_DM_SEQ_ALIAS to keep spi1 numeration consistent between SPL and U-Boot Changed since v1: - include CONFIG_SF_DEFAULT_BUS=1 now that numeration will be unified between U-Boot and SPL (at patch 5/5) Cc: Simon Glass <sjg@chromium.org> Cc: Philipp Tomsich <philipp.tomsich@vrull.eu> Cc: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Xavier Drudis Ferran <xdrudis@tinet.cat> --- arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi | 18 ++++++++++++++++++ configs/rock-pi-4-rk3399_defconfig | 22 ++++++++++++++++++++++ 2 files changed, 40 insertions(+)