@@ -41,7 +41,7 @@ static int spartan2_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize);
/* ------------------------------------------------------------------------- */
/* Spartan-II Generic Implementation */
static int spartan2_load(xilinx_desc *desc, const void *buf, size_t bsize,
- bitstream_type bstype)
+ bitstream_type bstype, int flags)
{
int ret_val = FPGA_FAIL;
@@ -45,7 +45,7 @@ static int spartan3_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize);
/* ------------------------------------------------------------------------- */
/* Spartan-II Generic Implementation */
static int spartan3_load(xilinx_desc *desc, const void *buf, size_t bsize,
- bitstream_type bstype)
+ bitstream_type bstype, int flags)
{
int ret_val = FPGA_FAIL;
@@ -27,7 +27,7 @@ static ulong versal_align_dma_buffer(ulong *buf, u32 len)
}
static int versal_load(xilinx_desc *desc, const void *buf, size_t bsize,
- bitstream_type bstype)
+ bitstream_type bstype, int flags)
{
ulong bin_buf;
int ret;
@@ -94,7 +94,7 @@ static int virtex2_ss_load(xilinx_desc *desc, const void *buf, size_t bsize);
static int virtex2_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize);
static int virtex2_load(xilinx_desc *desc, const void *buf, size_t bsize,
- bitstream_type bstype)
+ bitstream_type bstype, int flags)
{
int ret_val = FPGA_FAIL;
@@ -151,7 +151,7 @@ int xilinx_load(xilinx_desc *desc, const void *buf, size_t bsize,
return FPGA_FAIL;
}
- return desc->operations->load(desc, buf, bsize, bstype);
+ return desc->operations->load(desc, buf, bsize, bstype, flags);
}
#if defined(CONFIG_CMD_FPGA_LOADFS)
@@ -200,7 +200,7 @@ static int zynqmp_validate_bitstream(xilinx_desc *desc, const void *buf,
}
static int zynqmp_load(xilinx_desc *desc, const void *buf, size_t bsize,
- bitstream_type bstype)
+ bitstream_type bstype, int flags)
{
ALLOC_CACHE_ALIGN_BUFFER(u32, bsizeptr, 1);
u32 swap = 0;
@@ -371,7 +371,7 @@ static int zynq_validate_bitstream(xilinx_desc *desc, const void *buf,
}
static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize,
- bitstream_type bstype)
+ bitstream_type bstype, int flags)
{
unsigned long ts; /* Timestamp */
u32 isr_status, swap;
@@ -53,7 +53,7 @@ typedef struct { /* typedef xilinx_desc */
struct xilinx_fpga_op {
int (*load)(xilinx_desc *desc, const void *buf, size_t bsize,
- bitstream_type bstype);
+ bitstream_type bstype, int flags);
int (*loadfs)(xilinx_desc *desc, const void *buf, size_t bsize,
fpga_fs_info *fpga_fsinfo);
int (*loads)(xilinx_desc *desc, const void *buf, size_t bsize,
These flags may be used to check whether an FPGA driver is able to load a particular FPGA bitstream image. Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io> --- (no changes since v1) drivers/fpga/spartan2.c | 2 +- drivers/fpga/spartan3.c | 2 +- drivers/fpga/versalpl.c | 2 +- drivers/fpga/virtex2.c | 2 +- drivers/fpga/xilinx.c | 2 +- drivers/fpga/zynqmppl.c | 2 +- drivers/fpga/zynqpl.c | 2 +- include/xilinx.h | 2 +- 8 files changed, 8 insertions(+), 8 deletions(-)