Message ID | 20220603151522.6643-3-andrey.zhizhikin@leica-geosystems.com |
---|---|
State | Accepted |
Commit | 65d5931d02d47eacdb26b879a252064bf728ae12 |
Delegated to: | Stefano Babic |
Headers | show |
Series | clk: imx8mp: clock names and clock source fixes | expand |
On 03/06/2022 12:15, Andrey Zhizhikin wrote: > Upstream commit 7a2c3be95a50 ("clk: imx8mp: Fill in DWC3 USB, USB PHY, > HSIOMIX clock") added usb_core_ref for USB Controller but never set it > to be used as a clock source, using rather "osc_32k" instead. > > This produces following boot log message: > "clk_register: failed to get osc_32k device (parent of usb_root_clk)" > > Fix the USB controller clock source by using usb_core_ref instead of > osc_32k. > > Fixes: 7a2c3be95a50 ("clk: imx8mp: Fill in DWC3 USB, USB PHY, HSIOMIX > clock") > Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com> > Cc: Fabio Estevam <festevam@denx.de> > Cc: Peng Fan <peng.fan@nxp.com> > Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Fabio Estevam <festevam@denx.de>
On Fri, Jun 3, 2022, 17:16 Andrey Zhizhikin < andrey.zhizhikin@leica-geosystems.com> wrote: > Upstream commit 7a2c3be95a50 ("clk: imx8mp: Fill in DWC3 USB, USB PHY, > HSIOMIX clock") added usb_core_ref for USB Controller but never set it > to be used as a clock source, using rather "osc_32k" instead. > > This produces following boot log message: > "clk_register: failed to get osc_32k device (parent of usb_root_clk)" > > Fix the USB controller clock source by using usb_core_ref instead of > osc_32k. > > Fixes: 7a2c3be95a50 ("clk: imx8mp: Fill in DWC3 USB, USB PHY, HSIOMIX > clock") > Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com> > Cc: Fabio Estevam <festevam@denx.de> > Cc: Peng Fan <peng.fan@nxp.com> > Cc: Stefano Babic <sbabic@denx.de> > --- > drivers/clk/imx/clk-imx8mp.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c > index cbed86a684..ffbc1d1ba9 100644 > --- a/drivers/clk/imx/clk-imx8mp.c > +++ b/drivers/clk/imx/clk-imx8mp.c > @@ -300,7 +300,7 @@ static int imx8mp_clk_probe(struct udevice *dev) > clk_dm(IMX8MP_CLK_UART2_ROOT, imx_clk_gate4("uart2_root_clk", > "uart2", base + 0x44a0, 0)); > clk_dm(IMX8MP_CLK_UART3_ROOT, imx_clk_gate4("uart3_root_clk", > "uart3", base + 0x44b0, 0)); > clk_dm(IMX8MP_CLK_UART4_ROOT, imx_clk_gate4("uart4_root_clk", > "uart4", base + 0x44c0, 0)); > - clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate4("usb_root_clk", > "osc_32k", base + 0x44d0, 0)); > + clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate4("usb_root_clk", > "usb_core_ref", base + 0x44d0, 0)); > clk_dm(IMX8MP_CLK_USB_PHY_ROOT, imx_clk_gate4("usb_phy_root_clk", > "usb_phy_ref", base + 0x44f0, 0)); > clk_dm(IMX8MP_CLK_USDHC1_ROOT, imx_clk_gate4("usdhc1_root_clk", > "usdhc1", base + 0x4510, 0)); > clk_dm(IMX8MP_CLK_USDHC2_ROOT, imx_clk_gate4("usdhc2_root_clk", > "usdhc2", base + 0x4520, 0)); > -- > 2.25.1 > > Reviewed-by: Tommaso Merciai <tommaso.merciai@amarulasolutions.com>
> Upstream commit 7a2c3be95a50 ("clk: imx8mp: Fill in DWC3 USB, USB PHY, > HSIOMIX clock") added usb_core_ref for USB Controller but never set it > to be used as a clock source, using rather "osc_32k" instead. > This produces following boot log message: > "clk_register: failed to get osc_32k device (parent of usb_root_clk)" > Fix the USB controller clock source by using usb_core_ref instead of > osc_32k. > Fixes: 7a2c3be95a50 ("clk: imx8mp: Fill in DWC3 USB, USB PHY, HSIOMIX clock") > Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com> > Cc: Fabio Estevam <festevam@denx.de> > Cc: Peng Fan <peng.fan@nxp.com> > Cc: Stefano Babic <sbabic@denx.de> > Reviewed-by: Fabio Estevam <festevam@denx.de> Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic
diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c index cbed86a684..ffbc1d1ba9 100644 --- a/drivers/clk/imx/clk-imx8mp.c +++ b/drivers/clk/imx/clk-imx8mp.c @@ -300,7 +300,7 @@ static int imx8mp_clk_probe(struct udevice *dev) clk_dm(IMX8MP_CLK_UART2_ROOT, imx_clk_gate4("uart2_root_clk", "uart2", base + 0x44a0, 0)); clk_dm(IMX8MP_CLK_UART3_ROOT, imx_clk_gate4("uart3_root_clk", "uart3", base + 0x44b0, 0)); clk_dm(IMX8MP_CLK_UART4_ROOT, imx_clk_gate4("uart4_root_clk", "uart4", base + 0x44c0, 0)); - clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate4("usb_root_clk", "osc_32k", base + 0x44d0, 0)); + clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate4("usb_root_clk", "usb_core_ref", base + 0x44d0, 0)); clk_dm(IMX8MP_CLK_USB_PHY_ROOT, imx_clk_gate4("usb_phy_root_clk", "usb_phy_ref", base + 0x44f0, 0)); clk_dm(IMX8MP_CLK_USDHC1_ROOT, imx_clk_gate4("usdhc1_root_clk", "usdhc1", base + 0x4510, 0)); clk_dm(IMX8MP_CLK_USDHC2_ROOT, imx_clk_gate4("usdhc2_root_clk", "usdhc2", base + 0x4520, 0));
Upstream commit 7a2c3be95a50 ("clk: imx8mp: Fill in DWC3 USB, USB PHY, HSIOMIX clock") added usb_core_ref for USB Controller but never set it to be used as a clock source, using rather "osc_32k" instead. This produces following boot log message: "clk_register: failed to get osc_32k device (parent of usb_root_clk)" Fix the USB controller clock source by using usb_core_ref instead of osc_32k. Fixes: 7a2c3be95a50 ("clk: imx8mp: Fill in DWC3 USB, USB PHY, HSIOMIX clock") Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com> Cc: Fabio Estevam <festevam@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> --- drivers/clk/imx/clk-imx8mp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)