@@ -188,6 +188,8 @@ the '/images' node should have the following layout:
"u-boot,fpga-legacy" - the generic fpga loading routine.
"u-boot,zynqmp-fpga-ddrauth" - signed non-encrypted FPGA bitstream for
Xilinx Zynq UltraScale+ (ZymqMP) device.
+ "u-boot,zynqmp-fpga-enc" - encrypted FPGA bitstream for Xilinx Zynq
+ UltraScale+ (ZynqMP) device.
Optional nodes:
- hash-1 : Each hash sub-node represents separate hash or checksum
@@ -250,6 +250,11 @@ static int zynqmp_load(xilinx_desc *desc, const void *buf,
info.authflag = ZYNQMP_FPGA_AUTH_DDR;
info.encflag = FPGA_NO_ENC_OR_NO_AUTH;
return desc->operations->loads(desc, buf, bsize, &info);
+ case FPGA_XILINX_ZYNQMP_ENC:
+ /* Encryption using device key */
+ info.authflag = FPGA_NO_ENC_OR_NO_AUTH;
+ info.encflag = FPGA_ENC_DEV_KEY;
+ return desc->operations->loads(desc, buf, bsize, &info);
default:
puts("Unsupported bitstream type\n");
return FPGA_FAIL;
@@ -353,6 +358,9 @@ static int zynqmp_str2flag(xilinx_desc *desc, const char *str)
if (!strncmp(str, "u-boot,zynqmp-fpga-ddrauth", 26))
return FPGA_XILINX_ZYNQMP_DDRAUTH;
+ if (!strncmp(str, "u-boot,zynqmp-fpga-enc", 22))
+ return FPGA_XILINX_ZYNQMP_ENC;
+
return 0;
}
@@ -20,6 +20,7 @@
/* device numbers must be non-negative */
#define FPGA_INVALID_DEVICE -1
+#define FPGA_ENC_DEV_KEY 0
#define FPGA_ENC_USR_KEY 1
#define FPGA_NO_ENC_OR_NO_AUTH 2
@@ -40,6 +40,7 @@ typedef enum { /* typedef xilinx_family */
/* FPGA bitstream supported types */
#define FPGA_LEGACY BIT(0)
#define FPGA_XILINX_ZYNQMP_DDRAUTH BIT(1)
+#define FPGA_XILINX_ZYNQMP_ENC BIT(2)
typedef struct { /* typedef xilinx_desc */
xilinx_family family; /* part type */
@@ -27,6 +27,6 @@ extern struct xilinx_fpga_op zynqmp_op;
#define XILINX_ZYNQMP_DESC \
{ xilinx_zynqmp, csu_dma, 1, &zynqmp_op, 0, &zynqmp_op, NULL, \
- (FPGA_LEGACY | FPGA_XILINX_ZYNQMP_DDRAUTH) }
+ (FPGA_LEGACY | FPGA_XILINX_ZYNQMP_DDRAUTH | FPGA_XILINX_ZYNQMP_ENC) }
#endif /* _ZYNQMPPL_H_ */