From patchwork Fri Apr 29 20:51:02 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tim Harvey X-Patchwork-Id: 1624523 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4Kql5Q2FGVz9sCq for ; Sat, 30 Apr 2022 06:51:20 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id BC40D83B19; Fri, 29 Apr 2022 22:51:12 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=gateworks.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 86A5A83966; Fri, 29 Apr 2022 22:51:11 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.2 Received: from finn.localdomain (finn.gateworks.com [108.161.129.64]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id AB99383B3D for ; Fri, 29 Apr 2022 22:51:08 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=gateworks.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=tharvey@gateworks.com Received: from 068-189-091-139.biz.spectrum.com ([68.189.91.139] helo=tharvey.pdc.gateworks.com) by finn.localdomain with esmtp (Exim 4.93) (envelope-from ) id 1nkXZw-00CtDG-Ie; Fri, 29 Apr 2022 20:51:04 +0000 From: Tim Harvey To: Stefano Babic , Fabio Estevam , "NXP i . MX U-Boot Team" , u-boot@lists.denx.de Cc: Tim Harvey Subject: [PATCH] board: gateworks: gw_ventana: add support for GPY111 PHY Date: Fri, 29 Apr 2022 13:51:02 -0700 Message-Id: <20220429205102.28956-1-tharvey@gateworks.com> X-Mailer: git-send-email 2.17.1 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean The MaxLinear GPY111 PHY is being used on some boards due to part availability. Add support for this PHY which requires a longer reset post-delay and RGMII delay configuration. Signed-off-by: Tim Harvey --- arch/arm/dts/imx6qdl-gw51xx.dtsi | 2 +- arch/arm/dts/imx6qdl-gw52xx.dtsi | 2 +- arch/arm/dts/imx6qdl-gw53xx.dtsi | 2 +- arch/arm/dts/imx6qdl-gw54xx.dtsi | 2 +- arch/arm/dts/imx6qdl-gw560x.dtsi | 2 +- arch/arm/dts/imx6qdl-gw5903.dtsi | 2 +- arch/arm/dts/imx6qdl-gw5904.dtsi | 2 +- arch/arm/dts/imx6qdl-gw5907.dtsi | 2 +- arch/arm/dts/imx6qdl-gw5910.dtsi | 2 +- arch/arm/dts/imx6qdl-gw5912.dtsi | 2 +- arch/arm/dts/imx6qdl-gw5913.dtsi | 2 +- board/gateworks/gw_ventana/gw_ventana.c | 27 +++++++++++++++++++------ 12 files changed, 32 insertions(+), 17 deletions(-) diff --git a/arch/arm/dts/imx6qdl-gw51xx.dtsi b/arch/arm/dts/imx6qdl-gw51xx.dtsi index 812acf7ab824..139ffe012dc3 100644 --- a/arch/arm/dts/imx6qdl-gw51xx.dtsi +++ b/arch/arm/dts/imx6qdl-gw51xx.dtsi @@ -130,7 +130,7 @@ phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; phy-reset-duration = <10>; - phy-reset-post-delay = <100>; + phy-reset-post-delay = <300>; status = "okay"; }; diff --git a/arch/arm/dts/imx6qdl-gw52xx.dtsi b/arch/arm/dts/imx6qdl-gw52xx.dtsi index 81a9ce38b9b1..1b5c836ff39b 100644 --- a/arch/arm/dts/imx6qdl-gw52xx.dtsi +++ b/arch/arm/dts/imx6qdl-gw52xx.dtsi @@ -196,7 +196,7 @@ phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; phy-reset-duration = <10>; - phy-reset-post-delay = <100>; + phy-reset-post-delay = <300>; status = "okay"; }; diff --git a/arch/arm/dts/imx6qdl-gw53xx.dtsi b/arch/arm/dts/imx6qdl-gw53xx.dtsi index 77ac103c2d9f..e5e9e0c0589a 100644 --- a/arch/arm/dts/imx6qdl-gw53xx.dtsi +++ b/arch/arm/dts/imx6qdl-gw53xx.dtsi @@ -190,7 +190,7 @@ phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; phy-reset-duration = <10>; - phy-reset-post-delay = <100>; + phy-reset-post-delay = <300>; status = "okay"; }; diff --git a/arch/arm/dts/imx6qdl-gw54xx.dtsi b/arch/arm/dts/imx6qdl-gw54xx.dtsi index 98c81e9c9b5b..2f41f0921424 100644 --- a/arch/arm/dts/imx6qdl-gw54xx.dtsi +++ b/arch/arm/dts/imx6qdl-gw54xx.dtsi @@ -227,7 +227,7 @@ phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; phy-reset-duration = <10>; - phy-reset-post-delay = <100>; + phy-reset-post-delay = <300>; status = "okay"; }; diff --git a/arch/arm/dts/imx6qdl-gw560x.dtsi b/arch/arm/dts/imx6qdl-gw560x.dtsi index 1e95267c974f..6586d877204c 100644 --- a/arch/arm/dts/imx6qdl-gw560x.dtsi +++ b/arch/arm/dts/imx6qdl-gw560x.dtsi @@ -281,7 +281,7 @@ phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; phy-reset-duration = <10>; - phy-reset-post-delay = <100>; + phy-reset-post-delay = <300>; status = "okay"; }; diff --git a/arch/arm/dts/imx6qdl-gw5903.dtsi b/arch/arm/dts/imx6qdl-gw5903.dtsi index 6ebf6aef2f7d..1df3faba4167 100644 --- a/arch/arm/dts/imx6qdl-gw5903.dtsi +++ b/arch/arm/dts/imx6qdl-gw5903.dtsi @@ -225,7 +225,7 @@ phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; phy-reset-duration = <10>; - phy-reset-post-delay = <100>; + phy-reset-post-delay = <300>; status = "okay"; }; diff --git a/arch/arm/dts/imx6qdl-gw5904.dtsi b/arch/arm/dts/imx6qdl-gw5904.dtsi index 286c7a9924c2..381f605cc0d5 100644 --- a/arch/arm/dts/imx6qdl-gw5904.dtsi +++ b/arch/arm/dts/imx6qdl-gw5904.dtsi @@ -203,7 +203,7 @@ phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; phy-reset-duration = <10>; - phy-reset-post-delay = <100>; + phy-reset-post-delay = <300>; status = "okay"; fixed-link { diff --git a/arch/arm/dts/imx6qdl-gw5907.dtsi b/arch/arm/dts/imx6qdl-gw5907.dtsi index a36b6e7048c7..68585f84d13c 100644 --- a/arch/arm/dts/imx6qdl-gw5907.dtsi +++ b/arch/arm/dts/imx6qdl-gw5907.dtsi @@ -132,7 +132,7 @@ phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; phy-reset-duration = <10>; - phy-reset-post-delay = <100>; + phy-reset-post-delay = <300>; status = "okay"; }; diff --git a/arch/arm/dts/imx6qdl-gw5910.dtsi b/arch/arm/dts/imx6qdl-gw5910.dtsi index 446c1043a768..594468dcba8e 100644 --- a/arch/arm/dts/imx6qdl-gw5910.dtsi +++ b/arch/arm/dts/imx6qdl-gw5910.dtsi @@ -148,7 +148,7 @@ phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; phy-reset-duration = <10>; - phy-reset-post-delay = <100>; + phy-reset-post-delay = <300>; status = "okay"; }; diff --git a/arch/arm/dts/imx6qdl-gw5912.dtsi b/arch/arm/dts/imx6qdl-gw5912.dtsi index 8fd8fdb5147c..f51ec3d62ce0 100644 --- a/arch/arm/dts/imx6qdl-gw5912.dtsi +++ b/arch/arm/dts/imx6qdl-gw5912.dtsi @@ -144,7 +144,7 @@ phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; phy-reset-duration = <10>; - phy-reset-post-delay = <100>; + phy-reset-post-delay = <300>; status = "okay"; }; diff --git a/arch/arm/dts/imx6qdl-gw5913.dtsi b/arch/arm/dts/imx6qdl-gw5913.dtsi index c2c1c2b160d4..44d347f04eb6 100644 --- a/arch/arm/dts/imx6qdl-gw5913.dtsi +++ b/arch/arm/dts/imx6qdl-gw5913.dtsi @@ -123,7 +123,7 @@ phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; phy-reset-duration = <10>; - phy-reset-post-delay = <100>; + phy-reset-post-delay = <300>; status = "okay"; }; diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index c06630a66b66..99f52b9953e2 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -32,9 +32,10 @@ DECLARE_GLOBAL_DATA_PTR; int board_phy_config(struct phy_device *phydev) { unsigned short val; + ofnode node; - /* Marvel 88E1510 */ - if (phydev->phy_id == 0x1410dd1) { + switch (phydev->phy_id) { + case 0x1410dd1: puts("MV88E1510"); /* * Page 3, Register 16: LED[2:0] Function Control Register @@ -47,10 +48,8 @@ int board_phy_config(struct phy_device *phydev) val |= 0x0017; phy_write(phydev, MDIO_DEVAD_NONE, 16, val); phy_write(phydev, MDIO_DEVAD_NONE, 22, 0); - } - - /* TI DP83867 */ - else if (phydev->phy_id == 0x2000a231) { + break; + case 0x2000a231: puts("TIDP83867 "); /* LED configuration */ val = 0; @@ -66,6 +65,22 @@ int board_phy_config(struct phy_device *phydev) val &= ~0x1f00; val |= 0x0b00; /* chD tx clock*/ phy_write(phydev, MDIO_DEVAD_NONE, 14, val); + break; + case 0xd565a401: + puts("GPY111 "); + node = phy_get_ofnode(phydev); + if (ofnode_valid(node)) { + u32 rx_delay, tx_delay; + + rx_delay = ofnode_read_u32_default(node, "rx-internal-delay-ps", 2000); + tx_delay = ofnode_read_u32_default(node, "tx-internal-delay-ps", 2000); + val = phy_read(phydev, MDIO_DEVAD_NONE, 0x17); + val &= ~((0x7 << 12) | (0x7 << 8)); + val |= (rx_delay / 500) << 12; + val |= (tx_delay / 500) << 8; + phy_write(phydev, MDIO_DEVAD_NONE, 0x17, val); + } + break; } if (phydev->drv->config)