@@ -158,7 +158,7 @@
&fec1 {
phy-reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
phy-reset-duration = <1>;
- phy-reset-post-delay = <1>;
+ phy-reset-post-delay = <300>;
};
&pinctrl_fec1 {
@@ -243,10 +243,14 @@
ethphy0: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0>;
+ /* TI DP83867 props */
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
tx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
rx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
+ /* GPY111 props */
+ rx-internal-delay-ps = <2000>;
+ tx-internal-delay-ps = <2500>;
};
};
};
@@ -116,7 +116,7 @@
&fec1 {
phy-reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
phy-reset-duration = <1>;
- phy-reset-post-delay = <1>;
+ phy-reset-post-delay = <300>;
};
&pinctrl_fec1 {
@@ -242,10 +242,14 @@
ethphy0: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0>;
+ /* TI DP83867 props */
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
tx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
rx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
+ /* GPY111 props */
+ rx-internal-delay-ps = <2000>;
+ tx-internal-delay-ps = <2500>;
};
};
};
The TI DP83867 phy has been replaced with the MaxLinear GPY111 phy due to part availability. Add support for it: - increase post-reset time to 300ms per datasheet - add tx-delay/rx-delay config Signed-off-by: Tim Harvey <tharvey@gateworks.com> --- arch/arm/dts/imx8mm-venice-gw7902-u-boot.dtsi | 2 +- arch/arm/dts/imx8mm-venice-gw7902.dts | 4 ++++ arch/arm/dts/imx8mn-venice-gw7902-u-boot.dtsi | 2 +- arch/arm/dts/imx8mn-venice-gw7902.dts | 4 ++++ 4 files changed, 10 insertions(+), 2 deletions(-)