From patchwork Fri Mar 18 11:04:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Philip Oberfichtner X-Patchwork-Id: 1606962 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=denx.de header.i=@denx.de header.a=rsa-sha256 header.s=phobos-20191101 header.b=PoWgooKe; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4KKhH94Frqz9s3q for ; Fri, 18 Mar 2022 22:14:29 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id B22CF8396C; Fri, 18 Mar 2022 12:14:00 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1647602041; bh=wZH4iq4CJEZH3PXlzr8Fdj6SAn/iz50euCJ1FAs/WBQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=PoWgooKeAEEc9iJU4/XtkzJ2zvYZ2NBuGSXCR362TAnSpms8yv43PaYPzh1wPmxLR ZbIMfd+2O+v1WLLQfcZS6cEISFgmRBACec/IJ4WNSZlY3nHFUkMHEtx9G0Wd23YIqU jET9lYcX0mtQKjCiMfkY32/VpP78QcxKjP+GBF4MFON9aQPip9Vo2OrZmQqKePkCY8 uYYZNbHpFFRfAeMpQn6tytOuKsTN/q7mJc4uowxRMS0McJiEVg61sljilfeWUH8mW0 XZraqXqlzR3rOKssjCvzLCRlwDNTLsWj4ToYEgCOSdovQUqM0gh+QEEjvYoi8QOuBL An4HKgdnnOkHQ== Received: by phobos.denx.de (Postfix, from userid 109) id 228D7820A3; Fri, 18 Mar 2022 12:05:56 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.3 required=5.0 tests=BAYES_00,RDNS_NONE, SPF_HELO_NONE,SPF_NEUTRAL,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.2 Received: from xpert.denx.de (unknown [62.91.23.180]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 628FE82116 for ; Fri, 18 Mar 2022 12:05:53 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=fail smtp.mailfrom=pro@denx.de Received: by xpert.denx.de (Postfix, from userid 535) id 270613E0659; Fri, 18 Mar 2022 12:05:53 +0100 (CET) From: Philip Oberfichtner To: u-boot@lists.denx.de Cc: Heiko Schocher , matthias.winker@de.bosch.com, Philip Oberfichtner , Gireesh Hiremath , Lokesh Vutla , Nandor Han , Simon Glass Subject: [PATCH v2 2/2] bootcount: Add pmic pfuze100 bootcount driver Date: Fri, 18 Mar 2022 12:04:38 +0100 Message-Id: <20220318110438.2863532-3-pro@denx.de> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220318110438.2863532-1-pro@denx.de> References: <20220318110438.2863532-1-pro@denx.de> MIME-Version: 1.0 X-Mailman-Approved-At: Fri, 18 Mar 2022 12:13:46 +0100 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean Use the MEMA - MEMD registers on the PFUZE100 as bootcount registers. Based on work from Heiko Schocher . Signed-off-by: Philip Oberfichtner --- Changes in v2: - Migrated bootcount driver to driver model - Introduced error handling. Previously errors were ignored. drivers/bootcount/Kconfig | 7 ++ drivers/bootcount/Makefile | 1 + drivers/bootcount/pmic_pfuze100.c | 161 ++++++++++++++++++++++++++++++ 3 files changed, 169 insertions(+) create mode 100644 drivers/bootcount/pmic_pfuze100.c diff --git a/drivers/bootcount/Kconfig b/drivers/bootcount/Kconfig index 607027c968..509d01d41e 100644 --- a/drivers/bootcount/Kconfig +++ b/drivers/bootcount/Kconfig @@ -127,6 +127,13 @@ config DM_BOOTCOUNT_I2C_EEPROM pointing to the underlying i2c eeprom device) and an optional 'offset' property are supported. +config DM_BOOTCOUNT_PMIC_PFUZE100 + bool "Enable Bootcount driver for PMIC PFUZE100" + depends on DM_PMIC_PFUZE100 + help + Enable support for the bootcounter using PMIC PFUZE100 registers. + This works only, if the PMIC is not connected. + config DM_BOOTCOUNT_SPI_FLASH bool "Support SPI flash devices as a backing store for bootcount" depends on DM_SPI_FLASH diff --git a/drivers/bootcount/Makefile b/drivers/bootcount/Makefile index 3a784bb0a6..b65959a384 100644 --- a/drivers/bootcount/Makefile +++ b/drivers/bootcount/Makefile @@ -11,6 +11,7 @@ obj-$(CONFIG_BOOTCOUNT_EXT) += bootcount_ext.o obj-$(CONFIG_BOOTCOUNT_AM33XX_NVMEM) += bootcount_nvmem.o obj-$(CONFIG_DM_BOOTCOUNT) += bootcount-uclass.o +obj-$(CONFIG_DM_BOOTCOUNT_PMIC_PFUZE100) += pmic_pfuze100.o obj-$(CONFIG_DM_BOOTCOUNT_RTC) += rtc.o obj-$(CONFIG_DM_BOOTCOUNT_I2C_EEPROM) += i2c-eeprom.o obj-$(CONFIG_DM_BOOTCOUNT_SPI_FLASH) += spi-flash.o diff --git a/drivers/bootcount/pmic_pfuze100.c b/drivers/bootcount/pmic_pfuze100.c new file mode 100644 index 0000000000..ad3bc03829 --- /dev/null +++ b/drivers/bootcount/pmic_pfuze100.c @@ -0,0 +1,161 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018-2022 Denx Software Engineering GmbH + * Heiko Schocher + * Philip Oberfichtner + * + * A bootcount driver using the registers MEMA - MEMD on the PFUZE100. + * This works only, if the PMIC is not connected. + */ + +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#define PFUZE_BC_MAGIC 0xdead + +struct bootcount_pmic_priv { + struct udevice *pmic; +}; + +static int pfuze100_get_magic(struct udevice *dev, u32 *magic) +{ + int ret; + + ret = pmic_reg_read(dev, PFUZE100_MEMA); + if (ret < 0) + return ret; + *magic = ret; + + ret = pmic_reg_read(dev, PFUZE100_MEMB); + if (ret < 0) + return ret; + *magic += ret << 8; + + return 0; +} + +static int pfuze100_set_magic(struct udevice *dev) +{ + int ret; + + ret = pmic_reg_write(dev, PFUZE100_MEMA, PFUZE_BC_MAGIC & 0xff); + if (ret) + return ret; + + ret = pmic_reg_write(dev, PFUZE100_MEMB, (PFUZE_BC_MAGIC >> 8) & 0xff); + return ret; +} + +static int pfuze100_get_value(struct udevice *dev, u32 *a) +{ + int ret; + + ret = pmic_reg_read(dev, PFUZE100_MEMC); + if (ret < 0) + return ret; + *a = ret; + + ret = pmic_reg_read(dev, PFUZE100_MEMD); + if (ret < 0) + return ret; + *a += ret << 8; + + return 0; +} + +static int pfuze100_set_value(struct udevice *dev, u32 val) +{ + int ret; + + ret = pmic_reg_write(dev, PFUZE100_MEMC, val & 0xff); + if (ret) + return ret; + + ret = pmic_reg_write(dev, PFUZE100_MEMD, (val >> 8) & 0xff); + return ret; +} + +static int bootcount_pmic_set(struct udevice *dev, const u32 a) +{ + struct bootcount_pmic_priv *priv = dev_get_priv(dev); + + if (pfuze100_set_magic(priv->pmic)) { + debug("%s: writing magic failed\n", __func__); + return -EIO; + } + + if (pfuze100_set_value(priv->pmic, a)) { + debug("%s: writing value failed\n", __func__); + return -EIO; + } + + return 0; +} + +static int bootcount_pmic_get(struct udevice *dev, u32 *a) +{ + struct bootcount_pmic_priv *priv = dev_get_priv(dev); + u32 magic; + + if (pfuze100_get_magic(priv->pmic, &magic)) { + debug("%s: reading magic failed\n", __func__); + return -EIO; + } + + if (magic != PFUZE_BC_MAGIC) { + *a = 0; + return 0; + } + + if (pfuze100_get_value(priv->pmic, a)) { + debug("%s: reading value failed\n", __func__); + return -EIO; + } + + return 0; +} + +static int bootcount_pmic_probe(struct udevice *dev) +{ + struct ofnode_phandle_args phandle_args; + struct bootcount_pmic_priv *priv = dev_get_priv(dev); + struct udevice *pmic; + + if (dev_read_phandle_with_args(dev, "pmic", NULL, 0, 0, &phandle_args)) { + debug("%s: pmic backing device not specified\n", dev->name); + return -ENOENT; + } + + if (uclass_get_device_by_ofnode(UCLASS_PMIC, phandle_args.node, &pmic)) { + debug("%s: could not get backing device\n", dev->name); + return -ENODEV; + } + + priv->pmic = pmic; + + return 0; +} + +static const struct bootcount_ops bootcount_pmic_ops = { + .get = bootcount_pmic_get, + .set = bootcount_pmic_set, +}; + +static const struct udevice_id bootcount_pmic_ids[] = { + { .compatible = "u-boot,bootcount-pmic" }, + { } +}; + +U_BOOT_DRIVER(bootcount_pmic) = { + .name = "bootcount-pmic", + .id = UCLASS_BOOTCOUNT, + .priv_auto = sizeof(struct bootcount_pmic_priv), + .probe = bootcount_pmic_probe, + .of_match = bootcount_pmic_ids, + .ops = &bootcount_pmic_ops, +};