From patchwork Fri Feb 25 13:54:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Philip Oberfichtner X-Patchwork-Id: 1597690 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=denx.de header.i=@denx.de header.a=rsa-sha256 header.s=phobos-20191101 header.b=qSUl2Ezw; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4K4rsB0Jlzz9sG2 for ; Sat, 26 Feb 2022 00:55:57 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id CE10883CB8; Fri, 25 Feb 2022 14:55:54 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1645797355; bh=4qYdI8wjf3uk0iGY7/3y+5hq/nWBhAkPfJ6kXVxIwio=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=qSUl2Ezw3I+fqZeFBPlzSfNHMQvqpwij+nwMEvkfagmlQoA7MrqtrCLrg7NmGNBS6 ATqByn9qgV0a1Jtlt5tE8SD4B08WkoBvEc76m5TvlAlZpnp3Yy0e+t1GITe5H9HMI4 Qb+CUKWMI4JpCeRzhtUCJ7k2AxuoPz0Nyuw+o7S5e5azAeUPf9zeEkBzxPAau+hB2J gndRXurtNwM0+xqd8d2kEg+Sdts9nnXnUbNoJrTtEPZ5lXKcXeDdTTOwuAGOp1J6A/ KqzoFyFquh+xfteW4tdP/fsnVKqd4qT2YwdVegRf9ju+05krvWFfeVG9+IoLHzK+SG AtF1PFjG9fxkw== Received: by phobos.denx.de (Postfix, from userid 109) id 1238183CBC; Fri, 25 Feb 2022 14:55:52 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.3 required=5.0 tests=BAYES_00,RDNS_NONE, SPF_HELO_NONE,SPF_NEUTRAL,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.2 Received: from xpert.denx.de (unknown [62.91.23.180]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 6133F83CB8 for ; Fri, 25 Feb 2022 14:55:48 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=fail smtp.mailfrom=pro@denx.de Received: by xpert.denx.de (Postfix, from userid 535) id 1B7AB3E02DD; Fri, 25 Feb 2022 14:55:48 +0100 (CET) From: Philip Oberfichtner To: u-boot@lists.denx.de Cc: Heiko Schocher , Philip Oberfichtner , Gireesh Hiremath , Lokesh Vutla , Nandor Han , Simon Glass Subject: [PATCH 2/2] bootcount: Add pmic pfuze100 bootcount driver Date: Fri, 25 Feb 2022 14:54:04 +0100 Message-Id: <20220225135405.1724365-3-pro@denx.de> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220225135405.1724365-1-pro@denx.de> References: <20220225135405.1724365-1-pro@denx.de> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean Use the MEMA - MEMD registers on the PFUZE100 as bootcount registers. Based on work from Heiko Schocher . Signed-off-by: Philip Oberfichtner --- drivers/bootcount/Kconfig | 7 ++ drivers/bootcount/Makefile | 1 + drivers/bootcount/bootcount_pmic_pfuze100.c | 83 +++++++++++++++++++++ 3 files changed, 91 insertions(+) create mode 100644 drivers/bootcount/bootcount_pmic_pfuze100.c diff --git a/drivers/bootcount/Kconfig b/drivers/bootcount/Kconfig index 607027c968..9c37fa8ec8 100644 --- a/drivers/bootcount/Kconfig +++ b/drivers/bootcount/Kconfig @@ -73,6 +73,13 @@ config BOOTCOUNT_ENV So the Userspace Application must set the "upgrade_available" and "bootcount" variable to 0, if a boot was successfully. +config BOOTCOUNT_PMIC_PFUZE100 + bool "Enable Bootcount driver for PMIC PFUZE100" + depends on DM_PMIC_PFUZE100 + help + Enable support for the bootcounter using PMIC PFUZE100 registers. + This works only, if the PMIC is not connected. + config BOOTCOUNT_RAM bool "Boot counter in RAM" help diff --git a/drivers/bootcount/Makefile b/drivers/bootcount/Makefile index 3a784bb0a6..d167815b3c 100644 --- a/drivers/bootcount/Makefile +++ b/drivers/bootcount/Makefile @@ -9,6 +9,7 @@ obj-$(CONFIG_BOOTCOUNT_ENV) += bootcount_env.o obj-$(CONFIG_BOOTCOUNT_I2C) += bootcount_i2c.o obj-$(CONFIG_BOOTCOUNT_EXT) += bootcount_ext.o obj-$(CONFIG_BOOTCOUNT_AM33XX_NVMEM) += bootcount_nvmem.o +obj-$(CONFIG_BOOTCOUNT_PMIC_PFUZE100) += bootcount_pmic_pfuze100.o obj-$(CONFIG_DM_BOOTCOUNT) += bootcount-uclass.o obj-$(CONFIG_DM_BOOTCOUNT_RTC) += rtc.o diff --git a/drivers/bootcount/bootcount_pmic_pfuze100.c b/drivers/bootcount/bootcount_pmic_pfuze100.c new file mode 100644 index 0000000000..d732618218 --- /dev/null +++ b/drivers/bootcount/bootcount_pmic_pfuze100.c @@ -0,0 +1,83 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Denx Software Engineering GmbH + * Heiko Schocher + * + * A bootcount driver using the registers MEMA - MEMD on the PFUZE100. + * This works only, if the PMIC is not connected. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#define PFUZE_BC_MAGIC 0xdead + +static ulong pfuze100_get_magic(struct udevice *dev) +{ + ulong magic; + + magic = pmic_reg_read(dev, PFUZE100_MEMA); + magic += pmic_reg_read(dev, PFUZE100_MEMB) << 8; + return magic; +} + +static void pfuze100_set_magic(struct udevice *dev) +{ + pmic_reg_write(dev, PFUZE100_MEMA, PFUZE_BC_MAGIC & 0xff); + pmic_reg_write(dev, PFUZE100_MEMB, (PFUZE_BC_MAGIC >> 8) & 0xff); +} + +static ulong pfuze100_get_value(struct udevice *dev) +{ + ulong val; + + val = pmic_reg_read(dev, PFUZE100_MEMC); + val += pmic_reg_read(dev, PFUZE100_MEMD) << 8; + return val; +} + +static void pfuze100_set_val(struct udevice *dev, ulong val) +{ + pmic_reg_write(dev, PFUZE100_MEMC, val & 0xff); + pmic_reg_write(dev, PFUZE100_MEMD, (val >> 8) & 0xff); +} + +void bootcount_store(ulong a) +{ + struct udevice *dev; + int ret; + + ret = pmic_get("pfuze100@8", &dev); + if (ret != 0) + return; + + pfuze100_set_magic(dev); + pfuze100_set_val(dev, a); +} + +ulong bootcount_load(void) +{ + struct udevice *dev; + int ret; + ulong val; + ulong magic; + + ret = pmic_get("pfuze100@8", &dev); + if (ret != 0) + return 0; + + magic = pfuze100_get_magic(dev); + if (magic != PFUZE_BC_MAGIC) + return 0; + + val = pfuze100_get_value(dev); + return val; +}