From patchwork Mon Jan 10 12:27:02 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gaurav Jain X-Patchwork-Id: 1577867 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=nxp.com header.i=@nxp.com header.a=rsa-sha256 header.s=selector2 header.b=Ds1UXn/c; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4JXY5T0BhHz9s9c for ; Mon, 10 Jan 2022 23:28:28 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id C8A4E830D0; Mon, 10 Jan 2022 13:28:15 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=nxp.com header.i=@nxp.com header.b="Ds1UXn/c"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 8F62783103; Mon, 10 Jan 2022 13:28:13 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO,SPF_HELO_PASS, T_SPF_PERMERROR autolearn=no autolearn_force=no version=3.4.2 Received: from EUR05-VI1-obe.outbound.protection.outlook.com (mail-vi1eur05on2060a.outbound.protection.outlook.com [IPv6:2a01:111:f400:7d00::60a]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 7500581E25 for ; Mon, 10 Jan 2022 13:28:09 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=gaurav.jain@nxp.com ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=mDnC2CzLUDMvDtXDeW/17pVCGMptQOwEXABb8O1t0on5E+6TXm+ADIqGHowyq0+51qyb72rfuFOG6KTF22uZFlOBJWnf6J3m2hZl1MCkxtFOURSiLrDLfst0PSRrVODqQGvH1JhkVM9pw+qQFZlhopCPmFQVRA9XZ+txbpuTFum5JYBicc+DkQkjwHlLBV10BEangrQxMGrfmtJGSQj94rey/FFR+Ya6RyBsK1Q6Di9YY4UkAQB6dreituMQTTIM/acsk5Hu1NKtrnWm8yGTMUxz1H75IEsChz5w2pSU1cL3INNeZ2w7MtEGjNb06iJYtODqpYtaN0NlWOmckFJ+cQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=k5Xjzsh646CtyhOidBdUXPIx07LxKsQYaC7nUE6muQM=; b=TR96WMawUNny5jjwHYZh+xDYrm+2juyvX51jGajakOgHGkCcC8Jt/OOwqRKeuIsfPwuUxaNg1Ze2rT9WUD2tIT2C+ZM+eMWzs6CAHzn69rKnpwNao5wOiLMi4s+FhhPzW5kyVpe+c/SDGnxs4NLr7M+GBrUyizNBIR2aB9sWSfpiAtCK5rjjCZnoMsAE5EnkPF9+bc1Mhn9DHHv/pMP8iB5tjyu14bf0lwd7A/tA2GLk5lx05QkyZK0cntIek6LMKbIGwgCYPhcdU/tHaxgsn9O5FtJwtlGBJbUQnJBimO5Vc/aqhALi5axtTmEivNxQcLiD6AIY9MFNzgIuMNXFXg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nxp.com; dmarc=pass action=none header.from=nxp.com; dkim=pass header.d=nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=k5Xjzsh646CtyhOidBdUXPIx07LxKsQYaC7nUE6muQM=; b=Ds1UXn/cVTNrB0hqW9qQpBeacV6Q7CeddAMj96Jo3Qwstlf6dyqxnd08JD0Fz82PQ1NTvzUm9HlHt0wqex3ztEnd7T86wzyWARqO2uYkkyrY7FMdHwC7N5bBNbeBhO3sJWo4yoWODw1S+llwVEanZ7LCqa7wpsA4gjcsQVZe4kw= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nxp.com; Received: from VI1PR04MB5342.eurprd04.prod.outlook.com (2603:10a6:803:46::16) by VE1PR04MB7374.eurprd04.prod.outlook.com (2603:10a6:800:1ac::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4867.7; Mon, 10 Jan 2022 12:28:08 +0000 Received: from VI1PR04MB5342.eurprd04.prod.outlook.com ([fe80::ceb:f79:2700:ba2a]) by VI1PR04MB5342.eurprd04.prod.outlook.com ([fe80::ceb:f79:2700:ba2a%3]) with mapi id 15.20.4867.011; Mon, 10 Jan 2022 12:28:08 +0000 From: Gaurav Jain To: u-boot@lists.denx.de Cc: Stefano Babic , Fabio Estevam , Peng Fan , Simon Glass , Priyanka Jain , Ye Li , Horia Geanta , Ji Luo , Franck Lenormand , Silvano Di Ninno , Sahil malhotra , Pankaj Gupta , Varun Sethi , "NXP i . MX U-Boot Team" , Shengzhou Liu , Mingkai Hu , Rajesh Bhagat , Meenakshi Aggarwal , Wasim Khan , Alison Wang , Pramod Kumar , Tang Yuantian , Adrian Alonso , Vladimir Oltean , Gaurav Jain Subject: [PATCH v8 03/15] crypto/fsl: i.MX8M: Enable Job ring driver model. Date: Mon, 10 Jan 2022 17:57:02 +0530 Message-Id: <20220110122714.20744-4-gaurav.jain@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220110122714.20744-1-gaurav.jain@nxp.com> References: <20220110122714.20744-1-gaurav.jain@nxp.com> X-ClientProxiedBy: SG2PR06CA0104.apcprd06.prod.outlook.com (2603:1096:3:14::30) To VI1PR04MB5342.eurprd04.prod.outlook.com (2603:10a6:803:46::16) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: e9678518-3a07-4417-d1cc-08d9d434a8aa X-MS-TrafficTypeDiagnostic: VE1PR04MB7374:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:43; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: RxQZcZ2oDiDn8uxZOtzn+oKRlMIUThh0EcrMkNd5oyS+q+i5d+ww50EMFMXu16OBcd4Ki5UYnNsdKztEUvV+OsFH0ePhlOopba2WfOUlEflb/o+pqydAtYJEsTFpv24lKYrfUaol7SzMCvli3+ltYirOljNgCsuP0kn9lc5T90u243U6vXrvVrmh1TumDOJT7GrfnipEQET6exbyo6ofs3NFqIcQAwQLAjFS/dWk9db9wIfVYrbgqCfb3ykcnoAe91QXXPfDbkYn9AtCoZ0BseWxw2oNOD+Q3ROLLtQhP8MbeIJ4IDjJF6O0WXGj7NrpSG9BMbafNYbHGM35gVGLv+u+VWtu741IYIEtmd21zMM5DnSTtZYzg9veOhnpjJ1lrxDNSiXflAuZweha+xFqU2lo8OaLuFvBp9m1yoEy6iPrTKZwmuG+/ozEVPJJmFwE0iAmc4irWWGtbYaMITtaZArfqa35PL9xgDq/CcdxvVQAkhqWH8vTag/+84ZQ5ABo/CWqKVnfv5KolZFfQOQPkYBoj6DiL+wkN3Qy1ZKEJpSLisRzOGmnPxDYAd3ib7gHkvNWhTvlrN97RK+q7OpA5bJVZYJJk5k45lW7CUvQ5ct85EMhPbhxsQ4rTT4NSqkmQyZodEQXKVGZH2V/HBPe+v5xa8UAOP7na/kwDlj9h6cnxLtLegwXkAFVdc9+lEi3Bxn0RAhEjzHgC+dd4nQWdw== X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:VI1PR04MB5342.eurprd04.prod.outlook.com; PTR:; CAT:NONE; SFS:(4636009)(366004)(8936002)(38350700002)(1076003)(6512007)(54906003)(36756003)(6916009)(52116002)(38100700002)(5660300002)(66946007)(55236004)(2616005)(66556008)(66476007)(6506007)(26005)(83380400001)(186003)(508600001)(44832011)(2906002)(8676002)(6666004)(316002)(4326008)(6486002)(86362001); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 8iijiePtqtL0N9YmkFOsYeaL/orvXAk2Ty4w2FF6PtKiRQMdDv8r266yCEPbk1Z6yHQHkBpNXVFYE/m4rHIpZCOIkdRQOr+AB8atu7fb4jBS5f10wpec619uWn5uQF/RGc4ORGuimALd+3sMN+AK/DMwMjDO+D1S9w/6ahcIrnOeNWZ/wgf3VejRF2EOoxFD+cBr8CokSN3MsA3UezTEfVjOinAcDYQPiMSGyiPaunDF2cFC1J9W3E6u8UpwM5fpzy8Prv1WXjQTeNx/NsK4YNYl34sbI2MvrZBjIbBj6e3c5BGw711sMhxyzG73og5cWFsHTCRcllZc92UdKPSu6g6Q5G0hyjNKhkL+rBOMYczgAIJBZb/0O5bS8Dy9nZzaMA33cyHhZuNEKsImsNpp6OKekOutAJIL6XZb93tEU28Mn+a1SP5kdeZ6E1ODP7yfXiNKU0ZEUmWSANjjCkzGYrUV1abgK2L+Ym+1muTjv/ZbWvzL/QGBzdiJDTsdkGtdOC/Wp1XjJHJOZdySI7/BQx+eUA5HnboUBlWv4Gsg5VinUdr0Lw6aSdsWIW2BGc4Tou5nEL/bP5MaC5VFMyIgezrswPFyPyL+3mWTMV81zUs0DbWsezLvcOiv/9e7AvTCTUkeCSSx8TQ8gno0RjL+le0vbyepkKDEuDVYeMTZQDfsJA0Qo0tDeo80Hht4O4fkevSFASx+NAzyJmWVo/rbW2Hpr9IpHtRl64YVv9jv1I0myxCSlD6g2bb19KQnhxyn5+m1QE9Hu6XaISaSZ6k0O4WYadD4JzcEaG2UvJEorK9kuiN/qMAkFfbClw8K2GLjv75Qzfjkqe1tPi+KOKvxx4yCOZCcA1DgEAYgl5CGXlavG3UvijTdqIeek3utA+kxQ4nhXjYNK6qFt10WntdTCeRosTXwV9K3cyTkYZoncNvMLSAgryc5SyQe2cMV7PFOB+xYx8GAaeWB/uHQaIsc323iN/dVHlVA5wAonSadzKUaUSB9deRQk8RlPS5dJAhNN8EAq/VOo0+48l9Xaq2zbgGH4qbRJ5IBTxuKv3tigwzB1Zp4oVeL4t7bWQOE5KCzZnAsCBJIPVa71odtFfp7AaiiU6EK5/xTneEJKIIJ+FvnVsgrOT16HS+ttf/XT/YG3sSOHY+64pvGsRaoe+GllRmzd2Mw2qZbkG6x9KHYIn/V8bK44IFCt39nKqwpoyymkyL+3HNlMxnr8T7LEcjfAcz3SprlC7rYE458/T9AJLrawl0sQaylFzSZOP9ubvXkSS9LzHJx8wN4NTN3Z10GBxl0j8OxSHUwftMW5KtBGB3SX0EJr8At07nOJugBKatO13tqD5yhAhYHickU4AS6F4yM3h6AhoHYrW/y07kIBC32YIeaq4Bx8WvbIVORYJPlL8Eyb87f8D8gosTxNodkbBtbGESLMvU9O+IU00ed1xOz+30cyopOHvtNETHzJkyezHvamFBJjpoSrpRCMwgmuMn9vYBJLUGm8zBR0R2VZ3m+dK5PHlhz+H5JdE+1BZfcaLaUqSRanI6CuXO04fc/ibuNy3VM3rHhguMR0EV1m+VQeHmPAXoCxhnUbF2NwK7km52Ezq/sL4UXzrQaPvQz+Ia5l8FMS4fQI7u96Hyr7pM= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: e9678518-3a07-4417-d1cc-08d9d434a8aa X-MS-Exchange-CrossTenant-AuthSource: VI1PR04MB5342.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Jan 2022 12:28:08.5290 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: QUwvU3YLVBMalo9j7uBHZuLn1EZs3UAcZ4hzrplQ4Z4w3aSkQqd5Qe7H5QhrcubV1zWUcJlpqgQpuYTx1Nf45A== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VE1PR04MB7374 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean i.MX8MM/MN/MP/MQ - added support for JR driver model. sec is initialized based on job ring information processed from device tree. Signed-off-by: Gaurav Jain Reviewed-by: Ye Li --- arch/arm/Kconfig | 2 +- arch/arm/include/asm/arch-imx8m/imx-regs.h | 1 + arch/arm/mach-imx/imx8m/Kconfig | 18 ++++++++++++++++++ arch/arm/mach-imx/imx8m/soc.c | 10 +++++++++- board/freescale/imx8mm_evk/spl.c | 9 ++++++++- board/freescale/imx8mn_evk/spl.c | 8 ++++++-- board/freescale/imx8mp_evk/spl.c | 13 +++++++++++-- board/freescale/imx8mq_evk/spl.c | 9 +++++++-- drivers/crypto/fsl/jr.c | 14 +++++++++++--- scripts/config_whitelist.txt | 1 + 10 files changed, 73 insertions(+), 12 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index f7f03837fe..550f884077 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -815,7 +815,7 @@ config ARCH_IMX8M select ARM64 select GPIO_EXTRA_HEADER select MACH_IMX - select SYS_FSL_HAS_SEC if IMX_HAB + select SYS_FSL_HAS_SEC select SYS_FSL_SEC_COMPAT_4 select SYS_FSL_SEC_LE select SYS_I2C_MXC diff --git a/arch/arm/include/asm/arch-imx8m/imx-regs.h b/arch/arm/include/asm/arch-imx8m/imx-regs.h index b800da13a1..ff8de53f67 100644 --- a/arch/arm/include/asm/arch-imx8m/imx-regs.h +++ b/arch/arm/include/asm/arch-imx8m/imx-regs.h @@ -72,6 +72,7 @@ #define CONFIG_SYS_FSL_SEC_ADDR (CAAM_IPS_BASE_ADDR + \ CONFIG_SYS_FSL_SEC_OFFSET) #define CONFIG_SYS_FSL_JR0_OFFSET (0x1000) +#define CONFIG_SYS_FSL_JR1_OFFSET (0x2000) #define CONFIG_SYS_FSL_JR0_ADDR (CONFIG_SYS_FSL_SEC_ADDR + \ CONFIG_SYS_FSL_JR0_OFFSET) #define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1 diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig index d6a869068a..95506afd17 100644 --- a/arch/arm/mach-imx/imx8m/Kconfig +++ b/arch/arm/mach-imx/imx8m/Kconfig @@ -39,6 +39,10 @@ config TARGET_IMX8MQ_EVK select BINMAN select IMX8MQ select IMX8M_LPDDR4 + select FSL_CAAM + select MISC + select ARCH_MISC_INIT + select SPL_CRYPTO if SPL config TARGET_IMX8MQ_PHANBELL bool "imx8mq_phanbell" @@ -52,6 +56,10 @@ config TARGET_IMX8MM_EVK select IMX8MM select SUPPORT_SPL select IMX8M_LPDDR4 + select FSL_CAAM + select MISC + select ARCH_MISC_INIT + select SPL_CRYPTO if SPL config TARGET_IMX8MM_ICORE_MX8MM bool "Engicam i.Core MX8M Mini SOM" @@ -91,6 +99,9 @@ config TARGET_IMX8MN_EVK select IMX8MN select SUPPORT_SPL select IMX8M_LPDDR4 + select FSL_CAAM + select MISC + select SPL_CRYPTO if SPL config TARGET_IMX8MN_DDR4_EVK bool "imx8mn DDR4 EVK board" @@ -98,6 +109,9 @@ config TARGET_IMX8MN_DDR4_EVK select IMX8MN select SUPPORT_SPL select IMX8M_DDR4 + select FSL_CAAM + select MISC + select SPL_CRYPTO if SPL config TARGET_IMX8MP_EVK bool "imx8mp LPDDR4 EVK board" @@ -105,6 +119,10 @@ config TARGET_IMX8MP_EVK select IMX8MP select SUPPORT_SPL select IMX8M_LPDDR4 + select FSL_CAAM + select MISC + select ARCH_MISC_INIT + select SPL_CRYPTO if SPL config TARGET_PICO_IMX8MQ bool "Support Technexion Pico iMX8MQ" diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index 863508776d..0f9bd77354 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright 2017-2019 NXP + * Copyright 2017-2019, 2021 NXP * * Peng Fan */ @@ -20,6 +20,7 @@ #include #include #include +#include #include #include #include @@ -1197,6 +1198,13 @@ static void acquire_buildinfo(void) int arch_misc_init(void) { + struct udevice *dev; + int ret; + + ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(caam_jr), &dev); + if (ret) + printf("Failed to initialize %s: %d\n", dev->name, ret); + acquire_buildinfo(); return 0; diff --git a/board/freescale/imx8mm_evk/spl.c b/board/freescale/imx8mm_evk/spl.c index 4ef7f6f180..c81128f442 100644 --- a/board/freescale/imx8mm_evk/spl.c +++ b/board/freescale/imx8mm_evk/spl.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright 2019 NXP + * Copyright 2019, 2021 NXP */ #include @@ -51,6 +51,13 @@ static void spl_dram_init(void) void spl_board_init(void) { + struct udevice *dev; + int ret; + + ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(caam_jr), &dev); + if (ret) + printf("Failed to initialize %s: %d\n", dev->name, ret); + puts("Normal Boot\n"); } diff --git a/board/freescale/imx8mn_evk/spl.c b/board/freescale/imx8mn_evk/spl.c index 03f2a56e80..ab19dabf7b 100644 --- a/board/freescale/imx8mn_evk/spl.c +++ b/board/freescale/imx8mn_evk/spl.c @@ -1,7 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-or-later /* - * Copyright 2018-2019 NXP + * Copyright 2018-2019, 2021 NXP * - * SPDX-License-Identifier: GPL-2.0+ */ #include @@ -49,6 +49,10 @@ void spl_board_init(void) struct udevice *dev; int ret; + ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(caam_jr), &dev); + if (ret) + printf("Failed to initialize %s: %d\n", dev->name, ret); + puts("Normal Boot\n"); ret = uclass_get_device_by_name(UCLASS_CLK, diff --git a/board/freescale/imx8mp_evk/spl.c b/board/freescale/imx8mp_evk/spl.c index eca42c756e..bcef96caa3 100644 --- a/board/freescale/imx8mp_evk/spl.c +++ b/board/freescale/imx8mp_evk/spl.c @@ -1,7 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-or-later /* - * Copyright 2018-2019 NXP + * Copyright 2018-2019, 2021 NXP * - * SPDX-License-Identifier: GPL-2.0+ */ #include @@ -20,6 +20,8 @@ #include #include #include +#include +#include DECLARE_GLOBAL_DATA_PTR; @@ -35,6 +37,13 @@ void spl_dram_init(void) void spl_board_init(void) { + struct udevice *dev; + int ret; + + ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(caam_jr), &dev); + if (ret) + printf("Failed to initialize %s: %d\n", dev->name, ret); + /* * Set GIC clock to 500Mhz for OD VDD_SOC. Kernel driver does * not allow to change it. Should set the clock after PMIC diff --git a/board/freescale/imx8mq_evk/spl.c b/board/freescale/imx8mq_evk/spl.c index 67d069b2b0..8a47dd01a5 100644 --- a/board/freescale/imx8mq_evk/spl.c +++ b/board/freescale/imx8mq_evk/spl.c @@ -1,8 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright 2018 NXP + * Copyright 2018, 2021 NXP * - * SPDX-License-Identifier: GPL-2.0+ */ #include @@ -22,6 +21,7 @@ #include #include #include +#include #include #include #include @@ -199,6 +199,11 @@ int power_init_board(void) void spl_board_init(void) { +#ifdef CONFIG_FSL_CAAM + if (sec_init()) + printf("\nsec_init failed!\n"); + +#endif puts("Normal Boot\n"); } diff --git a/drivers/crypto/fsl/jr.c b/drivers/crypto/fsl/jr.c index 8103987425..4e7accfb89 100644 --- a/drivers/crypto/fsl/jr.c +++ b/drivers/crypto/fsl/jr.c @@ -43,9 +43,17 @@ struct udevice *caam_dev; #define SEC_ADDR(idx) \ (ulong)((CONFIG_SYS_FSL_SEC_ADDR + sec_offset[idx])) -#define SEC_JR0_ADDR(idx) \ +#ifndef CONFIG_IMX8M +#define SEC_JR_ADDR(idx) \ (ulong)(SEC_ADDR(idx) + \ (CONFIG_SYS_FSL_JR0_OFFSET - CONFIG_SYS_FSL_SEC_OFFSET)) +#define JR_ID 0 +#else +#define SEC_JR_ADDR(idx) \ + (ulong)(SEC_ADDR(idx) + \ + (CONFIG_SYS_FSL_JR1_OFFSET - CONFIG_SYS_FSL_SEC_OFFSET)) +#define JR_ID 1 +#endif struct caam_regs caam_st; #endif @@ -669,8 +677,8 @@ int sec_init_idx(uint8_t sec_idx) caam = dev_get_priv(caam_dev); #else caam_st.sec = (void *)SEC_ADDR(sec_idx); - caam_st.regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); - caam_st.jrid = 0; + caam_st.regs = (struct jr_regs *)SEC_JR_ADDR(sec_idx); + caam_st.jrid = JR_ID; caam = &caam_st; #endif ccsr_sec_t *sec = caam->sec; diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index b9c1c61e13..81de1a3793 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -1848,6 +1848,7 @@ CONFIG_SYS_FSL_IFC_SIZE2 CONFIG_SYS_FSL_ISBC_VER CONFIG_SYS_FSL_JR0_ADDR CONFIG_SYS_FSL_JR0_OFFSET +CONFIG_SYS_FSL_JR1_OFFSET CONFIG_SYS_FSL_LS1_CLK_ADDR CONFIG_SYS_FSL_LSCH3_SERDES_ADDR CONFIG_SYS_FSL_MAX_NUM_OF_SEC