From patchwork Wed Dec 22 09:55:08 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lukasz Majewski X-Patchwork-Id: 1572115 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=denx.de header.i=@denx.de header.a=rsa-sha256 header.s=phobos-20191101 header.b=KyggDQZR; dkim=fail reason="signature verification failed" (2048-bit key) header.d=denx.de header.i=@denx.de header.a=rsa-sha256 header.s=phobos-20191101 header.b=zHQ4e33U; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4JJpcW48GWz9s1l for ; Wed, 22 Dec 2021 20:56:11 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id D12838331E; Wed, 22 Dec 2021 10:55:54 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1640166955; bh=OyCVCIjHMNIkPvQpnQ7WASXAsCWQnx9J5YP4eabMX9A=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=KyggDQZR4CUaeJAnXS9lJMmZ3t4Tb0Lwm9hDKjcWZggJje0KIs3GIsWomdxImcrhF y31qdLwZdA15dY7bC3Myy/4esfP0LeqOIhHRcq02PVcP7rqboPeP14lUJheJ189UVX qpaMyq+5DK+eli3l5/1kGjIVn/DtN++L9v2RgkGUIZS/sys2f0JGj0ehyPofazXxQs MxJ4po1o2QWQPTtOpsPpqNvzTgIhqW3t6F5AmNHssS7iXwo+9mWKQJfNeIr/eek8QM AkJ2zizftPi8UzghUh6Scth4734J+EgKd1j8nFN6xOWCDTVtmz/OZZ/45AqPW3EdDT tmf1VbgU2N/wA== Received: from localhost.localdomain (85-222-111-42.dynamic.chello.pl [85.222.111.42]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: lukma@denx.de) by phobos.denx.de (Postfix) with ESMTPSA id F2FC98302A; Wed, 22 Dec 2021 10:55:34 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1640166935; bh=OyCVCIjHMNIkPvQpnQ7WASXAsCWQnx9J5YP4eabMX9A=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=zHQ4e33UhDsVITba+vGfIxqhrQAzQ/rMvElSxj9eMeGt0onTUYZHuGVOppe0yoqCs Zp2CVfbqwcBXWi0y5bruwmO9f7mYqMzaEwkl8EmDU/8jGxKYVOOBf8gR6upgihC7u1 W7dxDoyqrims1o6mDn3/NJiVSlcOnD4dW1q7sx0h0BN74JxZUrOuqkxEnrA0AP/WoA kF2LB3M4GVPEQCoUID/jfmz/3l4rcUCXhsKFfgpFTSkCsHLy82rY28t/fvw+n+A5YA M+pln+GVriTO273xlFJanw6tR625ZjEBtrMKu+T7Epzjkxse8nUDiwNPVMeqvRu3Cw qqN+gI0Lyv7OQ== From: Lukasz Majewski To: u-boot@lists.denx.de, Stefano Babic , Marek Vasut Cc: Lukasz Majewski , "WARNING:Unknown"@denx.de, setting@denx.de, ignore_warnings@denx.de Subject: [PATCH v1 3/4] usb: ehci: Move common mxs code to separate functions (ehci_hcd_{stop|start}) Date: Wed, 22 Dec 2021 10:55:08 +0100 Message-Id: <20211222095509.30071-4-lukma@denx.de> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20211222095509.30071-1-lukma@denx.de> References: <20211222095509.30071-1-lukma@denx.de> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.38 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean Those functions will be re-used when the ehci MXS driver (for imx28) will be converted to also support CONFIG_DM_USB. No functional changes introduced - only cosmetic changes (u32 type) and alignment to pass checkpatch. Signed-off-by: Lukasz Majewski --- drivers/usb/host/ehci-mxs.c | 112 ++++++++++++++++++++---------------- 1 file changed, 62 insertions(+), 50 deletions(-) diff --git a/drivers/usb/host/ehci-mxs.c b/drivers/usb/host/ehci-mxs.c index a9d5d58970a..aa32af1f3aa 100644 --- a/drivers/usb/host/ehci-mxs.c +++ b/drivers/usb/host/ehci-mxs.c @@ -50,6 +50,66 @@ static int ehci_mxs_toggle_clock(const struct ehci_mxs_port *port, int enable) return 0; } +static int __ehci_hcd_init(struct ehci_mxs_port *port, enum usb_init_type init, + struct ehci_hccr **hccr, struct ehci_hcor **hcor) +{ + u32 usb_base, cap_base; + int ret; + + /* Reset the PHY block */ + writel(USBPHY_CTRL_SFTRST, &port->phy_regs->hw_usbphy_ctrl_set); + udelay(10); + writel(USBPHY_CTRL_SFTRST | USBPHY_CTRL_CLKGATE, + &port->phy_regs->hw_usbphy_ctrl_clr); + + /* Enable USB clock */ + ret = ehci_mxs_toggle_clock(port, 1); + if (ret) + return ret; + + /* Start USB PHY */ + writel(0, &port->phy_regs->hw_usbphy_pwd); + + /* Enable UTMI+ Level 2 and Level 3 compatibility */ + writel(USBPHY_CTRL_ENUTMILEVEL3 | USBPHY_CTRL_ENUTMILEVEL2 | 1, + &port->phy_regs->hw_usbphy_ctrl_set); + + usb_base = port->usb_regs + 0x100; + *hccr = (struct ehci_hccr *)usb_base; + + cap_base = ehci_readl(&(*hccr)->cr_capbase); + *hcor = (struct ehci_hcor *)(usb_base + HC_LENGTH(cap_base)); + + return 0; +} + +static int __ehci_hcd_stop(struct ehci_mxs_port *port) +{ + u32 usb_base, cap_base, tmp; + struct ehci_hccr *hccr; + struct ehci_hcor *hcor; + + /* Stop the USB port */ + usb_base = port->usb_regs + 0x100; + hccr = (struct ehci_hccr *)usb_base; + cap_base = ehci_readl(&hccr->cr_capbase); + hcor = (struct ehci_hcor *)(usb_base + HC_LENGTH(cap_base)); + + tmp = ehci_readl(&hcor->or_usbcmd); + tmp &= ~CMD_RUN; + ehci_writel(&hcor->or_usbcmd, tmp); + + /* Disable the PHY */ + tmp = USBPHY_PWD_RXPWDRX | USBPHY_PWD_RXPWDDIFF | + USBPHY_PWD_RXPWD1PT1 | USBPHY_PWD_RXPWDENV | + USBPHY_PWD_TXPWDV2I | USBPHY_PWD_TXPWDIBIAS | + USBPHY_PWD_TXPWDFS; + writel(tmp, &port->phy_regs->hw_usbphy_pwd); + + /* Disable USB clock */ + return ehci_mxs_toggle_clock(port, 0); +} + static const struct ehci_mxs_port mxs_port[] = { #ifdef CONFIG_EHCI_MXS_PORT0 { @@ -92,7 +152,6 @@ int ehci_hcd_init(int index, enum usb_init_type init, { int ret; - uint32_t usb_base, cap_base; const struct ehci_mxs_port *port; if ((index < 0) || (index >= ARRAY_SIZE(mxs_port))) { @@ -105,40 +164,12 @@ int ehci_hcd_init(int index, enum usb_init_type init, return ret; port = &mxs_port[index]; - - /* Reset the PHY block */ - writel(USBPHY_CTRL_SFTRST, &port->phy_regs->hw_usbphy_ctrl_set); - udelay(10); - writel(USBPHY_CTRL_SFTRST | USBPHY_CTRL_CLKGATE, - &port->phy_regs->hw_usbphy_ctrl_clr); - - /* Enable USB clock */ - ret = ehci_mxs_toggle_clock(port, 1); - if (ret) - return ret; - - /* Start USB PHY */ - writel(0, &port->phy_regs->hw_usbphy_pwd); - - /* Enable UTMI+ Level 2 and Level 3 compatibility */ - writel(USBPHY_CTRL_ENUTMILEVEL3 | USBPHY_CTRL_ENUTMILEVEL2 | 1, - &port->phy_regs->hw_usbphy_ctrl_set); - - usb_base = port->usb_regs + 0x100; - *hccr = (struct ehci_hccr *)usb_base; - - cap_base = ehci_readl(&(*hccr)->cr_capbase); - *hcor = (struct ehci_hcor *)(usb_base + HC_LENGTH(cap_base)); - - return 0; + return __ehci_hcd_init(port, init, hccr, hcor); } int ehci_hcd_stop(int index) { int ret; - uint32_t usb_base, cap_base, tmp; - struct ehci_hccr *hccr; - struct ehci_hcor *hcor; const struct ehci_mxs_port *port; if ((index < 0) || (index >= ARRAY_SIZE(mxs_port))) { @@ -148,26 +179,7 @@ int ehci_hcd_stop(int index) port = &mxs_port[index]; - /* Stop the USB port */ - usb_base = port->usb_regs + 0x100; - hccr = (struct ehci_hccr *)usb_base; - cap_base = ehci_readl(&hccr->cr_capbase); - hcor = (struct ehci_hcor *)(usb_base + HC_LENGTH(cap_base)); - - tmp = ehci_readl(&hcor->or_usbcmd); - tmp &= ~CMD_RUN; - ehci_writel(&hcor->or_usbcmd, tmp); - - /* Disable the PHY */ - tmp = USBPHY_PWD_RXPWDRX | USBPHY_PWD_RXPWDDIFF | - USBPHY_PWD_RXPWD1PT1 | USBPHY_PWD_RXPWDENV | - USBPHY_PWD_TXPWDV2I | USBPHY_PWD_TXPWDIBIAS | - USBPHY_PWD_TXPWDFS; - writel(tmp, &port->phy_regs->hw_usbphy_pwd); - - /* Disable USB clock */ - ret = ehci_mxs_toggle_clock(port, 0); - + ret = __ehci_hcd_stop(port); board_ehci_hcd_exit(index); return ret;