@@ -775,10 +775,11 @@ int fdt_fixup_board_phy(void *fdt)
int fpga_offset, offset, subnodeoffset;
struct mii_dev *mii_dev;
struct list_head *mii_devs, *entry;
- int ret, dpmac_id, phandle, i;
+ int ret, dpmac_id, i;
struct phy_device *phy_dev;
char ethname[ETH_NAME_LEN];
phy_interface_t phy_iface;
+ uint32_t phandle;
ret = 0;
/* we know FPGA is connected to i2c0, therefore search path directly,
@@ -794,7 +795,10 @@ int fdt_fixup_board_phy(void *fdt)
return fpga_offset;
}
- phandle = fdt_alloc_phandle(fdt);
+ ret = fdt_generate_phandle(fdt, &phandle);
+ if (ret < 0)
+ return ret;
+
mii_devs = mdio_get_list_head();
list_for_each(entry, mii_devs) {
@@ -787,10 +787,11 @@ int fdt_fixup_board_phy(void *fdt)
int fpga_offset, offset, subnodeoffset;
struct mii_dev *mii_dev;
struct list_head *mii_devs, *entry;
- int ret, dpmac_id, phandle, i;
+ int ret, dpmac_id, i;
struct phy_device *phy_dev;
char ethname[ETH_NAME_LEN];
phy_interface_t phy_iface;
+ uint32_t phandle;
ret = 0;
/* we know FPGA is connected to i2c0, therefore search path directly,
@@ -806,7 +807,10 @@ int fdt_fixup_board_phy(void *fdt)
return fpga_offset;
}
- phandle = fdt_alloc_phandle(fdt);
+ ret = fdt_generate_phandle(fdt, &phandle);
+ if (ret < 0)
+ return ret;
+
mii_devs = mdio_get_list_head();
list_for_each(entry, mii_devs) {
@@ -1463,24 +1463,6 @@ int fdt_node_offset_by_compat_reg(void *blob, const char *compat,
return -FDT_ERR_NOTFOUND;
}
-/**
- * fdt_alloc_phandle: Return next free phandle value
- *
- * @blob: ptr to device tree
- */
-int fdt_alloc_phandle(void *blob)
-{
- int offset;
- uint32_t phandle = 0;
-
- for (offset = fdt_next_node(blob, -1, NULL); offset >= 0;
- offset = fdt_next_node(blob, offset, NULL)) {
- phandle = max(phandle, fdt_get_phandle(blob, offset));
- }
-
- return phandle + 1;
-}
-
/*
* fdt_set_phandle: Create a phandle property for the given node
*
@@ -1530,13 +1512,19 @@ int fdt_set_phandle(void *fdt, int nodeoffset, uint32_t phandle)
unsigned int fdt_create_phandle(void *fdt, int nodeoffset)
{
/* see if there is a phandle already */
- int phandle = fdt_get_phandle(fdt, nodeoffset);
+ uint32_t phandle = fdt_get_phandle(fdt, nodeoffset);
/* if we got 0, means no phandle so create one */
if (phandle == 0) {
int ret;
- phandle = fdt_alloc_phandle(fdt);
+ ret = fdt_generate_phandle(fdt, &phandle);
+ if (ret < 0) {
+ printf("Can't generate phandle: %s\n",
+ fdt_strerror(ret));
+ return 0;
+ }
+
ret = fdt_set_phandle(fdt, nodeoffset, phandle);
if (ret < 0) {
printf("Can't set phandle %u: %s\n", phandle,
@@ -285,7 +285,6 @@ int fdt_get_dma_range(const void *blob, int node_offset, phys_addr_t *cpu,
int fdt_node_offset_by_compat_reg(void *blob, const char *compat,
phys_addr_t compat_off);
-int fdt_alloc_phandle(void *blob);
int fdt_set_phandle(void *fdt, int nodeoffset, uint32_t phandle);
unsigned int fdt_create_phandle(void *fdt, int nodeoffset);
int fdt_add_edid(void *blob, const char *compat, unsigned char *buf);